From: Tom Rini <trini@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 05/12] OMAP3: Add optimal SDRC autorefresh control values
Date: Thu, 17 Nov 2011 14:44:17 -0700 [thread overview]
Message-ID: <4EC58031.6040701@ti.com> (raw)
In-Reply-To: <4EBB6D37.5020801@denx.de>
On 11/09/2011 11:20 PM, Heiko Schocher wrote:
> Hello Tom,
>
> Tom Rini wrote:
>> This adds the optimal SDRC autorefresh control register values for
>> 100Mhz, 133MHz, 165MHz and 200MHz clocks. We switch to using this
>> to provide the default 165MHz value.
[snip]
>> +#define SDP_3430_SDRC_RFR_CTRL_133MHz 0x0003de01 /* 7.8us/7.5ns - 50=0x3de */
>> +#define SDP_3430_SDRC_RFR_CTRL_165MHz 0x0004e201 /* 7.8us/6ns - 50=0x4e2 */
>> +#define SDP_3430_SDRC_RFR_CTRL_200MHz 0x0005e601 /* 7.8us/5ns - 50=0x5e6 */
>
> You should use something like that here:
>
> #define OMAP3_SDP_SDRC_xx_SHIFT 8
> #define OMAP3_SDP_SDRC_yy (1 << 0)
>
> #define SDP_3430_SDRC_RFR_CTRL_200MHz ((0x5e6 << OMAP3_SDP_SDRC_xx_SHIFT) |
> OMAP3_SDP_SDRC_yy)
OK, I hadn't forgotten about this, I've just been a bit busy. I broke
out the TRM, split these values out into binary and, breaking it out
into shifts won't help make it more understandable. It needs a better
comment, which I will happily do. Bits 1:0 are autofresh enable is 0x1
and 0x2/0x3 are bursts. 7:2 are reserved (as are 24:31) and 8:23 are
autorefresh counter value.
--
Tom
next prev parent reply other threads:[~2011-11-17 21:44 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-09 17:10 [U-Boot] [PATCH v3 0/12] Add more framework to OMAP3 SPL, port more boards Tom Rini
2011-11-09 17:10 ` [U-Boot] [PATCH v3 01/12] OMAP3: Update SDRC dram_init to always call make_cs1_contiguous() Tom Rini
2011-11-09 17:10 ` [U-Boot] [PATCH v3 02/12] OMAP3: Add a helper function to set timings in SDRC Tom Rini
2011-11-09 17:10 ` [U-Boot] [PATCH v3 03/12] OMAP3: Change mem_ok to clear again after reading back Tom Rini
2011-11-09 17:10 ` [U-Boot] [PATCH v3 04/12] OMAP3: Remove get_mem_type prototype Tom Rini
2011-11-09 17:10 ` [U-Boot] [PATCH v3 05/12] OMAP3: Add optimal SDRC autorefresh control values Tom Rini
2011-11-10 6:20 ` Heiko Schocher
2011-11-10 21:32 ` Robert Hurdle
2011-11-17 21:44 ` Tom Rini [this message]
2011-11-09 17:11 ` [U-Boot] [PATCH v3 06/12] OMAP3: Suffix all Micron memory timing parts with their speed Tom Rini
2011-11-10 6:23 ` Heiko Schocher
2011-11-17 21:50 ` Tom Rini
2011-11-09 17:11 ` [U-Boot] [PATCH v3 07/12] OMAP3 SPL: Rework memory initalization and devkit8000 support Tom Rini
2011-11-09 17:11 ` [U-Boot] [PATCH v3 08/12] OMAP3 SPL: Add identify_nand_chip function Tom Rini
2011-11-10 6:25 ` Heiko Schocher
2011-11-17 22:36 ` Tom Rini
2011-11-09 17:11 ` [U-Boot] [PATCH v3 09/12] OMAP3: Add SPL support to Beagleboard Tom Rini
2011-11-10 6:28 ` Heiko Schocher
2011-11-10 14:34 ` Tom Rini
2011-11-10 14:46 ` Heiko Schocher
2011-11-09 17:11 ` [U-Boot] [PATCH v3 10/12] OMAP3: Add SPL support to omap3_evm Tom Rini
2011-11-09 17:11 ` [U-Boot] [PATCH v3 11/12] AM3517: Add SPL support Tom Rini
2011-11-09 17:11 ` [U-Boot] [PATCH v3 12/12] AM3517 CraneBoard: " Tom Rini
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