From: Tom Rini <trini@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 08/12] OMAP3 SPL: Add identify_nand_chip function
Date: Thu, 17 Nov 2011 15:36:50 -0700 [thread overview]
Message-ID: <4EC58C82.4000608@ti.com> (raw)
In-Reply-To: <4EBB6E6A.9070906@denx.de>
On 11/09/2011 11:25 PM, Heiko Schocher wrote:
> Hello Tom,
>
> Tom Rini wrote:
>> A number of boards are populated with a PoP chip for both DDR and NAND
>> memory. Other boards may simply use this as an easy way to identify
>> board revs. So we provide a function that can be called early to reset
>> the NAND chip and return the result of NAND_CMD_READID. All of this
>> code is put into spl_id_nand.c and controlled via CONFIG_SPL_OMAP3_ID_NAND.
>>
>> Signed-off-by: Tom Rini <trini@ti.com>
>> ---
>> arch/arm/cpu/armv7/omap3/Makefile | 3 +
>> arch/arm/cpu/armv7/omap3/spl_id_nand.c | 83 +++++++++++++++++++++++++++
>> arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
>> 3 files changed, 87 insertions(+), 0 deletions(-)
>> create mode 100644 arch/arm/cpu/armv7/omap3/spl_id_nand.c
>>
>> diff --git a/arch/arm/cpu/armv7/omap3/spl_id_nand.c b/arch/arm/cpu/armv7/omap3/spl_id_nand.c
>> new file mode 100644
>> index 0000000..edf3ded
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/omap3/spl_id_nand.c
>> @@ -0,0 +1,83 @@
> [...]
>> +void identify_nand_chip(int *mfr, int *id)
>> +{
>> + /* Make sure that we have setup GPMC for NAND correctly. */
>> + writel(M_NAND_GPMC_CONFIG1, &gpmc_config->cs[0].config1);
>> + writel(M_NAND_GPMC_CONFIG2, &gpmc_config->cs[0].config2);
>> + writel(M_NAND_GPMC_CONFIG3, &gpmc_config->cs[0].config3);
>> + writel(M_NAND_GPMC_CONFIG4, &gpmc_config->cs[0].config4);
>> + writel(M_NAND_GPMC_CONFIG5, &gpmc_config->cs[0].config5);
>> + writel(M_NAND_GPMC_CONFIG6, &gpmc_config->cs[0].config6);
>> +
>> + /* Enable the GPMC Mapping */
>> + writel((((GPMC_SIZE_128M & 0xF) << 8) | ((NAND_BASE >> 24) & 0x3F) |
> ^ ^ ^
>> + (1 << 6)), &gpmc_config->cs[0].config7);
> ^^^^^^^^
>
> Please substitute this magic values through defines.
OK, I've clarified the original code and then done the same to this code.
--
Tom
next prev parent reply other threads:[~2011-11-17 22:36 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-09 17:10 [U-Boot] [PATCH v3 0/12] Add more framework to OMAP3 SPL, port more boards Tom Rini
2011-11-09 17:10 ` [U-Boot] [PATCH v3 01/12] OMAP3: Update SDRC dram_init to always call make_cs1_contiguous() Tom Rini
2011-11-09 17:10 ` [U-Boot] [PATCH v3 02/12] OMAP3: Add a helper function to set timings in SDRC Tom Rini
2011-11-09 17:10 ` [U-Boot] [PATCH v3 03/12] OMAP3: Change mem_ok to clear again after reading back Tom Rini
2011-11-09 17:10 ` [U-Boot] [PATCH v3 04/12] OMAP3: Remove get_mem_type prototype Tom Rini
2011-11-09 17:10 ` [U-Boot] [PATCH v3 05/12] OMAP3: Add optimal SDRC autorefresh control values Tom Rini
2011-11-10 6:20 ` Heiko Schocher
2011-11-10 21:32 ` Robert Hurdle
2011-11-17 21:44 ` Tom Rini
2011-11-09 17:11 ` [U-Boot] [PATCH v3 06/12] OMAP3: Suffix all Micron memory timing parts with their speed Tom Rini
2011-11-10 6:23 ` Heiko Schocher
2011-11-17 21:50 ` Tom Rini
2011-11-09 17:11 ` [U-Boot] [PATCH v3 07/12] OMAP3 SPL: Rework memory initalization and devkit8000 support Tom Rini
2011-11-09 17:11 ` [U-Boot] [PATCH v3 08/12] OMAP3 SPL: Add identify_nand_chip function Tom Rini
2011-11-10 6:25 ` Heiko Schocher
2011-11-17 22:36 ` Tom Rini [this message]
2011-11-09 17:11 ` [U-Boot] [PATCH v3 09/12] OMAP3: Add SPL support to Beagleboard Tom Rini
2011-11-10 6:28 ` Heiko Schocher
2011-11-10 14:34 ` Tom Rini
2011-11-10 14:46 ` Heiko Schocher
2011-11-09 17:11 ` [U-Boot] [PATCH v3 10/12] OMAP3: Add SPL support to omap3_evm Tom Rini
2011-11-09 17:11 ` [U-Boot] [PATCH v3 11/12] AM3517: Add SPL support Tom Rini
2011-11-09 17:11 ` [U-Boot] [PATCH v3 12/12] AM3517 CraneBoard: " Tom Rini
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