* [U-Boot] Adding support to Technexion TAM3517 SOM
@ 2011-11-23 9:26 Stefano Babic
2011-11-23 9:26 ` [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Stefano Babic
` (3 more replies)
0 siblings, 4 replies; 42+ messages in thread
From: Stefano Babic @ 2011-11-23 9:26 UTC (permalink / raw)
To: u-boot
This patches adds support for the Technexion's SOM TAM3517 based on
a TI AM3517. In agreement with Tapani Utrianen, this patchset superseeds
the recent patches sent to the ML by him with the same purpose.
This patchset requires the patchset for the AM3517 and EMAC posted
by Ilya Yanok, and not yet merged into mainline. Ilya's patches must be applied
first before this patchset.
[PATCH 1/2] ARM: omap3: added common configuration for Technexion
[PATCH 2/2] ARM: omap3: add support to Technexion twister board
^ permalink raw reply [flat|nested] 42+ messages in thread* [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-23 9:26 [U-Boot] Adding support to Technexion TAM3517 SOM Stefano Babic @ 2011-11-23 9:26 ` Stefano Babic 2011-11-23 12:44 ` Igor Grinberg ` (2 more replies) 2011-11-23 9:26 ` [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic ` (2 subsequent siblings) 3 siblings, 3 replies; 42+ messages in thread From: Stefano Babic @ 2011-11-23 9:26 UTC (permalink / raw) To: u-boot The TAM3517 is a SOM module that can be used on custom boards. The patch add a common configuration file that is included by the boards using this module. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tapani Utrianen <tapani@technexion.com> CC: Tom Rini <tom.rini@gmail.com> CC: Sandeep Paulraj <s-paulraj@ti.com> --- include/configs/tam3517-common.h | 334 ++++++++++++++++++++++++++++++++++++++ 1 files changed, 334 insertions(+), 0 deletions(-) create mode 100644 include/configs/tam3517-common.h diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h new file mode 100644 index 0000000..c76138a --- /dev/null +++ b/include/configs/tam3517-common.h @@ -0,0 +1,334 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. + * + * Copyright (C) 2009 TechNexion Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __TAM3517_H +#define __TAM3517_H + +/* + * High Level Configuration Options + */ +#define CONFIG_OMAP /* in a TI OMAP core */ +#define CONFIG_OMAP34XX /* which is a 34XX */ + +/* TODO : Check these ones ! */ +#define CONFIG_TAM3517 /* working with TAM3517 */ + +#define CONFIG_SYS_TEXT_BASE 0x80008000 + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#define CONFIG_EMIF4 /* The chip has EMIF4 controller */ + +#include <asm/arch/cpu.h> /* get chip and board defs */ +#include <asm/arch/omap3.h> + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#undef CONFIG_USE_IRQ /* no support for IRQs */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ + 2 * 1024 * 1024) +/* + * DDR related + */ +#define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */ +#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) + +/* + * Hardware drivers + */ + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 +#define CONFIG_SERIAL1 /* UART1 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ + 115200} +#define CONFIG_MMC +#define CONFIG_OMAP_HSMMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DOS_PARTITION + +#define CONFIG_USB_STORAGE +#define CONGIG_CMD_STORAGE +#define CONFIG_CMD_FAT + +/* EHCI */ +#define CONFIG_OMAP3_GPIO_5 +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_OMAP +#define CONFIG_OMAP_EHCI_PHY1_RESET 25 +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 +/* #define CONFIG_EHCI_DCACHE */ + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ + +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_NAND /* NAND support */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_GPIO + +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#undef CONFIG_CMD_IMI /* iminfo */ +#undef CONFIG_CMD_IMLS /* List all found images */ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C + +#define CONFIG_CMD_NET +#define CONFIG_CMD_MII +#define CONFIG_CMD_NFS + +/* + * Board NAND Info. + */ +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ + /* to access nand */ +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ + /* to access */ + /* nand at CS0 */ + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ + /* NAND devices */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + +#define CONFIG_JFFS2_NAND +/* nand device jffs2 lives on */ +#define CONFIG_JFFS2_DEV "nand0" +/* start of jffs2 partition */ +#define CONFIG_JFFS2_PART_OFFSET 0x680000 +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ + +#define CONFIG_AUTO_COMPLETE +/* + * Miscellaneous configurable options + */ + +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 32 /* max number of command */ + /* args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ + /* address */ + +/* + * AM3517 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ +#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE (32 << 20) /*@least 32 MiB */ +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* SDRAM Bank Allocation method */ +/* TODO : Check */ +/* #define SDRC_R_B_C 1 */ + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ + +/* **** PISMO SUPPORT *** */ + +/* Configure the PISMO */ +#define PISMO1_NAND_SIZE GPMC_SIZE_128M + +#define CONFIG_NAND_OMAP_GPMC +#define GPMC_NAND_ECC_LP_x16_LAYOUT +#define CONFIG_ENV_IS_IN_NAND +#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ + +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ +#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET + +/*----------------------------------------------------------------------- + * CFI FLASH driver setup + */ +/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) + +/* Flash banks JFFS2 should use */ +#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ + CONFIG_SYS_MAX_NAND_DEVICE) +#define CONFIG_SYS_JFFS2_MEM_NAND +/* use flash_info[2] */ +#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS +#define CONFIG_SYS_JFFS2_NUM_BANKS 1 + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +/* + * ethernet support + * + */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_DRIVER_TI_EMAC_USE_RMII +#define CONFIG_MII +#define CONFIG_EMAC_MDIO_PHY_NUM 0 +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI + +#endif + +/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_CONSOLE +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_NAND_SOFTECC +#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ +#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK + +#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 +#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 + +/* NAND boot config */ +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ + 48, 49, 50, 51, 52, 53, 54, 55,\ + 56, 57, 58, 59, 60, 61, 62, 63} +#define CONFIG_SYS_NAND_ECCSIZE 256 +#define CONFIG_SYS_NAND_ECCBYTES 3 + +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ + CONFIG_SYS_NAND_ECCSIZE) +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 + +#endif /* __TAM3517_H */ -- 1.7.5.4 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-23 9:26 ` [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Stefano Babic @ 2011-11-23 12:44 ` Igor Grinberg 2011-11-23 13:08 ` Stefano Babic 2011-11-23 16:11 ` Wolfgang Denk 2011-11-23 16:21 ` Wolfgang Denk 2011-12-01 9:56 ` [U-Boot] [PATCH V3 " Stefano Babic 2 siblings, 2 replies; 42+ messages in thread From: Igor Grinberg @ 2011-11-23 12:44 UTC (permalink / raw) To: u-boot Hi Stefano, On 11/23/11 11:26, Stefano Babic wrote: > The TAM3517 is a SOM module that can be used on custom boards. > The patch add a common configuration file that is included > by the boards using this module. > > Signed-off-by: Stefano Babic <sbabic@denx.de> > CC: Tapani Utrianen <tapani@technexion.com> > CC: Tom Rini <tom.rini@gmail.com> > CC: Sandeep Paulraj <s-paulraj@ti.com> > --- > include/configs/tam3517-common.h | 334 ++++++++++++++++++++++++++++++++++++++ > 1 files changed, 334 insertions(+), 0 deletions(-) > create mode 100644 include/configs/tam3517-common.h > > diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h > new file mode 100644 > index 0000000..c76138a > --- /dev/null > +++ b/include/configs/tam3517-common.h > @@ -0,0 +1,334 @@ > +/* > + * Copyright (C) 2011 > + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. > + * > + * Copyright (C) 2009 TechNexion Ltd. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. > + */ > + > +#ifndef __TAM3517_H > +#define __TAM3517_H > + > +/* > + * High Level Configuration Options > + */ > +#define CONFIG_OMAP /* in a TI OMAP core */ > +#define CONFIG_OMAP34XX /* which is a 34XX */ > + > +/* TODO : Check these ones ! */ > +#define CONFIG_TAM3517 /* working with TAM3517 */ > + > +#define CONFIG_SYS_TEXT_BASE 0x80008000 > + > +#define CONFIG_SYS_CACHELINE_SIZE 64 > + > +#define CONFIG_EMIF4 /* The chip has EMIF4 controller */ > + > +#include <asm/arch/cpu.h> /* get chip and board defs */ > +#include <asm/arch/omap3.h> > + > +/* > + * Display CPU and Board information > + */ > +#define CONFIG_DISPLAY_CPUINFO > +#define CONFIG_DISPLAY_BOARDINFO > + > +/* Clock Defines */ > +#define V_OSCK 26000000 /* Clock output from T2 */ > +#define V_SCLK (V_OSCK >> 1) > + > +#undef CONFIG_USE_IRQ /* no support for IRQs */ > +#define CONFIG_MISC_INIT_R > + > +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ > +#define CONFIG_SETUP_MEMORY_TAGS > +#define CONFIG_INITRD_TAG > +#define CONFIG_REVISION_TAG > + > +/* > + * Size of malloc() pool > + */ > +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ > +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ > + 2 * 1024 * 1024) > +/* > + * DDR related > + */ > +#define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */ > +#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) > + > +/* > + * Hardware drivers > + */ > + > +/* > + * NS16550 Configuration > + */ > +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ > + > +#define CONFIG_SYS_NS16550 > +#define CONFIG_SYS_NS16550_SERIAL > +#define CONFIG_SYS_NS16550_REG_SIZE (-4) > +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK Can this be inlined? instead of defining the define... > + > +/* > + * select serial console configuration > + */ > +#define CONFIG_CONS_INDEX 1 > +#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 > +#define CONFIG_SERIAL1 /* UART1 */ > + > +/* allow to overwrite serial and ethaddr */ > +#define CONFIG_ENV_OVERWRITE > +#define CONFIG_BAUDRATE 115200 > +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ > + 115200} > +#define CONFIG_MMC > +#define CONFIG_OMAP_HSMMC > +#define CONFIG_GENERIC_MMC > +#define CONFIG_DOS_PARTITION > + > +#define CONFIG_USB_STORAGE > +#define CONGIG_CMD_STORAGE > +#define CONFIG_CMD_FAT > + > +/* EHCI */ > +#define CONFIG_OMAP3_GPIO_5 > +#define CONFIG_USB_EHCI > +#define CONFIG_USB_EHCI_OMAP > +#define CONFIG_OMAP_EHCI_PHY1_RESET 25 The latest patch from Ilya makes it: CONFIG_OMAP_EHCI_PHY1_RESET_GPIO > +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 > +/* #define CONFIG_EHCI_DCACHE */ > + > +/* commands to include */ > +#include <config_cmd_default.h> > + > +#define CONFIG_CMD_EXT2 /* EXT2 Support */ > +#define CONFIG_CMD_FAT /* FAT support */ > +#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ > + > +#define CONFIG_CMD_I2C /* I2C serial bus support */ > +#define CONFIG_CMD_MMC /* MMC support */ > +#define CONFIG_CMD_FAT /* FAT support */ > +#define CONFIG_CMD_NAND /* NAND support */ > +#define CONFIG_CMD_USB > +#define CONFIG_CMD_DHCP > +#define CONFIG_CMD_PING > +#define CONFIG_CMD_CACHE > +#define CONFIG_CMD_GPIO > + > +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ > +#undef CONFIG_CMD_IMI /* iminfo */ > +#undef CONFIG_CMD_IMLS /* List all found images */ > + > +#define CONFIG_SYS_NO_FLASH > +#define CONFIG_HARD_I2C > +#define CONFIG_SYS_I2C_SPEED 400000 > +#define CONFIG_SYS_I2C_SLAVE 1 > +#define CONFIG_SYS_I2C_BUS 0 > +#define CONFIG_SYS_I2C_BUS_SELECT 1 > +#define CONFIG_DRIVER_OMAP34XX_I2C > + > +#define CONFIG_CMD_NET > +#define CONFIG_CMD_MII > +#define CONFIG_CMD_NFS > + > +/* > + * Board NAND Info. > + */ > +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ > + /* to access nand */ > +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ > + /* to access */ > + /* nand at CS0 */ > + > +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ > + /* NAND devices */ > +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ > + > +#define CONFIG_JFFS2_NAND > +/* nand device jffs2 lives on */ > +#define CONFIG_JFFS2_DEV "nand0" > +/* start of jffs2 partition */ > +#define CONFIG_JFFS2_PART_OFFSET 0x680000 > +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ Can SZ_* defines from arch/arm/include/asm/sizes.h be used here? > + > +#define CONFIG_AUTO_COMPLETE > +/* > + * Miscellaneous configurable options > + */ > + > +#define CONFIG_SYS_LONGHELP /* undef to save memory */ > +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ > +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " > +#define CONFIG_CMDLINE_EDITING > +#define CONFIG_AUTO_COMPLETE > +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ > + > +/* Print Buffer Size */ > +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ > + sizeof(CONFIG_SYS_PROMPT) + 16) > +#define CONFIG_SYS_MAXARGS 32 /* max number of command */ > + /* args */ > +/* Boot Argument Buffer Size */ > +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) > +/* memtest works on */ > +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) > +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ > + 0x01F00000) /* 31MB */ > + > +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ > + /* address */ > + > +/* > + * AM3517 has 12 GP timers, they can be driven by the system clock > + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). > + * This rate is divided by a local divisor. > + */ > +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 > +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ > +#define CONFIG_SYS_HZ 1000 > + > +/*----------------------------------------------------------------------- > + * Stack sizes > + * > + * The stack sizes are set up in start.S using the settings below > + */ > +#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ > +#ifdef CONFIG_USE_IRQ > +#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ > +#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ > +#endif These can be removed, as already done in a recent patch from Thomas: http://patchwork.ozlabs.org/patch/127087/ > + > +/*----------------------------------------------------------------------- > + * Physical Memory Map > + */ > +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ > +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 > +#define PHYS_SDRAM_1_SIZE (32 << 20) /*@least 32 MiB */ > +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 > + > +/* SDRAM Bank Allocation method */ > +/* TODO : Check */ > +/* #define SDRC_R_B_C 1 */ This is also, removed by a patch from Thomas: http://patchwork.ozlabs.org/patch/127145/ > + > +/*----------------------------------------------------------------------- > + * FLASH and environment organization > + */ > + > +/* **** PISMO SUPPORT *** */ > + > +/* Configure the PISMO */ > +#define PISMO1_NAND_SIZE GPMC_SIZE_128M > + > +#define CONFIG_NAND_OMAP_GPMC > +#define GPMC_NAND_ECC_LP_x16_LAYOUT > +#define CONFIG_ENV_IS_IN_NAND > +#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ > + > +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ > +#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET > +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET > + > +/*----------------------------------------------------------------------- > + * CFI FLASH driver setup > + */ > +/* timeout values are in ticks */ > +#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) > +#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) > + > +/* Flash banks JFFS2 should use */ > +#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ > + CONFIG_SYS_MAX_NAND_DEVICE) > +#define CONFIG_SYS_JFFS2_MEM_NAND > +/* use flash_info[2] */ > +#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS > +#define CONFIG_SYS_JFFS2_NUM_BANKS 1 > + > +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 > +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 > +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 > +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ > + CONFIG_SYS_INIT_RAM_SIZE - \ > + GENERATED_GBL_DATA_SIZE) > + > +/* > + * ethernet support > + * > + */ > +#if defined(CONFIG_CMD_NET) > +#define CONFIG_DRIVER_TI_EMAC > +#define CONFIG_DRIVER_TI_EMAC_USE_RMII > +#define CONFIG_MII > +#define CONFIG_EMAC_MDIO_PHY_NUM 0 > +#define CONFIG_BOOTP_DEFAULT Can this be aligned with all the others? > +#define CONFIG_BOOTP_DNS > +#define CONFIG_BOOTP_DNS2 > +#define CONFIG_BOOTP_SEND_HOSTNAME > +#define CONFIG_NET_RETRY_COUNT 10 > +#define CONFIG_NET_MULTI > + > +#endif > + > +/* Defines for SPL */ > +#define CONFIG_SPL > +#define CONFIG_SPL_CONSOLE > +#define CONFIG_SPL_NAND_SIMPLE > +#define CONFIG_SPL_NAND_SOFTECC > +#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ > + > +#define CONFIG_SPL_LIBCOMMON_SUPPORT > +#define CONFIG_SPL_LIBDISK_SUPPORT > +#define CONFIG_SPL_I2C_SUPPORT > +#define CONFIG_SPL_LIBGENERIC_SUPPORT > +#define CONFIG_SPL_SERIAL_SUPPORT > +#define CONFIG_SPL_POWER_SUPPORT > +#define CONFIG_SPL_NAND_SUPPORT > +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" > + > +#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ > +#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ > +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK > + > +#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 > +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 > +#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ > +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 > + > +/* NAND boot config */ > +#define CONFIG_SYS_NAND_PAGE_COUNT 64 > +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 > +#define CONFIG_SYS_NAND_OOBSIZE 64 > +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) Can this have a spaces around the '*' operator? > +#define CONFIG_SYS_NAND_5_ADDR_CYCLE > +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 > +#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ > + 48, 49, 50, 51, 52, 53, 54, 55,\ > + 56, 57, 58, 59, 60, 61, 62, 63} > +#define CONFIG_SYS_NAND_ECCSIZE 256 > +#define CONFIG_SYS_NAND_ECCBYTES 3 > + > +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ > + CONFIG_SYS_NAND_ECCSIZE) > +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ > + CONFIG_SYS_NAND_ECCSTEPS) > + > +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE Here (and in some more places) you have spaces for alignment. > + > +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 > +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 > + > +#endif /* __TAM3517_H */ -- Regards, Igor. ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-23 12:44 ` Igor Grinberg @ 2011-11-23 13:08 ` Stefano Babic 2011-11-23 16:11 ` Wolfgang Denk 1 sibling, 0 replies; 42+ messages in thread From: Stefano Babic @ 2011-11-23 13:08 UTC (permalink / raw) To: u-boot On 23/11/2011 13:44, Igor Grinberg wrote: > Hi Stefano, Hi Igor, >> +/* >> + * NS16550 Configuration >> + */ >> +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ >> + >> +#define CONFIG_SYS_NS16550 >> +#define CONFIG_SYS_NS16550_SERIAL >> +#define CONFIG_SYS_NS16550_REG_SIZE (-4) >> +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK > > Can this be inlined? instead of defining the define... Yes, I will do it. >> +#define CONFIG_OMAP_EHCI_PHY1_RESET 25 > > The latest patch from Ilya makes it: > CONFIG_OMAP_EHCI_PHY1_RESET_GPIO Ok, thanks, I will fix it. >> + >> +#define CONFIG_JFFS2_NAND >> +/* nand device jffs2 lives on */ >> +#define CONFIG_JFFS2_DEV "nand0" >> +/* start of jffs2 partition */ >> +#define CONFIG_JFFS2_PART_OFFSET 0x680000 >> +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ > > Can SZ_* defines from arch/arm/include/asm/sizes.h be used here? I will drop the JFFS2 at all. If a JFFS2 is required, this should be not put in this common file, but in the board specific file. >> +#ifdef CONFIG_USE_IRQ >> +#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ >> +#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ >> +#endif > > These can be removed, as already done in a recent patch from Thomas: > http://patchwork.ozlabs.org/patch/127087/ Thanks, I will do it. >> +/* SDRAM Bank Allocation method */ >> +/* TODO : Check */ >> +/* #define SDRC_R_B_C 1 */ > > This is also, removed by a patch from Thomas: > http://patchwork.ozlabs.org/patch/127145/ Ok ! >> +#define CONFIG_MII >> +#define CONFIG_EMAC_MDIO_PHY_NUM 0 >> +#define CONFIG_BOOTP_DEFAULT > > Can this be aligned with all the others? Yes, of course. >> +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ >> + CONFIG_SYS_NAND_ECCSTEPS) >> + >> +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE > > Here (and in some more places) you have spaces for alignment. I will recheck, thanks. best regards, Stefano babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-23 12:44 ` Igor Grinberg 2011-11-23 13:08 ` Stefano Babic @ 2011-11-23 16:11 ` Wolfgang Denk 2011-11-23 16:29 ` Igor Grinberg 1 sibling, 1 reply; 42+ messages in thread From: Wolfgang Denk @ 2011-11-23 16:11 UTC (permalink / raw) To: u-boot Dear Igor Grinberg, In message <4ECCEAA3.7060004@compulab.co.il> you wrote: > ... > > +#define CONFIG_JFFS2_PART_OFFSET 0x680000 > > +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ > > Can SZ_* defines from arch/arm/include/asm/sizes.h be used here? No, they cannot ;-) I always discourage use of this stuff, just never found enough time to expunge all such occurrances. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Program maintenance is an entropy-increasing process, and even its most skilfull execution only delays the subsidence of the system into unfixable obsolescence. - Fred Brooks, "The Mythical Man Month" ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-23 16:11 ` Wolfgang Denk @ 2011-11-23 16:29 ` Igor Grinberg 0 siblings, 0 replies; 42+ messages in thread From: Igor Grinberg @ 2011-11-23 16:29 UTC (permalink / raw) To: u-boot Hi Wolfgang, On 11/23/11 18:11, Wolfgang Denk wrote: > Dear Igor Grinberg, > > In message <4ECCEAA3.7060004@compulab.co.il> you wrote: >> > ... >>> +#define CONFIG_JFFS2_PART_OFFSET 0x680000 >>> +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ >> >> Can SZ_* defines from arch/arm/include/asm/sizes.h be used here? > > No, they cannot ;-) > > I always discourage use of this stuff, just never found enough time to > expunge all such occurrances. Ok. Just curious, what is the reason for discouraging the use of those? -- Regards, Igor. ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-23 9:26 ` [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Stefano Babic 2011-11-23 12:44 ` Igor Grinberg @ 2011-11-23 16:21 ` Wolfgang Denk 2011-11-24 2:47 ` Tom Rini 2011-11-24 9:07 ` Stefano Babic 2011-12-01 9:56 ` [U-Boot] [PATCH V3 " Stefano Babic 2 siblings, 2 replies; 42+ messages in thread From: Wolfgang Denk @ 2011-11-23 16:21 UTC (permalink / raw) To: u-boot Dear Stefano Babic, In message <1322040416-11751-2-git-send-email-sbabic@denx.de> you wrote: > The TAM3517 is a SOM module that can be used on custom boards. > The patch add a common configuration file that is included > by the boards using this module. > > Signed-off-by: Stefano Babic <sbabic@denx.de> > CC: Tapani Utrianen <tapani@technexion.com> > CC: Tom Rini <tom.rini@gmail.com> > CC: Sandeep Paulraj <s-paulraj@ti.com> > --- > include/configs/tam3517-common.h | 334 ++++++++++++++++++++++++++++++++++++++ > 1 files changed, 334 insertions(+), 0 deletions(-) > create mode 100644 include/configs/tam3517-common.h ... > +#define CONFIG_CMD_EXT2 /* EXT2 Support */ > +#define CONFIG_CMD_FAT /* FAT support */ > +#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ > + > +#define CONFIG_CMD_I2C /* I2C serial bus support */ > +#define CONFIG_CMD_MMC /* MMC support */ > +#define CONFIG_CMD_FAT /* FAT support */ > +#define CONFIG_CMD_NAND /* NAND support */ > +#define CONFIG_CMD_USB > +#define CONFIG_CMD_DHCP > +#define CONFIG_CMD_PING > +#define CONFIG_CMD_CACHE > +#define CONFIG_CMD_GPIO Maybe you want to sort this list. And eventually remove entries that are defined by default? > +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ > +#undef CONFIG_CMD_IMI /* iminfo */ > +#undef CONFIG_CMD_IMLS /* List all found images */ Is there any good reason to disable the "iminfo" command? > +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ > + /* to access nand */ > +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ Do we really need this double definitions? Please get rid of NAND_BASE. ... > +/* memtest works on */ > +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) > +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ > + 0x01F00000) /* 31MB */ Has this been tested? > +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ > + /* address */ Don't we have any exception vectors or similar in low memory? > +/*----------------------------------------------------------------------- > + * Stack sizes > + * > + * The stack sizes are set up in start.S using the settings below > + */ Incorrect multiline comment style. Please fix globally. > +/* Configure the PISMO */ > +#define PISMO1_NAND_SIZE GPMC_SIZE_128M Don't we auto-detect the size? > +#define CONFIG_ENV_IS_IN_NAND > +#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ > + > +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ > +#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET > +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET Please extend to support redundant environment, plus one or two reserve sectors in case a sector goes bad. > +/*----------------------------------------------------------------------- > + * CFI FLASH driver setup > + */ > +/* timeout values are in ticks */ > +#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) > +#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) This seems bogus, as there is no NOR flash on these devices. > +/* Flash banks JFFS2 should use */ > +#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ > + CONFIG_SYS_MAX_NAND_DEVICE) > +#define CONFIG_SYS_JFFS2_MEM_NAND > +/* use flash_info[2] */ > +#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS > +#define CONFIG_SYS_JFFS2_NUM_BANKS 1 All this probably does not work. > +/* > + * ethernet support > + * Please delete unneeded empty lines like this one. ... > +#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ Urghhh... How do you guarantee this really works, no matter how the image gets linked? > +#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ (45 << 10) would be way easier to read... > +#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ Don't we auto-detect the RAM size? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de You can't evaluate a man by logic alone. -- McCoy, "I, Mudd", stardate 4513.3 ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-23 16:21 ` Wolfgang Denk @ 2011-11-24 2:47 ` Tom Rini 2011-11-24 9:07 ` Stefano Babic 1 sibling, 0 replies; 42+ messages in thread From: Tom Rini @ 2011-11-24 2:47 UTC (permalink / raw) To: u-boot On Wednesday, November 23, 2011, Wolfgang Denk <wd@denx.de> wrote: > Dear Stefano Babic, > > In message <1322040416-11751-2-git-send-email-sbabic@denx.de> you wrote: >> The TAM3517 is a SOM module that can be used on custom boards. >> The patch add a common configuration file that is included >> by the boards using this module. >> >> Signed-off-by: Stefano Babic <sbabic@denx.de> >> CC: Tapani Utrianen <tapani@technexion.com> >> CC: Tom Rini <tom.rini@gmail.com> >> CC: Sandeep Paulraj <s-paulraj@ti.com> >> --- >> include/configs/tam3517-common.h | 334 ++++++++++++++++++++++++++++++++++++++ >> 1 files changed, 334 insertions(+), 0 deletions(-) >> create mode 100644 include/configs/tam3517-common.h > ... >> +#define CONFIG_CMD_EXT2 /* EXT2 Support */ >> +#define CONFIG_CMD_FAT /* FAT support */ >> +#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ >> + >> +#define CONFIG_CMD_I2C /* I2C serial bus support */ >> +#define CONFIG_CMD_MMC /* MMC support */ >> +#define CONFIG_CMD_FAT /* FAT support */ >> +#define CONFIG_CMD_NAND /* NAND support */ >> +#define CONFIG_CMD_USB >> +#define CONFIG_CMD_DHCP >> +#define CONFIG_CMD_PING >> +#define CONFIG_CMD_CACHE >> +#define CONFIG_CMD_GPIO > > Maybe you want to sort this list. And eventually remove entries that > are defined by default? > >> +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ >> +#undef CONFIG_CMD_IMI /* iminfo */ >> +#undef CONFIG_CMD_IMLS /* List all found images */ > > Is there any good reason to disable the "iminfo" command? > >> +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ >> + /* to access nand */ >> +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ > > Do we really need this double definitions? Please get rid of > NAND_BASE. > > ... >> +/* memtest works on */ >> +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) >> +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ >> + 0x01F00000) /* 31MB */ > > Has this been tested? > >> +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ >> + /* address */ > > Don't we have any exception vectors or similar in low memory? All of the above is a copy/paste poor example. I've put some low grade thought into it, and it's on my 2012.03 wish list to have be good, or at least better. >> +/* Configure the PISMO */ >> +#define PISMO1_NAND_SIZE GPMC_SIZE_128M > > Don't we auto-detect the size? In this case (config space stuff iirc), no. But it's also a semi-constant, but I don't have my TRM handy. >> +#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ > > Don't we auto-detect the RAM size? Kinda? We have a few cases: - all board revs have the same size, just code. It - a few board revs, and we can tell rev a from b, so hard code that way We don't have a "ROM says..." like some other platforms. -- Tom -- Tom ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-23 16:21 ` Wolfgang Denk 2011-11-24 2:47 ` Tom Rini @ 2011-11-24 9:07 ` Stefano Babic 2011-11-24 12:07 ` Wolfgang Denk 1 sibling, 1 reply; 42+ messages in thread From: Stefano Babic @ 2011-11-24 9:07 UTC (permalink / raw) To: u-boot On 23/11/2011 17:21, Wolfgang Denk wrote: >> +#define CONFIG_CMD_I2C /* I2C serial bus support */ >> +#define CONFIG_CMD_MMC /* MMC support */ >> +#define CONFIG_CMD_FAT /* FAT support */ >> +#define CONFIG_CMD_NAND /* NAND support */ >> +#define CONFIG_CMD_USB >> +#define CONFIG_CMD_DHCP >> +#define CONFIG_CMD_PING >> +#define CONFIG_CMD_CACHE >> +#define CONFIG_CMD_GPIO > > Maybe you want to sort this list. And eventually remove entries that > are defined by default? I will do it > >> +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ >> +#undef CONFIG_CMD_IMI /* iminfo */ >> +#undef CONFIG_CMD_IMLS /* List all found images */ > > Is there any good reason to disable the "iminfo" command? Yes - the command relies on NOR flash. In fact, in cmd_bootm.c do_imls() needs CONFIG_SYS_MAX_FLASH_BANKS, that has no sense on this SOM, because I have not CFI flash. Also defining CONFIG_SYS_MAX_FLASH_BANKS does not work, because cfi.h is still included. I prefer disabling IMLS as adding fake CFI values. > >> +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ >> + /* to access nand */ >> +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ > > Do we really need this double definitions? Please get rid of > NAND_BASE. NAND_BASE is the address of the controller defined in cpu.h. That iis correct. CONFIG_SYS_NAND_ADDR seems to me obsolete and not used anymore - a lot of boards define it, I think it should be globally removed - I start dropping from here. > > ... >> +/* memtest works on */ >> +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) >> +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ >> + 0x01F00000) /* 31MB */ > > Has this been tested? Yes - the only issue here is that only 31 MB (the SOM has 256 MB RAM) are tested as default. Personally I do not like to set as default value the whole RAM (subtracting the size of the bootloader code, of course !), because the test takes too much time for a fast run. The user can always provide parameters for the mtest command if he wants to test the whole RAM. >> +/*----------------------------------------------------------------------- >> + * Stack sizes >> + * >> + * The stack sizes are set up in start.S using the settings below >> + */ > > Incorrect multiline comment style. Please fix globally. Thanks, I will fix it. >> +#define CONFIG_ENV_IS_IN_NAND >> +#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ >> + >> +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ >> +#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET >> +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET > > Please extend to support redundant environment, plus one or two > reserve sectors in case a sector goes bad. Good point, I will do it. > >> +/*----------------------------------------------------------------------- >> + * CFI FLASH driver setup >> + */ >> +/* timeout values are in ticks */ >> +#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) >> +#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) > > This seems bogus, as there is no NOR flash on these devices. This is completely wrong, bad cut&paste ;-(. I will fix it. > >> +/* Flash banks JFFS2 should use */ >> +#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ >> + CONFIG_SYS_MAX_NAND_DEVICE) >> +#define CONFIG_SYS_JFFS2_MEM_NAND >> +/* use flash_info[2] */ >> +#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS >> +#define CONFIG_SYS_JFFS2_NUM_BANKS 1 > > All this probably does not work. Confirmed, it does not work and I will clean up. >> +#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ > > (45 << 10) would be way easier to read... ok Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-24 9:07 ` Stefano Babic @ 2011-11-24 12:07 ` Wolfgang Denk 0 siblings, 0 replies; 42+ messages in thread From: Wolfgang Denk @ 2011-11-24 12:07 UTC (permalink / raw) To: u-boot Dear Stefano Babic, In message <4ECE095D.4040700@denx.de> you wrote: > > >> +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ > >> +#undef CONFIG_CMD_IMI /* iminfo */ > >> +#undef CONFIG_CMD_IMLS /* List all found images */ > > > > Is there any good reason to disable the "iminfo" command? > > Yes - the command relies on NOR flash. In fact, in cmd_bootm.c do_imls() > needs CONFIG_SYS_MAX_FLASH_BANKS, that has no sense on this SOM, because > I have not CFI flash. I was referring to "iminfo", not to "imls". > NAND_BASE is the address of the controller defined in cpu.h. That iis > correct. Arrgh.. I see. > CONFIG_SYS_NAND_ADDR seems to me obsolete and not used anymore - a lot > of boards define it, I think it should be globally removed - I start > dropping from here. Thanks. I think after doing this, we should then rename NAND_BASE into CONFIG_SYS_NAND_ADDR. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de There are bugs and then there are bugs. And then there are bugs. - Karl Lehenbauer ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V3 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-23 9:26 ` [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Stefano Babic 2011-11-23 12:44 ` Igor Grinberg 2011-11-23 16:21 ` Wolfgang Denk @ 2011-12-01 9:56 ` Stefano Babic 2011-12-01 9:56 ` [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic 2011-12-05 23:31 ` [U-Boot] [PATCH V3 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Tom Rini 2 siblings, 2 replies; 42+ messages in thread From: Stefano Babic @ 2011-12-01 9:56 UTC (permalink / raw) To: u-boot The TAM3517 is a SOM module that can be used on custom boards. The patch add a common configuration file that is included by the boards using this module. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tapani Utrianen <tapani@technexion.com> CC: Tom Rini <tom.rini@gmail.com> CC: Sandeep Paulraj <s-paulraj@ti.com> --- Changes since V2: - Move xstr define into common configuration file (Wolfgang Denk) Changes since V1: - CONFIG_OMAP_EHCI_PHY1_RESET_GPIO (Igor Grinberg) - Used inline instead of adding unuseful defines - rebased on latest posted patches for AM3517 - drop mixing of space an tabs (Igor Grinberg) - move default environment into the common file - sort lists (W. Denk) - do not remove CONFIG_CMD_IMI (W. Denk) - drop CONFIG_SYS_NAND_ADDR (W. Denk) - coding styles (several comments) - add redundant environment (W. Denk) - drop completely CFI setup (W. Denk) include/configs/tam3517-common.h | 361 ++++++++++++++++++++++++++++++++++++++ 1 files changed, 361 insertions(+), 0 deletions(-) create mode 100644 include/configs/tam3517-common.h diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h new file mode 100644 index 0000000..817d468 --- /dev/null +++ b/include/configs/tam3517-common.h @@ -0,0 +1,361 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. + * + * Copyright (C) 2009 TechNexion Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef __TAM3517_H +#define __TAM3517_H + +/* + * High Level Configuration Options + */ +#define CONFIG_OMAP /* in a TI OMAP core */ +#define CONFIG_OMAP34XX /* which is a 34XX */ + +#define CONFIG_SYS_TEXT_BASE 0x80008000 + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#define CONFIG_EMIF4 /* The chip has EMIF4 controller */ + +#include <asm/arch/cpu.h> /* get chip and board defs */ +#include <asm/arch/omap3.h> + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#undef CONFIG_USE_IRQ /* no support for IRQs */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ + 2 * 1024 * 1024) +/* + * DDR related + */ +#define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */ +#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) + +/* + * Hardware drivers + */ + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 +#define CONFIG_SERIAL1 /* UART1 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ + 115200} +#define CONFIG_MMC +#define CONFIG_OMAP_HSMMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DOS_PARTITION + +/* EHCI */ +#define CONFIG_OMAP3_GPIO_5 +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_OMAP +#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 +#define CONFIG_USB_STORAGE + +/* #define CONFIG_EHCI_DCACHE */ + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_GPIO +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MII +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_NET +#define CONFIG_CMD_NFS +#define CONFIG_CMD_NAND /* NAND support */ +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +#undef CONFIG_CMD_FLASH /* only NAND on the SOM */ +#undef CONFIG_CMD_IMLS + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C + + +/* + * Board NAND Info. + */ +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ + /* to access */ + /* nand at CS0 */ + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ + /* NAND devices */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + +#define CONFIG_AUTO_COMPLETE + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 32 /* max number of command */ + /* args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ + /* address */ + +/* + * AM3517 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/* + * Stack sizes + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE (32 << 20) /*@least 32 MiB */ +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* + * FLASH and environment organization + */ + +/* **** PISMO SUPPORT *** */ + +/* Configure the PISMO */ +#define PISMO1_NAND_SIZE GPMC_SIZE_128M + +#define CONFIG_NAND_OMAP_GPMC +#define GPMC_NAND_ECC_LP_x16_LAYOUT +#define CONFIG_ENV_IS_IN_NAND +#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ + +/* Redundant Environment */ +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ +#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + 2 * CONFIG_SYS_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +/* + * ethernet support, EMAC + * + */ +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_DRIVER_TI_EMAC_USE_RMII +#define CONFIG_MII +#define CONFIG_EMAC_MDIO_PHY_NUM 0 +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI + +/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_CONSOLE +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_NAND_SOFTECC +#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ +#define CONFIG_SPL_MAX_SIZE (45 << 10) /* 45 K */ +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK + +#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 +#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 + +/* NAND boot config */ +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ + 48, 49, 50, 51, 52, 53, 54, 55,\ + 56, 57, 58, 59, 60, 61, 62, 63} +#define CONFIG_SYS_NAND_ECCSIZE 256 +#define CONFIG_SYS_NAND_ECCBYTES 3 + +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ + CONFIG_SYS_NAND_ECCSIZE) +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 + +#define CONFIG_OF_LIBFDT +#define CONFIG_FIT +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_CMD_MTDPARTS + +/* Setup MTD for NAND on the SOM */ +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ + "512k(u-boot),128k(env1)," \ + "128k(env2),6m(kernel),-(rootfs)" + +#define xstr(s) str(s) +#define str(s) #s + +#define CONFIG_TAM3517_SETTINGS \ + "netdev=eth0\0" \ + "nandargs=setenv bootargs root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip_sta=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ + "addip=if test -n ${ipdyn};then run addip_dyn;" \ + "else run addip_sta;fi\0" \ + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "addtty=setenv bootargs ${bootargs}" \ + " console=ttyO0,${baudrate}\0" \ + "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ + "loadaddr=82000000\0" \ + "kernel_addr_r=82000000\0" \ + "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ + "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ + "flash_self=run ramargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr}\0" \ + "nandboot=run nandargs addip addtty addmtd addmisc;" \ + "nand read ${kernel_addr_r} kernel\0" \ + "bootm ${kernel_addr_r}\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ + "run nfsargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr_r}\0" \ + "net_self=if run net_self_load;then " \ + "run ramargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ + "else echo Images not loades;fi\0" \ + "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.img\0" \ + "load=tftp ${loadaddr} ${u-boot}\0" \ + "loadmlo=tftp ${loadaddr} ${mlo}\0" \ + "mlo=" xstr(CONFIG_HOSTNAME) "/MLO\0" \ + "uboot_addr=0x80000\0" \ + "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ + "nand write ${loadaddr} ${uboot_addr} 80000\0" \ + "updatemlo=nandecc hw;nand erase 0 20000;" \ + "nand write ${loadaddr} 0 20000\0" \ + "upd=if run load;then echo Updating u-boot;if run update;" \ + "then echo U-Boot updated;" \ + "else echo Error updating u-boot !;" \ + "echo Board without bootloader !!;" \ + "fi;" \ + "else echo U-Boot not downloaded..exiting;fi\0" \ + +#endif /* __TAM3517_H */ -- 1.7.5.4 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board 2011-12-01 9:56 ` [U-Boot] [PATCH V3 " Stefano Babic @ 2011-12-01 9:56 ` Stefano Babic 2012-01-14 8:47 ` Albert ARIBAUD 2011-12-05 23:31 ` [U-Boot] [PATCH V3 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Tom Rini 1 sibling, 1 reply; 42+ messages in thread From: Stefano Babic @ 2011-12-01 9:56 UTC (permalink / raw) To: u-boot The twister board is a development board using the TAM3517 SOM. Support for NAND, 2 Ethernet (EMAC and SMC911), USB (EHCI_OMAP). Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tapani Utrianen <tapani@technexion.com> CC: Tom Rini <tom.rini@gmail.com> CC: Sandeep Paulraj <s-paulraj@ti.com> --- Changes since V2: - drop GENERIC_MMC because already included by OMAP_HSMMC (Tom Rini) Changes since V1: - drop unuseful comments (W. Denk) - drop postal address (globally) from headers - enable_gpmc_cs_config() to set chip select (Igor Grinberg) - drop unneeded #ifdef (W. Denk) MAINTAINERS | 1 + board/technexion/twister/Makefile | 38 ++++ board/technexion/twister/twister.c | 116 ++++++++++ board/technexion/twister/twister.h | 411 ++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/twister.h | 54 +++++ 6 files changed, 621 insertions(+), 0 deletions(-) create mode 100644 board/technexion/twister/Makefile create mode 100644 board/technexion/twister/twister.c create mode 100644 board/technexion/twister/twister.h create mode 100644 include/configs/twister.h diff --git a/MAINTAINERS b/MAINTAINERS index fdc1a53..4e3246d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -562,6 +562,7 @@ Stefano Babic <sbabic@denx.de> mx51evk i.MX51 polaris xscale/pxa trizepsiv xscale/pxa + twister omap3 vision2 i.MX51 Jason Liu <r64343@freescale.com> diff --git a/board/technexion/twister/Makefile b/board/technexion/twister/Makefile new file mode 100644 index 0000000..38b7b14 --- /dev/null +++ b/board/technexion/twister/Makefile @@ -0,0 +1,38 @@ +# +# Copyright (C) 2011 Ilya Yanok, Emcraft Systems +# +# Based on ti/evm/Makefile +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c new file mode 100644 index 0000000..06fac7b --- /dev/null +++ b/board/technexion/twister/twister.c @@ -0,0 +1,116 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. + * + * Copyright (C) 2009 TechNexion Ltd. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <netdev.h> +#include <asm/io.h> +#include <asm/arch/mem.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/omap_gpio.h> +#include <asm/arch/mmc_host_def.h> +#include <i2c.h> +#include <asm/gpio.h> +#include "twister.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* Timing definitions for Ethernet Controller */ +static const u32 gpmc_smc911[] = { + NET_GPMC_CONFIG1, + NET_GPMC_CONFIG2, + NET_GPMC_CONFIG3, + NET_GPMC_CONFIG4, + NET_GPMC_CONFIG5, + NET_GPMC_CONFIG6, +}; + +static const u32 gpmc_XR16L2751[] = { + XR16L2751_GPMC_CONFIG1, + XR16L2751_GPMC_CONFIG2, + XR16L2751_GPMC_CONFIG3, + XR16L2751_GPMC_CONFIG4, + XR16L2751_GPMC_CONFIG5, + XR16L2751_GPMC_CONFIG6, +}; + +int board_init(void) +{ + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ + + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + + /* Chip select 1 and 3 are used for XR16L2751 UART controller */ + enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[1], + XR16L2751_UART1_BASE, GPMC_SIZE_16M); + + enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[3], + XR16L2751_UART2_BASE, GPMC_SIZE_16M); + + gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB_PHY1_RESET"); + gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1); + + return 0; +} + +int misc_init_r(void) +{ + dieid_num_r(); + + return 0; +} + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +void set_muxconf_regs(void) +{ + MUX_TWISTER(); +} + +int board_eth_init(bd_t *bis) +{ + davinci_emac_initialize(); + + /* init cs for extern lan */ + enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5], + CONFIG_SMC911X_BASE, GPMC_SIZE_16M); + if (smc911x_initialize(0, CONFIG_SMC911X_BASE) <= 0) + printf("\nError initializing SMC911x controlleri\n"); + + return 0; +} + +#if defined(CONFIG_OMAP_HSMMC) && \ + !defined(CONFIG_SPL_BUILD) +int board_mmc_init(bd_t *bis) +{ + return omap_mmc_init(0); +} +#endif diff --git a/board/technexion/twister/twister.h b/board/technexion/twister/twister.h new file mode 100644 index 0000000..a2051c0 --- /dev/null +++ b/board/technexion/twister/twister.h @@ -0,0 +1,411 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. + * + * Copyright (C) 2010 TechNexion Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef _TAM3517_H_ +#define _TAM3517_H_ + +const omap3_sysinfo sysinfo = { + DDR_DISCRETE, + "TAM3517 TWISTER Board", + "NAND", +}; + +#define XR16L2751_GPMC_CONFIG1 0x00000000 +#define XR16L2751_GPMC_CONFIG2 0x001e1e01 +#define XR16L2751_GPMC_CONFIG3 0x00080300 +#define XR16L2751_GPMC_CONFIG4 0x1c091c09 +#define XR16L2751_GPMC_CONFIG5 0x04181f1f +#define XR16L2751_GPMC_CONFIG6 0x00000FCF + +#define XR16L2751_UART1_BASE 0x21000000 +#define XR16L2751_UART2_BASE 0x23000000 + + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ +#define MUX_TWISTER() \ + /* SDRC */\ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS0N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_DQS1N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_DQS2N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_DQS3N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_CKE0), (M0)) \ + MUX_VAL(CP(SDRC_CKE1), (M0)) \ + MUX_VAL(CP(STRBEN_DLY0), (IEN | PTD | EN | M0)) \ + /*sdrc_strben_dly0*/\ + MUX_VAL(CP(STRBEN_DLY1), (IEN | PTD | EN | M0)) \ + /*sdrc_strben_dly1*/\ + /* GPMC */\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS1), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTD | EN | M2)) /*PWM9*/\ + MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS4), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS6), (IDIS | PTD | EN | M3)) /*PWM11*/ \ + MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | EN | M4)) /*GPIO_58*/ \ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) \ + /* DSS */\ + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \ + /* CAMERA */\ + MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ + MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ + MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) \ + /* MMC */\ + MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(MMC1_CMD), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M4)) \ + /* CardDetect */\ + MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) \ + \ + MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(MMC2_CMD), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTU | EN | M4)) \ + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | EN | M4)) \ + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) \ + MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) \ + /* McBSP */\ + MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) \ + \ + MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | EN | M4)) /*GPIO_116*/ \ + MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(MCBSP2_DX), (IEN | PTD | EN | M4)) \ + \ + MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MCBSP3_FSX), (IEN | PTU | EN | M4)) \ + \ + MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_152*/\ + MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) /*GPIO_153*/\ + MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M4)) /*GPIO_154*/\ + MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M4)) /*GPIO_155*/\ + /* UART */\ + MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(UART1_RTS), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(UART1_CTS), (IEN | PTU | EN | M4)) \ + \ + MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) \ + \ + MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M4)) /*GPIO_163*/ \ + MUX_VAL(CP(UART3_RTS_SD), (IEN | PTD | DIS | M4)) /*GPIO_164*/\ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) \ + /* I2C */\ + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) \ + /* McSPI */\ + MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)) /*GPIO_175*/\ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | EN | M4)) /*GPIO_176*/\ + MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M4)) \ + \ + MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M4)) \ + /* CCDC */\ + MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CCDC_FIELD), (IEN | PTD | DIS | M1)) \ + MUX_VAL(CP(CCDC_HD), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CCDC_VD), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CCDC_WEN), (IEN | PTD | DIS | M1)) \ + MUX_VAL(CP(CCDC_DATA0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | DIS | M0)) \ + /* RMII */\ + MUX_VAL(CP(RMII_MDIO_DATA), (IEN | M0)) \ + MUX_VAL(CP(RMII_MDIO_CLK), (M0)) \ + MUX_VAL(CP(RMII_RXD0) , (IEN | PTD | M0)) \ + MUX_VAL(CP(RMII_RXD1), (IEN | PTD | M0)) \ + MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | M0)) \ + MUX_VAL(CP(RMII_RXER), (PTD | M0)) \ + MUX_VAL(CP(RMII_TXD0), (PTD | M0)) \ + MUX_VAL(CP(RMII_TXD1), (PTD | M0)) \ + MUX_VAL(CP(RMII_TXEN), (PTD | M0)) \ + MUX_VAL(CP(RMII_50MHZ_CLK), (IEN | PTD | EN | M0)) \ + /* HECC */\ + MUX_VAL(CP(HECC1_TXD), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(HECC1_RXD), (IEN | PTU | EN | M0)) \ + /* HSUSB */\ + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0)) \ + /* HDQ */\ + MUX_VAL(CP(HDQ_SIO), (IEN | PTD | EN | M4)) \ + /* Control and debug */\ + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(SYS_NRESWARM), (IDIS | PTU | DIS | M4)) \ + /* - GPIO30 */\ + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4*/\ + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\ + /* - VIO_1V8*/\ + MUX_VAL(CP(SYS_BOOT7), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SYS_BOOT8), (IEN | PTD | EN | M0)) \ + \ + MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)) \ + /* JTAG */\ + MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_EMU0), (IDIS | PTD | EN | M4)) /*GPIO_11*/ \ + MUX_VAL(CP(JTAG_EMU1), (IDIS | PTD | EN | M4)) /*GPIO_31*/ \ + /* ETK (ES2 onwards) */\ + MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTD | DIS | M3)) \ + /* hsusb1_stp */ \ + MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M3)) \ + /* hsusb1_clk */\ + MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D1_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | EN | M3)) \ + /* hsusb1_dir */\ + MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | EN | M3)) \ + /* hsusb1_nxt */\ + MUX_VAL(CP(ETK_D10_ES2), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M4)) \ + MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M4)) \ + MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M4)) \ + MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M4)) \ + /* Die to Die */\ + MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) \ + +#endif diff --git a/boards.cfg b/boards.cfg index 11ef60b..7826e29 100644 --- a/boards.cfg +++ b/boards.cfg @@ -195,6 +195,7 @@ omap3_evm_quick_nand arm armv7 evm ti omap3_sdp3430 arm armv7 sdp3430 ti omap3 devkit8000 arm armv7 devkit8000 timll omap3 mcx arm armv7 mcx htkw omap3 +twister arm armv7 twister technexion omap3 omap4_panda arm armv7 panda ti omap4 omap4_sdp4430 arm armv7 sdp4430 ti omap4 omap5_evm arm armv7 omap5_evm ti omap5 diff --git a/include/configs/twister.h b/include/configs/twister.h new file mode 100644 index 0000000..64a886d --- /dev/null +++ b/include/configs/twister.h @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * Copyright (C) 2009 TechNexion Ltd. + * + * Configuration for the Technexion twister board. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "tam3517-common.h" + +#define MACH_TYPE_TAM3517 2818 +#define CONFIG_MACH_TYPE MACH_TYPE_TAM3517 + +#define CONFIG_TAM3517_SW3_SETTINGS +#define CONFIG_XR16L2751 + +#define CONFIG_BOOTDELAY 10 + +#define CONFIG_BOOTFILE "uImage" + +#define CONFIG_HOSTNAME twister + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_PROMPT "twister => " + +#define CONFIG_SMC911X +#define CONFIG_SMC911X_16_BIT +#define CONFIG_SMC911X_BASE 0x2C000000 +#define CONFIG_SMC911X_NO_EEPROM + +#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \ + "bootcmd=run nandboot\0" + +#endif /* __CONFIG_H */ -- 1.7.5.4 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board 2011-12-01 9:56 ` [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic @ 2012-01-14 8:47 ` Albert ARIBAUD 2012-01-14 9:48 ` Stefano Babic 2012-01-14 14:25 ` Tom Rini 0 siblings, 2 replies; 42+ messages in thread From: Albert ARIBAUD @ 2012-01-14 8:47 UTC (permalink / raw) To: u-boot (re-sent due to the U-Boot MX rejecting my provider's servers -- again) Hi Stefano, Le 01/12/2011 10:56, Stefano Babic a ?crit : > The twister board is a development board using > the TAM3517 SOM. I see this match made it in IMX then ARM, but it seems not to build here either with ELDK 4.2 or linaro (Ubuntu) cross tool chains: > Configuring for twister board... > omap_gpmc.c:33:30: attention : ?hw_nand_oob? defined but not used [-Wunused-variable] > omap_gpmc.c:78:13: attention : ?omap_hwecc_init? defined but not used [-Wunused-function] > omap_gpmc.c:116:12: attention : ?omap_correct_data? defined but not used [-Wunused-function] > omap_gpmc.c:182:12: attention : ?omap_calculate_ecc? defined but not used [-Wunused-function] > omap_gpmc.c:208:13: attention : ?omap_enable_hwecc? defined but not used [-Wunused-function] > drivers/usb/host/libusb_host.o: In function `usb_lowlevel_stop': > /home/uboot/src/u-boot-arm/drivers/usb/host/ehci-hcd.c:806: undefined reference to `ehci_hcd_stop' > drivers/usb/host/libusb_host.o: In function `usb_lowlevel_init': > /home/uboot/src/u-boot-arm/drivers/usb/host/ehci-hcd.c:814: undefined reference to `ehci_hcd_init' > arm-linux-gnueabi-ld: BFD (GNU Binutils for Ubuntu) 2.21.53.20110810 assertion fail ../../bfd/elf32-arm.c:7498 > arm-linux-gnueabi-ld: BFD (GNU Binutils for Ubuntu) 2.21.53.20110810 assertion fail ../../bfd/elf32-arm.c:7498 > arm-linux-gnueabi-ld: BFD (GNU Binutils for Ubuntu) 2.21.53.20110810 assertion fail ../../bfd/elf32-arm.c:13828 > /bin/sh : ligne 1 : 23855 Erreur de segmentation arm-linux-gnueabi-ld -pie -T u-boot.lds -Bstatic -Ttext 0x80008000 $UNDEF_SYM arch/arm/cpu/armv7/start.o --start-group api/libapi.o arch/arm/cpu/armv7/libarmv7.o arch/arm/cpu/armv7/omap-common/libomap-common.o arch/arm/cpu/armv7/omap3/libomap3.o arch/arm/lib/libarm.o common/libcommon.o disk/libdisk.o drivers/bios_emulator/libatibiosemu.o drivers/block/libblock.o drivers/dma/libdma.o drivers/fpga/libfpga.o drivers/gpio/libgpio.o drivers/hwmon/libhwmon.o drivers/i2c/libi2c.o drivers/input/libinput.o drivers/misc/libmisc.o drivers/mmc/libmmc.o drivers/mtd/libmtd.o drivers/mtd/nand/libnand.o drivers/mtd/onenand/libonenand.o drivers/mtd/spi/libspi_flash.o drivers/mtd/ubi/libubi.o drivers/net/libnet.o drivers/net/phy/libphy.o drivers/pci/libpci.o drivers/pcmcia/libpcmcia.o drivers/power/libpower.o drivers/rtc/librtc.o drivers/serial/libserial.o drivers/spi/libspi.o drivers/twserial/libtws.o drivers/usb/eth/libusb_eth.o drivers/usb /gadget/libusb_gadget.o drivers/usb/host/libusb_host.o drivers/usb/musb/libusb_musb.o drivers/usb/phy/libusb_phy.o drivers/usb/ulpi/libusb_ulpi.o drivers/video/libvideo.o drivers/watchdog/libwatchdog.o fs/cramfs/libcramfs.o fs/ext2/libext2fs.o fs/fat/libfat.o fs/fdos/libfdos.o fs/jffs2/libjffs2.o fs/reiserfs/libreiserfs.o fs/ubifs/libubifs.o fs/yaffs2/libyaffs2.o lib/libfdt/libfdt.o lib/libgeneric.o lib/lzma/liblzma.o lib/lzo/liblzo.o lib/zlib/libz.o net/libnet.o post/libpost.o board/technexion/twister/libtwister.o --end-group /home/uboot/src/u-boot-arm/arch/arm/lib/eabi_compat.o -L /usr/lib/gcc/arm-linux-gnueabi/4.6.1 -lgcc -Map u-boot.map -o u-boot > make: *** [u-boot] Erreur 139 > make: *** Attente des t?ches non termin?es.... > arm-linux-gnueabi-size: ./u-boot: File format not recognized > > --------------------- SUMMARY ---------------------------- > Boards compiled: 1 > Boards with warnings or errors: 1 ( twister ) > ---------------------------------------------------------- The above was tried on 10a4fa9e22b9677819b3901a87eec05875b346ad (the current u-boot-arm/master, but trying various commits in between it and 92e30c07e02b84a3b63205fcb29ac57defd043f6 (creation of twister), I find no commit where it builds. Stefano, can you have a look at this? Amicalement, -- Albert. ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board 2012-01-14 8:47 ` Albert ARIBAUD @ 2012-01-14 9:48 ` Stefano Babic 2012-01-14 10:06 ` Albert ARIBAUD 2012-01-14 14:25 ` Tom Rini 1 sibling, 1 reply; 42+ messages in thread From: Stefano Babic @ 2012-01-14 9:48 UTC (permalink / raw) To: u-boot On 14/01/2012 09:47, Albert ARIBAUD wrote: > (re-sent due to the U-Boot MX rejecting my provider's servers -- again) > > Hi Stefano, > Hi Albert, hi Tom, >> drivers/usb/host/libusb_host.o: In function `usb_lowlevel_init': >> /home/uboot/src/u-boot-arm/drivers/usb/host/ehci-hcd.c:814: undefined >> reference to `ehci_hcd_init' The twister board depends on several patches for the AM3517 processor previously senty by Ilya Yanok. One of them (maybe because it is USB related and should go into u-boot-usb) is missing. http://patchwork.ozlabs.org/patch/130952/ The patch is set to new and assigned to Remy, but he gived up as maintainer - nobody checks at it ;-(. I can at least sent my tested-by - it was nice if you can pick it up. Best regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board 2012-01-14 9:48 ` Stefano Babic @ 2012-01-14 10:06 ` Albert ARIBAUD 2012-01-14 10:15 ` Stefano Babic 0 siblings, 1 reply; 42+ messages in thread From: Albert ARIBAUD @ 2012-01-14 10:06 UTC (permalink / raw) To: u-boot Hi Stefano, Le 14/01/2012 10:48, Stefano Babic a ?crit : > On 14/01/2012 09:47, Albert ARIBAUD wrote: >> (re-sent due to the U-Boot MX rejecting my provider's servers -- again) >> >> Hi Stefano, >> > > Hi Albert, hi Tom, > >>> drivers/usb/host/libusb_host.o: In function `usb_lowlevel_init': >>> /home/uboot/src/u-boot-arm/drivers/usb/host/ehci-hcd.c:814: undefined >>> reference to `ehci_hcd_init' > > The twister board depends on several patches for the AM3517 processor > previously senty by Ilya Yanok. One of them (maybe because it is USB > related and should go into u-boot-usb) is missing. > > http://patchwork.ozlabs.org/patch/130952/ Board then compiles but with warnings for 4 declared but unused symbols. > The patch is set to new and assigned to Remy, but he gived up as > maintainer - nobody checks at it ;-(. Considering that all it does is adding a new EHCI driver, the worst impact it can have is to not function properly for boards using it, which at the moment means omap3_beagle and tam3517; but it won't affect USB on existing boards. But then I wonder why twister needs it at all, as it does not have a single USB config option in its header config file... > I can at least sent my tested-by - it was nice if you can pick it up. *If* someone can explain to me why a patch that adds a new USB EHCI driver is needed by a board which does not have any "USB" in its config header file, and *unless Wolfgang says otherwise*, I agree to accept patch 130952 with your Tested-By. > Best regards, > Stefano Amicalement, -- Albert. ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board 2012-01-14 10:06 ` Albert ARIBAUD @ 2012-01-14 10:15 ` Stefano Babic 2012-01-14 10:22 ` Albert ARIBAUD 0 siblings, 1 reply; 42+ messages in thread From: Stefano Babic @ 2012-01-14 10:15 UTC (permalink / raw) To: u-boot On 14/01/2012 11:06, Albert ARIBAUD wrote: > > Board then compiles but with warnings for 4 declared but unused symbols. I see also the warnings, they are related to a couple of drivers (NAND). They need a clean-up patch to fix them. > Considering that all it does is adding a new EHCI driver, the worst > impact it can have is to not function properly for boards using it, > which at the moment means omap3_beagle and tam3517; but it won't affect > USB on existing boards. > > But then I wonder why twister needs it at all, as it does not have a > single USB config option in its header config file... Well, that is not true... > >> I can at least sent my tested-by - it was nice if you can pick it up. > > *If* someone can explain to me why a patch that adds a new USB EHCI > driver is needed by a board which does not have any "USB" in its config > header file, I can explain this. The twister board is based on the Technexion TAM3517 SOM. There is a common configuration files for all boards (I have also added a second one) using this module with the TI AM3517 SOC: include/configs/tam3517-common.h Because pins for USB are fixed on the SOM, the USB configuration is made common to all boards. In tam3517-common.h you can find: /* EHCI */ #define CONFIG_OMAP3_GPIO_5 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_OMAP #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 #define CONFIG_USB_STORAGE > and *unless Wolfgang says otherwise*, ..added Wolfgang in CC Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board 2012-01-14 10:15 ` Stefano Babic @ 2012-01-14 10:22 ` Albert ARIBAUD 0 siblings, 0 replies; 42+ messages in thread From: Albert ARIBAUD @ 2012-01-14 10:22 UTC (permalink / raw) To: u-boot Le 14/01/2012 11:15, Stefano Babic a ?crit : > On 14/01/2012 11:06, Albert ARIBAUD wrote: > >> >> Board then compiles but with warnings for 4 declared but unused symbols. > > I see also the warnings, they are related to a couple of drivers (NAND). > They need a clean-up patch to fix them. > >> Considering that all it does is adding a new EHCI driver, the worst >> impact it can have is to not function properly for boards using it, >> which at the moment means omap3_beagle and tam3517; but it won't affect >> USB on existing boards. >> >> But then I wonder why twister needs it at all, as it does not have a >> single USB config option in its header config file... > > Well, that is not true... > >> >>> I can at least sent my tested-by - it was nice if you can pick it up. >> >> *If* someone can explain to me why a patch that adds a new USB EHCI >> driver is needed by a board which does not have any "USB" in its config >> header file, > > I can explain this. The twister board is based on the Technexion TAM3517 > SOM. There is a common configuration files for all boards (I have also > added a second one) using this module with the TI AM3517 SOC: > > include/configs/tam3517-common.h > > Because pins for USB are fixed on the SOM, the USB configuration is made > common to all boards. In tam3517-common.h you can find: > > /* EHCI */ > #define CONFIG_OMAP3_GPIO_5 > #define CONFIG_USB_EHCI > #define CONFIG_USB_EHCI_OMAP > #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 > #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 > #define CONFIG_USB_STORAGE Ok, got it. I had only read the twister entry in boards.cfg and thus I thought twister was 'simple' omap3. So that leaves this: >> and *unless Wolfgang says otherwise*, > > ..added Wolfgang in CC Oops. Thanks. :) > Best regards, > Stefano Babic Amicalement, -- Albert. ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board 2012-01-14 8:47 ` Albert ARIBAUD 2012-01-14 9:48 ` Stefano Babic @ 2012-01-14 14:25 ` Tom Rini 2012-01-14 15:05 ` Stefano Babic 1 sibling, 1 reply; 42+ messages in thread From: Tom Rini @ 2012-01-14 14:25 UTC (permalink / raw) To: u-boot On Sat, Jan 14, 2012 at 1:47 AM, Albert ARIBAUD <albert.u.boot@aribaud.net> wrote: > (re-sent due to the U-Boot MX rejecting my provider's servers -- again) > > Hi Stefano, > > Le 01/12/2011 10:56, Stefano Babic a ?crit : >> >> The twister board is a development board using >> the TAM3517 SOM. > > > I see this match made it in IMX then ARM, but it seems not to build here > either with ELDK 4.2 or linaro (Ubuntu) cross tool chains: > >> Configuring for twister board... >> omap_gpmc.c:33:30: attention : ?hw_nand_oob? defined but not used >> [-Wunused-variable] >> omap_gpmc.c:78:13: attention : ?omap_hwecc_init? defined but not used >> [-Wunused-function] >> omap_gpmc.c:116:12: attention : ?omap_correct_data? defined but not used >> [-Wunused-function] >> omap_gpmc.c:182:12: attention : ?omap_calculate_ecc? defined but not used >> [-Wunused-function] >> omap_gpmc.c:208:13: attention : ?omap_enable_hwecc? defined but not used >> [-Wunused-function] >> drivers/usb/host/libusb_host.o: In function `usb_lowlevel_stop': >> /home/uboot/src/u-boot-arm/drivers/usb/host/ehci-hcd.c:806: undefined >> reference to `ehci_hcd_stop' >> drivers/usb/host/libusb_host.o: In function `usb_lowlevel_init': >> /home/uboot/src/u-boot-arm/drivers/usb/host/ehci-hcd.c:814: undefined >> reference to `ehci_hcd_init' >> arm-linux-gnueabi-ld: BFD (GNU Binutils for Ubuntu) 2.21.53.20110810 >> assertion fail ../../bfd/elf32-arm.c:7498 >> arm-linux-gnueabi-ld: BFD (GNU Binutils for Ubuntu) 2.21.53.20110810 >> assertion fail ../../bfd/elf32-arm.c:7498 >> arm-linux-gnueabi-ld: BFD (GNU Binutils for Ubuntu) 2.21.53.20110810 >> assertion fail ../../bfd/elf32-arm.c:13828 >> /bin/sh : ligne 1 : 23855 Erreur de segmentation ?arm-linux-gnueabi-ld >> -pie -T u-boot.lds -Bstatic -Ttext 0x80008000 $UNDEF_SYM >> arch/arm/cpu/armv7/start.o --start-group api/libapi.o >> arch/arm/cpu/armv7/libarmv7.o >> arch/arm/cpu/armv7/omap-common/libomap-common.o >> arch/arm/cpu/armv7/omap3/libomap3.o arch/arm/lib/libarm.o common/libcommon.o >> disk/libdisk.o drivers/bios_emulator/libatibiosemu.o >> drivers/block/libblock.o drivers/dma/libdma.o drivers/fpga/libfpga.o >> drivers/gpio/libgpio.o drivers/hwmon/libhwmon.o drivers/i2c/libi2c.o >> drivers/input/libinput.o drivers/misc/libmisc.o drivers/mmc/libmmc.o >> drivers/mtd/libmtd.o drivers/mtd/nand/libnand.o >> drivers/mtd/onenand/libonenand.o drivers/mtd/spi/libspi_flash.o >> drivers/mtd/ubi/libubi.o drivers/net/libnet.o drivers/net/phy/libphy.o >> drivers/pci/libpci.o drivers/pcmcia/libpcmcia.o drivers/power/libpower.o >> drivers/rtc/librtc.o drivers/serial/libserial.o drivers/spi/libspi.o >> drivers/twserial/libtws.o drivers/usb/eth/libusb_eth.o drivers/usb > > > /gadget/libusb_gadget.o drivers/usb/host/libusb_host.o > drivers/usb/musb/libusb_musb.o drivers/usb/phy/libusb_phy.o > drivers/usb/ulpi/libusb_ulpi.o drivers/video/libvideo.o > drivers/watchdog/libwatchdog.o fs/cramfs/libcramfs.o fs/ext2/libext2fs.o > fs/fat/libfat.o fs/fdos/libfdos.o fs/jffs2/libjffs2.o > fs/reiserfs/libreiserfs.o fs/ubifs/libubifs.o fs/yaffs2/libyaffs2.o > lib/libfdt/libfdt.o lib/libgeneric.o lib/lzma/liblzma.o lib/lzo/liblzo.o > lib/zlib/libz.o net/libnet.o post/libpost.o > board/technexion/twister/libtwister.o --end-group > /home/uboot/src/u-boot-arm/arch/arm/lib/eabi_compat.o -L > /usr/lib/gcc/arm-linux-gnueabi/4.6.1 -lgcc -Map u-boot.map -o u-boot >> >> make: *** [u-boot] Erreur 139 >> make: *** Attente des t?ches non termin?es.... >> arm-linux-gnueabi-size: ./u-boot: File format not recognized >> >> --------------------- SUMMARY ---------------------------- >> Boards compiled: 1 >> Boards with warnings or errors: 1 ( twister ) >> ---------------------------------------------------------- > > > The above was tried on 10a4fa9e22b9677819b3901a87eec05875b346ad (the current > u-boot-arm/master, but trying various commits in between it and > 92e30c07e02b84a3b63205fcb29ac57defd043f6 (creation of twister), I find no > commit where it builds. > > Stefano, can you have a look at this? So what happened is I accidentally put this board into u-boot-ti/next a while back, before the USB changes went in, without realizing it. The reason the USB changes haven't gone in, still, is that they've been made more generic (as the IP block is shared between these boards and omap4/5). For that part of the problem perhaps we should turn off the USB portion of the board for now? -- Tom ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board 2012-01-14 14:25 ` Tom Rini @ 2012-01-14 15:05 ` Stefano Babic 0 siblings, 0 replies; 42+ messages in thread From: Stefano Babic @ 2012-01-14 15:05 UTC (permalink / raw) To: u-boot On 14/01/2012 15:25, Tom Rini wrote: > So what happened is I accidentally put this board into u-boot-ti/next > a while back, before the USB changes went in, without realizing it. > The reason the USB changes haven't gone in, still, is that they've > been made more generic (as the IP block is shared between these boards > and omap4/5). For that part of the problem perhaps we should turn off > the USB portion of the board for now? Ok - I will sent a patch to turn USB off, until EHCI omap flows into mainline. Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V3 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-12-01 9:56 ` [U-Boot] [PATCH V3 " Stefano Babic 2011-12-01 9:56 ` [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic @ 2011-12-05 23:31 ` Tom Rini 1 sibling, 0 replies; 42+ messages in thread From: Tom Rini @ 2011-12-05 23:31 UTC (permalink / raw) To: u-boot On Thu, Dec 1, 2011 at 2:56 AM, Stefano Babic <sbabic@denx.de> wrote: > The TAM3517 is a SOM module that can be used on custom boards. > The patch add a common configuration file that is included > by the boards using this module. > > Signed-off-by: Stefano Babic <sbabic@denx.de> > CC: Tapani Utrianen <tapani@technexion.com> > CC: Tom Rini <tom.rini@gmail.com> > CC: Sandeep Paulraj <s-paulraj@ti.com> This and patch 2/2 are now queued up in u-boot-ti/next, thanks. -- Tom ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board 2011-11-23 9:26 [U-Boot] Adding support to Technexion TAM3517 SOM Stefano Babic 2011-11-23 9:26 ` [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Stefano Babic @ 2011-11-23 9:26 ` Stefano Babic 2011-11-23 13:47 ` Igor Grinberg ` (2 more replies) [not found] ` <20111124145753.04084d1b@myhost> 2011-11-24 15:44 ` [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Stefano Babic 3 siblings, 3 replies; 42+ messages in thread From: Stefano Babic @ 2011-11-23 9:26 UTC (permalink / raw) To: u-boot The twister board is a development board using the TAM3517 SOM. Support for NAND, 2 Ethernet (EMAC and SMC911), USB (EHCI_OMAP). Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tapani Utrianen <tapani@technexion.com> CC: Tom Rini <tom.rini@gmail.com> CC: Sandeep Paulraj <s-paulraj@ti.com> --- MAINTAINERS | 1 + board/technexion/twister/Makefile | 44 ++++ board/technexion/twister/twister.c | 126 +++++++++++ board/technexion/twister/twister.h | 400 ++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/twister.h | 103 +++++++++ 6 files changed, 675 insertions(+), 0 deletions(-) create mode 100644 board/technexion/twister/Makefile create mode 100644 board/technexion/twister/twister.c create mode 100644 board/technexion/twister/twister.h create mode 100644 include/configs/twister.h diff --git a/MAINTAINERS b/MAINTAINERS index 7f73900..4d5d947 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -565,6 +565,7 @@ Stefano Babic <sbabic@denx.de> mx51evk i.MX51 polaris xscale/pxa trizepsiv xscale/pxa + twister omap3 vision2 i.MX51 Jason Liu <r64343@freescale.com> diff --git a/board/technexion/twister/Makefile b/board/technexion/twister/Makefile new file mode 100644 index 0000000..5d29458 --- /dev/null +++ b/board/technexion/twister/Makefile @@ -0,0 +1,44 @@ +# +# Copyright (C) 2011 Ilya Yanok, Emcraft Systems +# +# Based on ti/evm/Makefile +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c new file mode 100644 index 0000000..89a4d81 --- /dev/null +++ b/board/technexion/twister/twister.c @@ -0,0 +1,126 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. + * + * Copyright (C) 2009 TechNexion Ltd. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <netdev.h> +#include <asm/io.h> +#include <asm/arch/mem.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/omap_gpio.h> +#include <asm/arch/mmc_host_def.h> +#include <i2c.h> +#include <asm/gpio.h> +#include "twister.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Routine: board_init + * Description: Early hardware init. + */ +int board_init(void) +{ + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ + + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + + writel(0x00000000, &gpmc_cfg->cs[1].config1); + writel(0x001e1e01, &gpmc_cfg->cs[1].config2); + writel(0x00080300, &gpmc_cfg->cs[1].config3); + writel(0x1c091c09, &gpmc_cfg->cs[1].config4); + writel(0x04181f1f, &gpmc_cfg->cs[1].config5); + writel(0x00000FCF, &gpmc_cfg->cs[1].config6); + writel(0x00000f61, &gpmc_cfg->cs[1].config7); + + writel(0x00000000, &gpmc_cfg->cs[3].config1); + writel(0x001e1e01, &gpmc_cfg->cs[3].config2); + writel(0x00080300, &gpmc_cfg->cs[3].config3); + writel(0x1c091c09, &gpmc_cfg->cs[3].config4); + writel(0x04181f1f, &gpmc_cfg->cs[3].config5); + writel(0x00000FCF, &gpmc_cfg->cs[3].config6); + writel(0x00000f63, &gpmc_cfg->cs[3].config7); + + gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET, "USB_PHY1_RESET"); + gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET, 1); + + return 0; +} + +/* + * Routine: misc_init_r + * Description: Init i2c, ethernet, etc... (done here so udelay works) + */ +int misc_init_r(void) +{ + dieid_num_r(); + + return 0; +} + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +void set_muxconf_regs(void) +{ + MUX_TWISTER(); +} + +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() + */ +int board_eth_init(bd_t *bis) +{ +#if defined(CONFIG_DRIVER_TI_EMAC) + davinci_emac_initialize(); +#endif +#if defined(CONFIG_SMC911X) + /* init cs for extern lan */ + writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1); + writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2); + writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3); + writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4); + writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5); + writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6); + writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7); + if (smc911x_initialize(0, CONFIG_SMC911X_BASE) <= 0) + printf("\nError initializing SMC911x controlleri\n"); + +#endif + return 0; +} + +#if defined(CONFIG_GENERIC_MMC) && defined(CONFIG_OMAP_HSMMC) && \ + !defined(CONFIG_SPL_BUILD) +int board_mmc_init(bd_t *bis) +{ + return omap_mmc_init(0); +} +#endif diff --git a/board/technexion/twister/twister.h b/board/technexion/twister/twister.h new file mode 100644 index 0000000..d19a149 --- /dev/null +++ b/board/technexion/twister/twister.h @@ -0,0 +1,400 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. + * + * Copyright (C) 2010 TechNexion Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef _TAM3517_H_ +#define _TAM3517_H_ + +const omap3_sysinfo sysinfo = { + DDR_DISCRETE, + "TAM3517 TWISTER Board", + "NAND", +}; + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ +#define MUX_TWISTER() \ + /* SDRC */\ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS0N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_DQS1N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_DQS2N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_DQS3N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_CKE0), (M0)) \ + MUX_VAL(CP(SDRC_CKE1), (M0)) \ + MUX_VAL(CP(STRBEN_DLY0), (IEN | PTD | EN | M0)) \ + /*sdrc_strben_dly0*/\ + MUX_VAL(CP(STRBEN_DLY1), (IEN | PTD | EN | M0)) \ + /*sdrc_strben_dly1*/\ + /* GPMC */\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS1), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTD | EN | M2)) /*PWM9*/\ + MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS4), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS6), (IDIS | PTD | EN | M3)) /*PWM11*/ \ + MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | EN | M4)) /*GPIO_58*/ \ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) \ + /* DSS */\ + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \ + /* CAMERA */\ + MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ + MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ + MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) \ + /* MMC */\ + MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(MMC1_CMD), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M4)) \ + /* CardDetect */\ + MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) \ + \ + MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(MMC2_CMD), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTU | EN | M4)) \ + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | EN | M4)) \ + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) \ + MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) \ + /* McBSP */\ + MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) \ + \ + MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | EN | M4)) /*GPIO_116*/ \ + MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(MCBSP2_DX), (IEN | PTD | EN | M4)) \ + \ + MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MCBSP3_FSX), (IEN | PTU | EN | M4)) \ + \ + MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_152*/\ + MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) /*GPIO_153*/\ + MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M4)) /*GPIO_154*/\ + MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M4)) /*GPIO_155*/\ + /* UART */\ + MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(UART1_RTS), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(UART1_CTS), (IEN | PTU | EN | M4)) \ + \ + MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) \ + \ + MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M4)) /*GPIO_163*/ \ + MUX_VAL(CP(UART3_RTS_SD), (IEN | PTD | DIS | M4)) /*GPIO_164*/\ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) \ + /* I2C */\ + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) \ + /* McSPI */\ + MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)) /*GPIO_175*/\ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | EN | M4)) /*GPIO_176*/\ + MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M4)) \ + \ + MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M4)) \ + /* CCDC */\ + MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CCDC_FIELD), (IEN | PTD | DIS | M1)) \ + MUX_VAL(CP(CCDC_HD), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CCDC_VD), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CCDC_WEN), (IEN | PTD | DIS | M1)) \ + MUX_VAL(CP(CCDC_DATA0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | DIS | M0)) \ + /* RMII */\ + MUX_VAL(CP(RMII_MDIO_DATA), (IEN | M0)) \ + MUX_VAL(CP(RMII_MDIO_CLK), (M0)) \ + MUX_VAL(CP(RMII_RXD0) , (IEN | PTD | M0)) \ + MUX_VAL(CP(RMII_RXD1), (IEN | PTD | M0)) \ + MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | M0)) \ + MUX_VAL(CP(RMII_RXER), (PTD | M0)) \ + MUX_VAL(CP(RMII_TXD0), (PTD | M0)) \ + MUX_VAL(CP(RMII_TXD1), (PTD | M0)) \ + MUX_VAL(CP(RMII_TXEN), (PTD | M0)) \ + MUX_VAL(CP(RMII_50MHZ_CLK), (IEN | PTD | EN | M0)) \ + /* HECC */\ + MUX_VAL(CP(HECC1_TXD), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(HECC1_RXD), (IEN | PTU | EN | M0)) \ + /* HSUSB */\ + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0)) \ + /* HDQ */\ + MUX_VAL(CP(HDQ_SIO), (IEN | PTD | EN | M4)) \ + /* Control and debug */\ + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(SYS_NRESWARM), (IDIS | PTU | DIS | M4)) \ + /* - GPIO30 */\ + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4*/\ + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\ + /* - VIO_1V8*/\ + MUX_VAL(CP(SYS_BOOT7), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SYS_BOOT8), (IEN | PTD | EN | M0)) \ + \ + MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)) \ + /* JTAG */\ + MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_EMU0), (IDIS | PTD | EN | M4)) /*GPIO_11*/ \ + MUX_VAL(CP(JTAG_EMU1), (IDIS | PTD | EN | M4)) /*GPIO_31*/ \ + /* ETK (ES2 onwards) */\ + MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTD | DIS | M3)) \ + /* hsusb1_stp */ \ + MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M3)) \ + /* hsusb1_clk */\ + MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D1_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | EN | M3)) \ + /* hsusb1_dir */\ + MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | EN | M3)) \ + /* hsusb1_nxt */\ + MUX_VAL(CP(ETK_D10_ES2), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M4)) \ + MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M4)) \ + MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M4)) \ + MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M4)) \ + /* Die to Die */\ + MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) \ + +#endif diff --git a/boards.cfg b/boards.cfg index e6c9c53..a5d3446 100644 --- a/boards.cfg +++ b/boards.cfg @@ -188,6 +188,7 @@ omap3_evm arm armv7 evm ti omap3_sdp3430 arm armv7 sdp3430 ti omap3 devkit8000 arm armv7 devkit8000 timll omap3 mcx arm armv7 mcx htkw omap3 +twister arm armv7 twister technexion omap3 omap4_panda arm armv7 panda ti omap4 omap4_sdp4430 arm armv7 sdp4430 ti omap4 s5p_goni arm armv7 goni samsung s5pc1xx diff --git a/include/configs/twister.h b/include/configs/twister.h new file mode 100644 index 0000000..0eb3f64 --- /dev/null +++ b/include/configs/twister.h @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * Copyright (C) 2009 TechNexion Ltd. + * + * Configuration for the Technexion twister board. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "tam3517-common.h" + +#define MACH_TYPE_TAM3517 2818 +#define CONFIG_MACH_TYPE MACH_TYPE_TAM3517 + +#define CONFIG_TAM3517_SW3_SETTINGS +#define CONFIG_XR16L2751 + +#define CONFIG_BOOTDELAY 10 + +#define CONFIG_BOOTFILE "uImage" + +#define xstr(s) str(s) +#define str(s) #s +#define CONFIG_HOSTNAME twister + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip_sta=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ + "addip=if test -n ${ipdyn};then run addip_dyn;" \ + "else run addip_sta;fi\0" \ + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "addtty=setenv bootargs ${bootargs}" \ + " console=ttyO0,${baudrate}\0" \ + "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ + "loadaddr=82000000\0" \ + "kernel_addr_r=82000000\0" \ + "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ + "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ + "ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0" \ + "flash_self=run ramargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr}\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ + "run nfsargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr_r}\0" \ + "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ + "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ + "net_self=if run net_self_load;then " \ + "run ramargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ + "else echo Images not loades;fi\0" \ + "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ + "load=tftp ${loadaddr} ${u-boot}\0" \ + "uboot_addr=" xstr(CONFIG_SYS_MONITOR_BASE) "\0" \ + "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ + "erase ${uboot_addr} +40000;" \ + "nand write ${loadaddr} ${uboot_addr} 80000\0" \ + "upd=if run load;then echo Updating u-boot;if run update;" \ + "then echo U-Boot updated;" \ + "else echo Error updating u-boot !;" \ + "echo Board without bootloader !!;" \ + "fi;" \ + "else echo U-Boot not downloaded..exiting;fi\0" \ + "bootcmd=run net_nfs\0" + +#define CONFIG_AUTO_COMPLETE + +/* + * Miscellaneous configurable options + */ +#define V_PROMPT "twister => " +#define CONFIG_SYS_PROMPT V_PROMPT + +#define CONFIG_SMC911X +#define CONFIG_SMC911X_16_BIT +#define CONFIG_SMC911X_BASE 0x2C000000 +#define CONFIG_SMC911X_NO_EEPROM + +#endif /* __CONFIG_H */ -- 1.7.5.4 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board 2011-11-23 9:26 ` [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic @ 2011-11-23 13:47 ` Igor Grinberg 2011-11-23 14:22 ` Stefano Babic 2011-11-23 14:18 ` Igor Grinberg 2011-11-23 16:27 ` Wolfgang Denk 2 siblings, 1 reply; 42+ messages in thread From: Igor Grinberg @ 2011-11-23 13:47 UTC (permalink / raw) To: u-boot On 11/23/11 11:26, Stefano Babic wrote: > The twister board is a development board using > the TAM3517 SOM. > > Support for NAND, 2 Ethernet (EMAC and SMC911), > USB (EHCI_OMAP). > > Signed-off-by: Stefano Babic <sbabic@denx.de> > CC: Tapani Utrianen <tapani@technexion.com> > CC: Tom Rini <tom.rini@gmail.com> > CC: Sandeep Paulraj <s-paulraj@ti.com> > --- > MAINTAINERS | 1 + > board/technexion/twister/Makefile | 44 ++++ > board/technexion/twister/twister.c | 126 +++++++++++ > board/technexion/twister/twister.h | 400 ++++++++++++++++++++++++++++++++++++ > boards.cfg | 1 + > include/configs/twister.h | 103 +++++++++ > 6 files changed, 675 insertions(+), 0 deletions(-) > create mode 100644 board/technexion/twister/Makefile > create mode 100644 board/technexion/twister/twister.c > create mode 100644 board/technexion/twister/twister.h > create mode 100644 include/configs/twister.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index 7f73900..4d5d947 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -565,6 +565,7 @@ Stefano Babic <sbabic@denx.de> > mx51evk i.MX51 > polaris xscale/pxa > trizepsiv xscale/pxa > + twister omap3 > vision2 i.MX51 > > Jason Liu <r64343@freescale.com> > diff --git a/board/technexion/twister/Makefile b/board/technexion/twister/Makefile > new file mode 100644 > index 0000000..5d29458 > --- /dev/null > +++ b/board/technexion/twister/Makefile > @@ -0,0 +1,44 @@ > +# > +# Copyright (C) 2011 Ilya Yanok, Emcraft Systems > +# > +# Based on ti/evm/Makefile > +# > +# This program is free software; you can redistribute it and/or modify > +# it under the terms of the GNU General Public License as published by > +# the Free Software Foundation; either version 2 of the License, or > +# (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program; if not, write to the Free Software > +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. Postal address is subject to change, I'd prefer to not have it inside the source code files. > +# > + > +include $(TOPDIR)/config.mk > + > +LIB = $(obj)lib$(BOARD).o > + > +COBJS := $(BOARD).o > + > +SRCS := $(COBJS:.o=.c) > +OBJS := $(addprefix $(obj),$(COBJS)) > + > +$(LIB): $(obj).depend $(OBJS) > + $(call cmd_link_o_target, $(OBJS)) > + > +clean: > + rm -f $(OBJS) > + > +distclean: clean > + rm -f $(LIB) core *.bak $(obj).depend clean and distclean should be removed. > + > +######################################################################### > + > +# defines $(obj).depend target > +include $(SRCTREE)/rules.mk > + > +sinclude $(obj).depend > diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c > new file mode 100644 > index 0000000..89a4d81 > --- /dev/null > +++ b/board/technexion/twister/twister.c > @@ -0,0 +1,126 @@ > +/* > + * Copyright (C) 2011 > + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. > + * > + * Copyright (C) 2009 TechNexion Ltd. > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +#include <common.h> > +#include <netdev.h> > +#include <asm/io.h> > +#include <asm/arch/mem.h> > +#include <asm/arch/mux.h> > +#include <asm/arch/sys_proto.h> > +#include <asm/omap_gpio.h> > +#include <asm/arch/mmc_host_def.h> > +#include <i2c.h> > +#include <asm/gpio.h> > +#include "twister.h" > + > +DECLARE_GLOBAL_DATA_PTR; > + > +/* > + * Routine: board_init > + * Description: Early hardware init. > + */ > +int board_init(void) > +{ > + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ > + > + /* boot param addr */ > + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); > + > + writel(0x00000000, &gpmc_cfg->cs[1].config1); > + writel(0x001e1e01, &gpmc_cfg->cs[1].config2); > + writel(0x00080300, &gpmc_cfg->cs[1].config3); > + writel(0x1c091c09, &gpmc_cfg->cs[1].config4); > + writel(0x04181f1f, &gpmc_cfg->cs[1].config5); > + writel(0x00000FCF, &gpmc_cfg->cs[1].config6); > + writel(0x00000f61, &gpmc_cfg->cs[1].config7); > + > + writel(0x00000000, &gpmc_cfg->cs[3].config1); > + writel(0x001e1e01, &gpmc_cfg->cs[3].config2); > + writel(0x00080300, &gpmc_cfg->cs[3].config3); > + writel(0x1c091c09, &gpmc_cfg->cs[3].config4); > + writel(0x04181f1f, &gpmc_cfg->cs[3].config5); > + writel(0x00000FCF, &gpmc_cfg->cs[3].config6); > + writel(0x00000f63, &gpmc_cfg->cs[3].config7); > + > + gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET, "USB_PHY1_RESET"); > + gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET, 1); CONFIG_OMAP_EHCI_PHY1_RESET_GPIO > + > + return 0; > +} > + > +/* > + * Routine: misc_init_r > + * Description: Init i2c, ethernet, etc... (done here so udelay works) > + */ Comment is wrong. > +int misc_init_r(void) > +{ > + dieid_num_r(); > + > + return 0; > +} > + > +/* > + * Routine: set_muxconf_regs > + * Description: Setting up the configuration Mux registers specific to the > + * hardware. Many pins need to be moved from protect to primary > + * mode. > + */ > +void set_muxconf_regs(void) > +{ > + MUX_TWISTER(); > +} > + > +/* > + * Initializes on-chip ethernet controllers. > + * to override, implement board_eth_init() > + */ > +int board_eth_init(bd_t *bis) > +{ > +#if defined(CONFIG_DRIVER_TI_EMAC) > + davinci_emac_initialize(); > +#endif > +#if defined(CONFIG_SMC911X) > + /* init cs for extern lan */ > + writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1); > + writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2); > + writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3); > + writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4); > + writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5); > + writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6); > + writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7); There is an enable_gpmc_cs_config() function in /arch/arm/cpu/armv7/omap3/mem.c can't it be used? > + if (smc911x_initialize(0, CONFIG_SMC911X_BASE) <= 0) > + printf("\nError initializing SMC911x controlleri\n"); > + > +#endif > + return 0; > +} > + > +#if defined(CONFIG_GENERIC_MMC) && defined(CONFIG_OMAP_HSMMC) && \ > + !defined(CONFIG_SPL_BUILD) > +int board_mmc_init(bd_t *bis) > +{ > + return omap_mmc_init(0); > +} > +#endif > diff --git a/board/technexion/twister/twister.h b/board/technexion/twister/twister.h > new file mode 100644 > index 0000000..d19a149 > --- /dev/null > +++ b/board/technexion/twister/twister.h > @@ -0,0 +1,400 @@ > +/* > + * Copyright (C) 2011 > + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. > + * > + * Copyright (C) 2010 TechNexion Ltd. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. > + */ > + > +#ifndef _TAM3517_H_ > +#define _TAM3517_H_ > + > +const omap3_sysinfo sysinfo = { > + DDR_DISCRETE, > + "TAM3517 TWISTER Board", > + "NAND", > +}; > + > +/* > + * IEN - Input Enable > + * IDIS - Input Disable > + * PTD - Pull type Down > + * PTU - Pull type Up > + * DIS - Pull type selection is inactive > + * EN - Pull type selection is active > + * M0 - Mode 0 > + * The commented string gives the final mux configuration for that pin > + */ > +#define MUX_TWISTER() \ > + /* SDRC */\ > + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SDRC_DQS0N), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(SDRC_DQS1N), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(SDRC_DQS2N), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(SDRC_DQS3N), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(SDRC_CKE0), (M0)) \ > + MUX_VAL(CP(SDRC_CKE1), (M0)) \ > + MUX_VAL(CP(STRBEN_DLY0), (IEN | PTD | EN | M0)) \ > + /*sdrc_strben_dly0*/\ > + MUX_VAL(CP(STRBEN_DLY1), (IEN | PTD | EN | M0)) \ > + /*sdrc_strben_dly1*/\ > + /* GPMC */\ > + MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_NCS1), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTD | EN | M2)) /*PWM9*/\ > + MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_NCS4), (IEN | PTD | EN | M4)) \ > + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_NCS6), (IDIS | PTD | EN | M3)) /*PWM11*/ \ > + MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | EN | M4)) /*GPIO_58*/ \ > + MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) \ > + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ > + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) \ > + /* DSS */\ > + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \ > + /* CAMERA */\ > + MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ > + MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ > + MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) \ > + /* MMC */\ > + MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(MMC1_CMD), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M4)) \ > + /* CardDetect */\ > + MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) \ > + MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) \ > + MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) \ > + \ > + MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(MMC2_CMD), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTU | EN | M4)) \ > + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | EN | M4)) \ > + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) \ > + MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) \ > + /* McBSP */\ > + MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) \ > + \ > + MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | EN | M4)) /*GPIO_116*/ \ > + MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | EN | M4)) \ > + MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | EN | M4)) \ > + MUX_VAL(CP(MCBSP2_DX), (IEN | PTD | EN | M4)) \ > + \ > + MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) \ > + MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4)) \ > + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTU | EN | M4)) \ > + MUX_VAL(CP(MCBSP3_FSX), (IEN | PTU | EN | M4)) \ > + \ > + MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_152*/\ > + MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) /*GPIO_153*/\ > + MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M4)) /*GPIO_154*/\ > + MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M4)) /*GPIO_155*/\ > + /* UART */\ > + MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(UART1_RTS), (IEN | PTU | EN | M4)) \ > + MUX_VAL(CP(UART1_CTS), (IEN | PTU | EN | M4)) \ > + \ > + MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) \ > + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) \ > + \ > + MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M4)) /*GPIO_163*/ \ > + MUX_VAL(CP(UART3_RTS_SD), (IEN | PTD | DIS | M4)) /*GPIO_164*/\ > + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) \ > + /* I2C */\ > + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) \ > + /* McSPI */\ > + MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)) /*GPIO_175*/\ > + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | EN | M4)) /*GPIO_176*/\ > + MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M4)) \ > + \ > + MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) \ > + MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M4)) \ > + /* CCDC */\ > + MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(CCDC_FIELD), (IEN | PTD | DIS | M1)) \ > + MUX_VAL(CP(CCDC_HD), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(CCDC_VD), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(CCDC_WEN), (IEN | PTD | DIS | M1)) \ > + MUX_VAL(CP(CCDC_DATA0), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CCDC_DATA1), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CCDC_DATA2), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CCDC_DATA3), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CCDC_DATA4), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | DIS | M0)) \ > + /* RMII */\ > + MUX_VAL(CP(RMII_MDIO_DATA), (IEN | M0)) \ > + MUX_VAL(CP(RMII_MDIO_CLK), (M0)) \ > + MUX_VAL(CP(RMII_RXD0) , (IEN | PTD | M0)) \ > + MUX_VAL(CP(RMII_RXD1), (IEN | PTD | M0)) \ > + MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | M0)) \ > + MUX_VAL(CP(RMII_RXER), (PTD | M0)) \ > + MUX_VAL(CP(RMII_TXD0), (PTD | M0)) \ > + MUX_VAL(CP(RMII_TXD1), (PTD | M0)) \ > + MUX_VAL(CP(RMII_TXEN), (PTD | M0)) \ > + MUX_VAL(CP(RMII_50MHZ_CLK), (IEN | PTD | EN | M0)) \ > + /* HECC */\ > + MUX_VAL(CP(HECC1_TXD), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(HECC1_RXD), (IEN | PTU | EN | M0)) \ > + /* HSUSB */\ > + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) \ > + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTU | DIS | M0)) \ > + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0)) \ > + /* HDQ */\ > + MUX_VAL(CP(HDQ_SIO), (IEN | PTD | EN | M4)) \ > + /* Control and debug */\ > + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(SYS_NRESWARM), (IDIS | PTU | DIS | M4)) \ > + /* - GPIO30 */\ > + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ > + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ > + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4*/\ > + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ > + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ > + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ > + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\ > + /* - VIO_1V8*/\ > + MUX_VAL(CP(SYS_BOOT7), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(SYS_BOOT8), (IEN | PTD | EN | M0)) \ > + \ > + MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)) \ > + /* JTAG */\ > + MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(JTAG_EMU0), (IDIS | PTD | EN | M4)) /*GPIO_11*/ \ > + MUX_VAL(CP(JTAG_EMU1), (IDIS | PTD | EN | M4)) /*GPIO_31*/ \ > + /* ETK (ES2 onwards) */\ > + MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTD | DIS | M3)) \ > + /* hsusb1_stp */ \ > + MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M3)) \ > + /* hsusb1_clk */\ > + MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | EN | M3)) \ > + MUX_VAL(CP(ETK_D1_ES2), (IEN | PTU | EN | M3)) \ > + MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | EN | M3)) \ > + MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M3)) \ > + MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M3)) \ > + MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M3)) \ > + MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M3)) \ > + MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | EN | M3)) \ > + MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | EN | M3)) \ > + /* hsusb1_dir */\ > + MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | EN | M3)) \ > + /* hsusb1_nxt */\ > + MUX_VAL(CP(ETK_D10_ES2), (IEN | PTU | EN | M4)) \ > + MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M4)) \ > + MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M4)) \ > + MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M4)) \ > + MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M4)) \ > + MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M4)) \ > + /* Die to Die */\ > + MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) \ > + MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) \ > + MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) \ > + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) \ You have spaces for indentation in multiple places above. Please, check. > + > +#endif > diff --git a/boards.cfg b/boards.cfg > index e6c9c53..a5d3446 100644 > --- a/boards.cfg > +++ b/boards.cfg > @@ -188,6 +188,7 @@ omap3_evm arm armv7 evm ti > omap3_sdp3430 arm armv7 sdp3430 ti omap3 > devkit8000 arm armv7 devkit8000 timll omap3 > mcx arm armv7 mcx htkw omap3 > +twister arm armv7 twister technexion omap3 > omap4_panda arm armv7 panda ti omap4 > omap4_sdp4430 arm armv7 sdp4430 ti omap4 > s5p_goni arm armv7 goni samsung s5pc1xx > diff --git a/include/configs/twister.h b/include/configs/twister.h > new file mode 100644 > index 0000000..0eb3f64 > --- /dev/null > +++ b/include/configs/twister.h > @@ -0,0 +1,103 @@ > +/* > + * Copyright (C) 2011 > + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. > + * > + * Copyright (C) 2009 TechNexion Ltd. > + * > + * Configuration for the Technexion twister board. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. > + */ > + > +#ifndef __CONFIG_H > +#define __CONFIG_H > + > +#include "tam3517-common.h" > + > +#define MACH_TYPE_TAM3517 2818 > +#define CONFIG_MACH_TYPE MACH_TYPE_TAM3517 > + > +#define CONFIG_TAM3517_SW3_SETTINGS > +#define CONFIG_XR16L2751 > + > +#define CONFIG_BOOTDELAY 10 > + > +#define CONFIG_BOOTFILE "uImage" > + > +#define xstr(s) str(s) > +#define str(s) #s > +#define CONFIG_HOSTNAME twister > + > +#define CONFIG_EXTRA_ENV_SETTINGS \ > + "netdev=eth0\0" \ > + "nfsargs=setenv bootargs root=/dev/nfs rw " \ > + "nfsroot=${serverip}:${rootpath}\0" \ > + "ramargs=setenv bootargs root=/dev/ram rw\0" \ > + "addip_sta=setenv bootargs ${bootargs} " \ > + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ > + ":${hostname}:${netdev}:off panic=1\0" \ > + "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ > + "addip=if test -n ${ipdyn};then run addip_dyn;" \ > + "else run addip_sta;fi\0" \ > + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ > + "addtty=setenv bootargs ${bootargs}" \ > + " console=ttyO0,${baudrate}\0" \ > + "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ > + "loadaddr=82000000\0" \ > + "kernel_addr_r=82000000\0" \ > + "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ > + "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ > + "ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0" \ > + "flash_self=run ramargs addip addtty addmtd addmisc;" \ > + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ > + "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ > + "bootm ${kernel_addr}\0" \ > + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ > + "run nfsargs addip addtty addmtd addmisc;" \ > + "bootm ${kernel_addr_r}\0" \ > + "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ > + "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ > + "net_self=if run net_self_load;then " \ > + "run ramargs addip addtty addmtd addmisc;" \ > + "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ > + "else echo Images not loades;fi\0" \ > + "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ > + "load=tftp ${loadaddr} ${u-boot}\0" \ > + "uboot_addr=" xstr(CONFIG_SYS_MONITOR_BASE) "\0" \ > + "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ > + "erase ${uboot_addr} +40000;" \ > + "nand write ${loadaddr} ${uboot_addr} 80000\0" \ > + "upd=if run load;then echo Updating u-boot;if run update;" \ > + "then echo U-Boot updated;" \ > + "else echo Error updating u-boot !;" \ > + "echo Board without bootloader !!;" \ > + "fi;" \ > + "else echo U-Boot not downloaded..exiting;fi\0" \ > + "bootcmd=run net_nfs\0" > + > +#define CONFIG_AUTO_COMPLETE This one is present in your common file. > + > +/* > + * Miscellaneous configurable options > + */ > +#define V_PROMPT "twister => " > +#define CONFIG_SYS_PROMPT V_PROMPT Can this also be inlined? > + > +#define CONFIG_SMC911X > +#define CONFIG_SMC911X_16_BIT > +#define CONFIG_SMC911X_BASE 0x2C000000 > +#define CONFIG_SMC911X_NO_EEPROM > + > +#endif /* __CONFIG_H */ -- Regards, Igor. ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board 2011-11-23 13:47 ` Igor Grinberg @ 2011-11-23 14:22 ` Stefano Babic 0 siblings, 0 replies; 42+ messages in thread From: Stefano Babic @ 2011-11-23 14:22 UTC (permalink / raw) To: u-boot On 23/11/2011 14:47, Igor Grinberg wrote: >> +# You should have received a copy of the GNU General Public License >> +# along with this program; if not, write to the Free Software >> +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. > > Postal address is subject to change, I'd prefer to not have it > inside the source code files. Agree, I will remove it. I think the issue was already raised, I admit I have not yet completely the thread. >> +clean: >> + rm -f $(OBJS) >> + >> +distclean: clean >> + rm -f $(LIB) core *.bak $(obj).depend > > clean and distclean should be removed. Right, I have copied from a worng file. >> + >> + gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET, "USB_PHY1_RESET"); >> + gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET, 1); > > CONFIG_OMAP_EHCI_PHY1_RESET_GPIO Ok >> +/* >> + * Routine: misc_init_r >> + * Description: Init i2c, ethernet, etc... (done here so udelay works) >> + */ > > Comment is wrong. Completely, it makes no sense - I will drop it >> +#endif >> +#if defined(CONFIG_SMC911X) >> + /* init cs for extern lan */ >> + writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1); >> + writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2); >> + writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3); >> + writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4); >> + writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5); >> + writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6); >> + writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7); > > There is an enable_gpmc_cs_config() function in > /arch/arm/cpu/armv7/omap3/mem.c > can't it be used? Yes, now that I know there is such as function - thanks ! >> + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) \ >> + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) \ > > You have spaces for indentation in multiple places above. > Please, check. Ok, I will check it. >> +#define CONFIG_AUTO_COMPLETE > > This one is present in your common file. I drop from here, I will let it in the common file. > >> + >> +/* >> + * Miscellaneous configurable options >> + */ >> +#define V_PROMPT "twister => " >> +#define CONFIG_SYS_PROMPT V_PROMPT > > Can this also be inlined? Yes, of course. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board 2011-11-23 9:26 ` [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic 2011-11-23 13:47 ` Igor Grinberg @ 2011-11-23 14:18 ` Igor Grinberg 2011-11-23 14:41 ` Stefano Babic 2011-11-23 16:27 ` Wolfgang Denk 2 siblings, 1 reply; 42+ messages in thread From: Igor Grinberg @ 2011-11-23 14:18 UTC (permalink / raw) To: u-boot Sorry, missed the below in the first reply On 11/23/11 11:26, Stefano Babic wrote: > The twister board is a development board using > the TAM3517 SOM. > > Support for NAND, 2 Ethernet (EMAC and SMC911), > USB (EHCI_OMAP). > > Signed-off-by: Stefano Babic <sbabic@denx.de> > CC: Tapani Utrianen <tapani@technexion.com> > CC: Tom Rini <tom.rini@gmail.com> > CC: Sandeep Paulraj <s-paulraj@ti.com> > --- > MAINTAINERS | 1 + > board/technexion/twister/Makefile | 44 ++++ > board/technexion/twister/twister.c | 126 +++++++++++ > board/technexion/twister/twister.h | 400 ++++++++++++++++++++++++++++++++++++ > boards.cfg | 1 + > include/configs/twister.h | 103 +++++++++ > 6 files changed, 675 insertions(+), 0 deletions(-) > create mode 100644 board/technexion/twister/Makefile > create mode 100644 board/technexion/twister/twister.c > create mode 100644 board/technexion/twister/twister.h > create mode 100644 include/configs/twister.h [...] > diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c > new file mode 100644 > index 0000000..89a4d81 > --- /dev/null > +++ b/board/technexion/twister/twister.c [...] > +/* > + * Routine: board_init > + * Description: Early hardware init. > + */ > +int board_init(void) > +{ > + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ > + > + /* boot param addr */ > + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); > + > + writel(0x00000000, &gpmc_cfg->cs[1].config1); > + writel(0x001e1e01, &gpmc_cfg->cs[1].config2); > + writel(0x00080300, &gpmc_cfg->cs[1].config3); > + writel(0x1c091c09, &gpmc_cfg->cs[1].config4); > + writel(0x04181f1f, &gpmc_cfg->cs[1].config5); > + writel(0x00000FCF, &gpmc_cfg->cs[1].config6); > + writel(0x00000f61, &gpmc_cfg->cs[1].config7); > + > + writel(0x00000000, &gpmc_cfg->cs[3].config1); > + writel(0x001e1e01, &gpmc_cfg->cs[3].config2); > + writel(0x00080300, &gpmc_cfg->cs[3].config3); > + writel(0x1c091c09, &gpmc_cfg->cs[3].config4); > + writel(0x04181f1f, &gpmc_cfg->cs[3].config5); > + writel(0x00000FCF, &gpmc_cfg->cs[3].config6); > + writel(0x00000f63, &gpmc_cfg->cs[3].config7); Can there be an explanation of what's that and why is it needed? Also, it looks like you are writing the same values to both chip selects. Can enable_gpmc_cs_config() function be used here as well and the values documented (e.g. NET_GPMC_CONFIGx)? [...] -- Regards, Igor. ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board 2011-11-23 14:18 ` Igor Grinberg @ 2011-11-23 14:41 ` Stefano Babic 2011-11-23 15:20 ` Igor Grinberg 0 siblings, 1 reply; 42+ messages in thread From: Stefano Babic @ 2011-11-23 14:41 UTC (permalink / raw) To: u-boot On 23/11/2011 15:18, Igor Grinberg wrote: > > Sorry, missed the below in the first reply > It does not matter... >> +int board_init(void) >> +{ >> + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ >> + >> + /* boot param addr */ >> + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); >> + >> + writel(0x00000000, &gpmc_cfg->cs[1].config1); >> + writel(0x001e1e01, &gpmc_cfg->cs[1].config2); >> + writel(0x00080300, &gpmc_cfg->cs[1].config3); >> + writel(0x1c091c09, &gpmc_cfg->cs[1].config4); >> + writel(0x04181f1f, &gpmc_cfg->cs[1].config5); >> + writel(0x00000FCF, &gpmc_cfg->cs[1].config6); >> + writel(0x00000f61, &gpmc_cfg->cs[1].config7); >> + >> + writel(0x00000000, &gpmc_cfg->cs[3].config1); >> + writel(0x001e1e01, &gpmc_cfg->cs[3].config2); >> + writel(0x00080300, &gpmc_cfg->cs[3].config3); >> + writel(0x1c091c09, &gpmc_cfg->cs[3].config4); >> + writel(0x04181f1f, &gpmc_cfg->cs[3].config5); >> + writel(0x00000FCF, &gpmc_cfg->cs[3].config6); >> + writel(0x00000f63, &gpmc_cfg->cs[3].config7); > > Can there be an explanation of what's that and why is it needed? They are for a UART Controller (XR16L2751) and for the seconfd ethernet controller (SMC911X). I will explain this. > Also, it looks like you are writing the same values to both chip selects. Why not ? The setup sets some relaxing time for both of them > Can enable_gpmc_cs_config() function be used here as well and > the values documented (e.g. NET_GPMC_CONFIGx)? Sure...the name NET_GPMC_CONFIG is quite misleading, the setup for a chip select has nothing to do with the NET. I see that on other boards this defines are always used to set the chipselect for an ethernet controller, but it is not a rule.. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board 2011-11-23 14:41 ` Stefano Babic @ 2011-11-23 15:20 ` Igor Grinberg 0 siblings, 0 replies; 42+ messages in thread From: Igor Grinberg @ 2011-11-23 15:20 UTC (permalink / raw) To: u-boot On 11/23/11 16:41, Stefano Babic wrote: > On 23/11/2011 15:18, Igor Grinberg wrote: >> >> Sorry, missed the below in the first reply >> > > It does not matter... > >>> +int board_init(void) >>> +{ >>> + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ >>> + >>> + /* boot param addr */ >>> + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); >>> + >>> + writel(0x00000000, &gpmc_cfg->cs[1].config1); >>> + writel(0x001e1e01, &gpmc_cfg->cs[1].config2); >>> + writel(0x00080300, &gpmc_cfg->cs[1].config3); >>> + writel(0x1c091c09, &gpmc_cfg->cs[1].config4); >>> + writel(0x04181f1f, &gpmc_cfg->cs[1].config5); >>> + writel(0x00000FCF, &gpmc_cfg->cs[1].config6); >>> + writel(0x00000f61, &gpmc_cfg->cs[1].config7); >>> + >>> + writel(0x00000000, &gpmc_cfg->cs[3].config1); >>> + writel(0x001e1e01, &gpmc_cfg->cs[3].config2); >>> + writel(0x00080300, &gpmc_cfg->cs[3].config3); >>> + writel(0x1c091c09, &gpmc_cfg->cs[3].config4); >>> + writel(0x04181f1f, &gpmc_cfg->cs[3].config5); >>> + writel(0x00000FCF, &gpmc_cfg->cs[3].config6); >>> + writel(0x00000f63, &gpmc_cfg->cs[3].config7); >> >> Can there be an explanation of what's that and why is it needed? > > They are for a UART Controller (XR16L2751) and for the seconfd ethernet > controller (SMC911X). I will explain this. > >> Also, it looks like you are writing the same values to both chip selects. > > Why not ? The setup sets some relaxing time for both of them I don't mean you should not do this - it is perfectly fine. I mean, you should define those values and reuse the defines or consolidate it in some other way... Anyway, if you use the enable_gpmc_cs_config() function, it gets an array of those values as one of the parameters. > >> Can enable_gpmc_cs_config() function be used here as well and >> the values documented (e.g. NET_GPMC_CONFIGx)? > > Sure...the name NET_GPMC_CONFIG is quite misleading, the setup for a > chip select has nothing to do with the NET. I see that on other boards > this defines are always used to set the chipselect for an ethernet > controller, but it is not a rule.. I've just used NET_... as an example. I did not mean you should use it. Now when I know, that's XR16L2751 and an Ethernet controller, I can propose a better name - XR16L2751_GPMC_CONFIG for the UART. For the second Ethernet controller, are these the same values as those in NET_GPMC_CONFIG? If yes, then why not use it? -- Regards, Igor. ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board 2011-11-23 9:26 ` [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic 2011-11-23 13:47 ` Igor Grinberg 2011-11-23 14:18 ` Igor Grinberg @ 2011-11-23 16:27 ` Wolfgang Denk 2 siblings, 0 replies; 42+ messages in thread From: Wolfgang Denk @ 2011-11-23 16:27 UTC (permalink / raw) To: u-boot Dear Stefano Babic, In message <1322040416-11751-3-git-send-email-sbabic@denx.de> you wrote: > The twister board is a development board using > the TAM3517 SOM. > > Support for NAND, 2 Ethernet (EMAC and SMC911), > USB (EHCI_OMAP). > > Signed-off-by: Stefano Babic <sbabic@denx.de> > CC: Tapani Utrianen <tapani@technexion.com> > CC: Tom Rini <tom.rini@gmail.com> > CC: Sandeep Paulraj <s-paulraj@ti.com> ... > +/* > + * Initializes on-chip ethernet controllers. > + * to override, implement board_eth_init() > + */ > +int board_eth_init(bd_t *bis) What exactly is the meaning of the above comment? > +#if defined(CONFIG_DRIVER_TI_EMAC) > + davinci_emac_initialize(); > +#endif We always want this, don't we? > +#define V_PROMPT "twister => " > +#define CONFIG_SYS_PROMPT V_PROMPT What is this V_PROMPT thing needed for? Please scrap it. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Always try to do things in chronological order; it's less confusing that way. ^ permalink raw reply [flat|nested] 42+ messages in thread
[parent not found: <20111124145753.04084d1b@myhost>]
* [U-Boot] Adding support to Technexion TAM3517 SOM [not found] ` <20111124145753.04084d1b@myhost> @ 2011-11-24 8:05 ` Stefano Babic 2011-11-24 12:04 ` Wolfgang Denk 2011-11-24 15:19 ` Stefano Babic 1 sibling, 1 reply; 42+ messages in thread From: Stefano Babic @ 2011-11-24 8:05 UTC (permalink / raw) To: u-boot On 24/11/2011 07:57, Tapani Utriainen wrote: > On Wed, 23 Nov 2011 10:26:54 +0100 > Stefano Babic <sbabic@denx.de> wrote: > > Stefano, > Hi Tapani, > Some comments regarding your u-boot patch for TAM3517/Twister. Thanks - please add always the mailing list as CC, we are currently review the patches, and your review has a big importance. > > First, I like the separation between the module and the baseboard. Adding > new baseboards seems easier this way. Of course, this might add complexity > in a different way, but is preferrable over the alternative. Good. Thanks. > > Second, instead of pointing out "problems" with comments,tabs and spaces in > your patch source code -- I tested it. Nice - this means you have also tested the patches. If you agree, I will add a "Tested-by" signature with your name to the patches. > Using your u-boot.bin on Twister, USB devices do not work in linux. Using > the u-boot.bin I submitted this issue disappears. The setup is otherwise the > same (same x-loader, u-boot settings, kernel and userland). > > This might be due to Ilya's EHCI patch (required to compile your u-boot), > or something not properly setup in the kernel. What do you think? > (Issue is reproducible for instance using the 2.6.32 kernel we have on > our homepage). There are several things here. First, USB is not working at all in the u-boot.bin you submit, due to a lot of different reasons (wrong controller, wrong MUX setup) - this means that your u-boot makes nothing with USB, in any case it does not set up correctly the HW. When Linux starts, it finds the USB controller as after reset, and this is a big difference. The kernel you have relies maybe on some reset values, and this does not happen with my patches because the EHCI controller was already set. The issue you reports means that the kernel does not configure completely the controller when it starts, and some registers maintain the values set by U-Boot, maybe not correct for the kernel driver. I will exclude an error in the setup of the MUX in U-boot, because the USB is working, meaning that the pins are correctly routed. By the way, you are running a very old kernel, are you sure there are not patches for the EHCI OMAP driver in the current kernel tree ? > > The third point is your default settings: they do not allow booting via local > media (SD card or NAND flash). TechNexion's opinion is that the default is > to boot via NAND or SD-card, since very few use network boot. Of course, this behavior can be changed. Please post a proposal, if you have any. In the default settings I put a basic environment, using the same variables that are already used on several boards - I know there is neither standard nor rules for a standard environment in U-Boot, but I find nice if different boards maintain the same behavior, using some quite standard commands to boot from network or from storage. I like to have a "net_nfs" (not important which is the chosen name) on all boards I work with, as well as the same commands to boot from internal storage. Apart of that, I considered that twister is an evaluation board, and the customers like to change the way the system boots. And how the storage (I mean NAND here) is partitioned. We could use partition names as "kernel", "rootfs" to split the NAND. In this way, the boot command still works if the customer rearrange the size of partitions with the mtdparts variable. Of course, this wiorks only if in the kernel the mtdparts variable is parsed (CONFIG_MTD_CMDLINE_PARTS must be set). Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] Adding support to Technexion TAM3517 SOM 2011-11-24 8:05 ` [U-Boot] Adding support to Technexion TAM3517 SOM Stefano Babic @ 2011-11-24 12:04 ` Wolfgang Denk 2011-11-24 12:30 ` Stefano Babic 0 siblings, 1 reply; 42+ messages in thread From: Wolfgang Denk @ 2011-11-24 12:04 UTC (permalink / raw) To: u-boot Dear Stefano Babic, In message <4ECDFAB9.70008@denx.de> you wrote: > > In the default settings I put a basic environment, using the same > variables that are already used on several boards - I know there is > neither standard nor rules for a standard environment in U-Boot, but I > find nice if different boards maintain the same behavior, using some > quite standard commands to boot from network or from storage. I like to > have a "net_nfs" (not important which is the chosen name) on all boards > I work with, as well as the same commands to boot from internal storage. There are at least a few attempts to define such standard settings. Unfortunately they did not get really far yet, not has this been documented yet (only a few variables like u-boot, u-boot_addr_r, u-boot_addr, bootfile, kernel_addr_r, kernel_addr, fdtfile, fdt_addr_r, fdt_addr, ... have been documented in the README). More such patches are welcome. But I agree that your settings make much more sense as they fit into a pretty common "look and feel". > We could use partition names as "kernel", "rootfs" to split the NAND. In > this way, the boot command still works if the customer rearrange the > size of partitions with the mtdparts variable. Of course, this wiorks > only if in the kernel the mtdparts variable is parsed > (CONFIG_MTD_CMDLINE_PARTS must be set). This should be done indeed. It will also be needed to support UBI / UBIFS which I consider mandatory on NAND based devices. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de The sooner our happiness together begins, the longer it will last. -- Miramanee, "The Paradise Syndrome", stardate 4842.6 ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] Adding support to Technexion TAM3517 SOM 2011-11-24 12:04 ` Wolfgang Denk @ 2011-11-24 12:30 ` Stefano Babic 0 siblings, 0 replies; 42+ messages in thread From: Stefano Babic @ 2011-11-24 12:30 UTC (permalink / raw) To: u-boot On 24/11/2011 13:04, Wolfgang Denk wrote: > There are at least a few attempts to define such standard settings. > Unfortunately they did not get really far yet, not has this been > documented yet (only a few variables like u-boot, u-boot_addr_r, > u-boot_addr, bootfile, kernel_addr_r, kernel_addr, fdtfile, > fdt_addr_r, fdt_addr, ... have been documented in the README). > More such patches are welcome. > > But I agree that your settings make much more sense as they fit into a > pretty common "look and feel". Ok - I will then move at least part of the CONFIG_EXTRA_ENV_SETTINGS in the common file, letting the possibility to the board to replace or add further variables. >> We could use partition names as "kernel", "rootfs" to split the NAND. In >> this way, the boot command still works if the customer rearrange the >> size of partitions with the mtdparts variable. Of course, this wiorks >> only if in the kernel the mtdparts variable is parsed >> (CONFIG_MTD_CMDLINE_PARTS must be set). > > This should be done indeed. It will also be needed to support UBI / > UBIFS which I consider mandatory on NAND based devices. I have not set UBI for the twister - I will add it, thanks. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] Adding support to Technexion TAM3517 SOM [not found] ` <20111124145753.04084d1b@myhost> 2011-11-24 8:05 ` [U-Boot] Adding support to Technexion TAM3517 SOM Stefano Babic @ 2011-11-24 15:19 ` Stefano Babic 2011-11-25 3:25 ` Tapani Utriainen 1 sibling, 1 reply; 42+ messages in thread From: Stefano Babic @ 2011-11-24 15:19 UTC (permalink / raw) To: u-boot On 24/11/2011 07:57, Tapani Utriainen wrote: > Using your u-boot.bin on Twister, USB devices do not work in linux. Using > the u-boot.bin I submitted this issue disappears. The setup is otherwise the > same (same x-loader, u-boot settings, kernel and userland). I cannot confirm this issue - I am running the 2.6.32 kernel (compiled from sources), and USB is working: usb 2-1: New USB device found, idVendor=05e3, idProduct=0608 usb 2-1: New USB device strings: Mfr=0, Product=1, SerialNumber=0 usb 2-1: Product: USB2.0 Hub hub 2-1:1.0: USB hub found hub 2-1:1.0: 4 ports detected usb 2-1.2: new high speed USB device using ehci-omap and address 3 usb 2-1.2: New USB device found, idVendor=1307, idProduct=0165 usb 2-1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=3 usb 2-1.2: Product: USB Mass Storage Device usb 2-1.2: Manufacturer: USBest Technology usb 2-1.2: SerialNumber: 00000000000318 Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] Adding support to Technexion TAM3517 SOM 2011-11-24 15:19 ` Stefano Babic @ 2011-11-25 3:25 ` Tapani Utriainen 2011-11-25 7:35 ` Stefano Babic 0 siblings, 1 reply; 42+ messages in thread From: Tapani Utriainen @ 2011-11-25 3:25 UTC (permalink / raw) To: u-boot On Thu, 24 Nov 2011 16:19:26 +0100 Stefano Babic <sbabic@denx.de> wrote: > On 24/11/2011 07:57, Tapani Utriainen wrote: > > Using your u-boot.bin on Twister, USB devices do not work in linux. Using > > the u-boot.bin I submitted this issue disappears. The setup is otherwise the > > same (same x-loader, u-boot settings, kernel and userland). > > I cannot confirm this issue - I am running the 2.6.32 kernel (compiled > from sources), and USB is working: > Recompiled our kernel as well (was using someone elses pre-compiled earlier) and tried again. No difference. What steps did you take to verify that USB is working? For instance: I cannot mount/read a USB stick in linux when using your u-boot. No problems using ours. You might very well be right that this difference is due to errors in our u-boot *and* our kernel. I have not verified the MUX setup etc, just (maybe foolishly) trusted that the settings we have had working for long time (since before me starting here) are somewhat correct. Would be tragic if two so crazy errors makes it work. :-( //Tapani ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] Adding support to Technexion TAM3517 SOM 2011-11-25 3:25 ` Tapani Utriainen @ 2011-11-25 7:35 ` Stefano Babic 0 siblings, 0 replies; 42+ messages in thread From: Stefano Babic @ 2011-11-25 7:35 UTC (permalink / raw) To: u-boot On 25/11/2011 04:25, Tapani Utriainen wrote: > Recompiled our kernel as well (was using someone elses pre-compiled earlier) and > tried again. No difference. > > What steps did you take to verify that USB is working? > For instance: I cannot mount/read a USB stick in linux when using your u-boot. > No problems using ours. Yes, same steps - let's see: the USB is correctly recognized as checked in the dmesg: usb 2-1.1: new high speed USB device using ehci-omap and address 4 usb 2-1.1: New USB device found, idVendor=05e3, idProduct=0718 usb 2-1.1: New USB device strings: Mfr=0, Product=1, SerialNumber=2 usb 2-1.1: Product: USB Storage usb 2-1.1: SerialNumber: 000000000033 scsi1 : usb-storage 2-1.1:1.0 scsi 0:0:0:0: Direct-Access USB2.0 FlashDisk 0.00 PQ: 0 ANSI: 2 sd 0:0:0:0: Attached scsi generic sg0 type 0 sd 0:0:0:0: [sda] 8055880 512-byte logical blocks: (4.12 GB/3.84 GiB) sd 0:0:0:0: [sda] Write Protect is off sd 0:0:0:0: [sda] Mode Sense: 00 00 00 00 sd 0:0:0:0: [sda] Assuming drive cache: write through sd 0:0:0:0: [sda] Assuming drive cache: write through sda: sda1 sda2 sda3 sd 0:0:0:0: [sda] Assuming drive cache: write through sd 0:0:0:0: [sda] Attached SCSI removable disk There is a USB stick now connected to the EHCI-OMAP mount reports no problem: -bash-3.2# mount /dev/nfs on / type nfs (rw) none on /proc type proc (rw) sysfs on /sys type sysfs (rw) none on /proc/sys/fs/binfmt_misc type binfmt_misc (rw) /dev/sda1 on /mnt type vfat (rw) And I can access the file(s) on /dev/sda1: -bash-3.2# ls -la /mnt/ total 204 drwxr-xr-x 2 root root 16384 Jan 1 1970 . drwxr-xr-x 17 root root 4096 Nov 24 16:14 .. -rwxr-xr-x 1 root root 187344 Nov 9 10:47 u-boot.bin > > You might very well be right that this difference is due to errors in our u-boot > *and* our kernel. No, I have not said this. I meant that 2.6.32 kernel you have relies a untouched USB controller, and that could not be the case now. However, if you do not use the USB under U-Boot (you do not tip the "usb start" command), only the MUX is set in U-Boot without touching the controller. To understand which is the issue it is required some debugging. > I have not verified the MUX setup etc, just (maybe foolishly) > trusted that the settings we have had working for long time (since before me starting > here) are somewhat correct. Would be tragic if two so crazy errors makes it work. :-( As I said, the conditions are now slightly different and this can make the system working or not. You see I have the same kernel, but surely different conditions (rootfs on NFS server, different kernel parameters, ....) and it is working for me. Take also into account that your customers could be very interested to use the last kernel version or to have their board mainlined - and then your board should / could run with several (and actual) kernel versions. As far as I can see, there are a lot of patches from 2.6.32 to actual kernel for the ehci-omap.c file, including fixing to make it working after a suspend, and much more. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-23 9:26 [U-Boot] Adding support to Technexion TAM3517 SOM Stefano Babic ` (2 preceding siblings ...) [not found] ` <20111124145753.04084d1b@myhost> @ 2011-11-24 15:44 ` Stefano Babic 2011-11-24 15:44 ` [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic 2011-11-24 20:43 ` [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Wolfgang Denk 3 siblings, 2 replies; 42+ messages in thread From: Stefano Babic @ 2011-11-24 15:44 UTC (permalink / raw) To: u-boot The TAM3517 is a SOM module that can be used on custom boards. The patch add a common configuration file that is included by the boards using this module. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tapani Utrianen <tapani@technexion.com> CC: Tom Rini <tom.rini@gmail.com> CC: Sandeep Paulraj <s-paulraj@ti.com> --- Changes since V1: - CONFIG_OMAP_EHCI_PHY1_RESET_GPIO (Igor Grinberg) - Used inline instead of adding unuseful defines - rebased on latest posted patches for AM3517 - drop mixing of space an tabs (Igor Grinberg) - move default environment into the common file - sort lists (W. Denk) - do not remove CONFIG_CMD_IMI (W. Denk) - drop CONFIG_SYS_NAND_ADDR (W. Denk) - coding styles (several comments) - add redundant environment (W. Denk) - drop completely CFI setup (W. Denk) include/configs/tam3517-common.h | 358 ++++++++++++++++++++++++++++++++++++++ 1 files changed, 358 insertions(+), 0 deletions(-) create mode 100644 include/configs/tam3517-common.h diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h new file mode 100644 index 0000000..f972592 --- /dev/null +++ b/include/configs/tam3517-common.h @@ -0,0 +1,358 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. + * + * Copyright (C) 2009 TechNexion Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef __TAM3517_H +#define __TAM3517_H + +/* + * High Level Configuration Options + */ +#define CONFIG_OMAP /* in a TI OMAP core */ +#define CONFIG_OMAP34XX /* which is a 34XX */ + +#define CONFIG_SYS_TEXT_BASE 0x80008000 + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#define CONFIG_EMIF4 /* The chip has EMIF4 controller */ + +#include <asm/arch/cpu.h> /* get chip and board defs */ +#include <asm/arch/omap3.h> + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#undef CONFIG_USE_IRQ /* no support for IRQs */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ + 2 * 1024 * 1024) +/* + * DDR related + */ +#define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */ +#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) + +/* + * Hardware drivers + */ + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 +#define CONFIG_SERIAL1 /* UART1 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ + 115200} +#define CONFIG_MMC +#define CONFIG_OMAP_HSMMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DOS_PARTITION + +/* EHCI */ +#define CONFIG_OMAP3_GPIO_5 +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_OMAP +#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 +#define CONFIG_USB_STORAGE + +/* #define CONFIG_EHCI_DCACHE */ + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_GPIO +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MII +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_NET +#define CONFIG_CMD_NFS +#define CONFIG_CMD_NAND /* NAND support */ +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +#undef CONFIG_CMD_FLASH /* only NAND on the SOM */ +#undef CONFIG_CMD_IMLS + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C + + +/* + * Board NAND Info. + */ +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ + /* to access */ + /* nand at CS0 */ + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ + /* NAND devices */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + +#define CONFIG_AUTO_COMPLETE + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 32 /* max number of command */ + /* args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ + /* address */ + +/* + * AM3517 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/* + * Stack sizes + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE (32 << 20) /*@least 32 MiB */ +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* + * FLASH and environment organization + */ + +/* **** PISMO SUPPORT *** */ + +/* Configure the PISMO */ +#define PISMO1_NAND_SIZE GPMC_SIZE_128M + +#define CONFIG_NAND_OMAP_GPMC +#define GPMC_NAND_ECC_LP_x16_LAYOUT +#define CONFIG_ENV_IS_IN_NAND +#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ + +/* Redundant Environment */ +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ +#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + 2 * CONFIG_SYS_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +/* + * ethernet support, EMAC + * + */ +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_DRIVER_TI_EMAC_USE_RMII +#define CONFIG_MII +#define CONFIG_EMAC_MDIO_PHY_NUM 0 +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI + +/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_CONSOLE +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_NAND_SOFTECC +#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ +#define CONFIG_SPL_MAX_SIZE (45 << 10) /* 45 K */ +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK + +#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 +#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 + +/* NAND boot config */ +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ + 48, 49, 50, 51, 52, 53, 54, 55,\ + 56, 57, 58, 59, 60, 61, 62, 63} +#define CONFIG_SYS_NAND_ECCSIZE 256 +#define CONFIG_SYS_NAND_ECCBYTES 3 + +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ + CONFIG_SYS_NAND_ECCSIZE) +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 + +#define CONFIG_OF_LIBFDT +#define CONFIG_FIT +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_CMD_MTDPARTS + +/* Setup MTD for NAND on the SOM */ +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ + "512k(u-boot),128k(env1)," \ + "128k(env2),6m(kernel),-(rootfs)" + +#define CONFIG_TAM3517_SETTINGS \ + "netdev=eth0\0" \ + "nandargs=setenv bootargs root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip_sta=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ + "addip=if test -n ${ipdyn};then run addip_dyn;" \ + "else run addip_sta;fi\0" \ + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "addtty=setenv bootargs ${bootargs}" \ + " console=ttyO0,${baudrate}\0" \ + "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ + "loadaddr=82000000\0" \ + "kernel_addr_r=82000000\0" \ + "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ + "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ + "flash_self=run ramargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr}\0" \ + "nandboot=run nandargs addip addtty addmtd addmisc;" \ + "nand read ${kernel_addr_r} kernel\0" \ + "bootm ${kernel_addr_r}\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ + "run nfsargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr_r}\0" \ + "net_self=if run net_self_load;then " \ + "run ramargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ + "else echo Images not loades;fi\0" \ + "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.img\0" \ + "load=tftp ${loadaddr} ${u-boot}\0" \ + "loadmlo=tftp ${loadaddr} ${mlo}\0" \ + "mlo=" xstr(CONFIG_HOSTNAME) "/MLO\0" \ + "uboot_addr=0x80000\0" \ + "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ + "nand write ${loadaddr} ${uboot_addr} 80000\0" \ + "updatemlo=nandecc hw;nand erase 0 20000;" \ + "nand write ${loadaddr} 0 20000\0" \ + "upd=if run load;then echo Updating u-boot;if run update;" \ + "then echo U-Boot updated;" \ + "else echo Error updating u-boot !;" \ + "echo Board without bootloader !!;" \ + "fi;" \ + "else echo U-Boot not downloaded..exiting;fi\0" \ + +#endif /* __TAM3517_H */ -- 1.7.5.4 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board 2011-11-24 15:44 ` [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Stefano Babic @ 2011-11-24 15:44 ` Stefano Babic 2011-11-24 20:40 ` Wolfgang Denk 2011-11-29 23:18 ` Tom Rini 2011-11-24 20:43 ` [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Wolfgang Denk 1 sibling, 2 replies; 42+ messages in thread From: Stefano Babic @ 2011-11-24 15:44 UTC (permalink / raw) To: u-boot The twister board is a development board using the TAM3517 SOM. Support for NAND, 2 Ethernet (EMAC and SMC911), USB (EHCI_OMAP). Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tapani Utrianen <tapani@technexion.com> CC: Tom Rini <tom.rini@gmail.com> CC: Sandeep Paulraj <s-paulraj@ti.com> --- Changes since V1: - drop unuseful comments (W. Denk) - drop postal address (globally) from headers - enable_gpmc_cs_config() to set chip select (Igor Grinberg) - drop unneeded #ifdef (W. Denk) MAINTAINERS | 1 + board/technexion/twister/Makefile | 38 ++++ board/technexion/twister/twister.c | 116 ++++++++++ board/technexion/twister/twister.h | 411 ++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/twister.h | 56 +++++ 6 files changed, 623 insertions(+), 0 deletions(-) create mode 100644 board/technexion/twister/Makefile create mode 100644 board/technexion/twister/twister.c create mode 100644 board/technexion/twister/twister.h create mode 100644 include/configs/twister.h diff --git a/MAINTAINERS b/MAINTAINERS index fdc1a53..4e3246d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -562,6 +562,7 @@ Stefano Babic <sbabic@denx.de> mx51evk i.MX51 polaris xscale/pxa trizepsiv xscale/pxa + twister omap3 vision2 i.MX51 Jason Liu <r64343@freescale.com> diff --git a/board/technexion/twister/Makefile b/board/technexion/twister/Makefile new file mode 100644 index 0000000..38b7b14 --- /dev/null +++ b/board/technexion/twister/Makefile @@ -0,0 +1,38 @@ +# +# Copyright (C) 2011 Ilya Yanok, Emcraft Systems +# +# Based on ti/evm/Makefile +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c new file mode 100644 index 0000000..950e76c --- /dev/null +++ b/board/technexion/twister/twister.c @@ -0,0 +1,116 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. + * + * Copyright (C) 2009 TechNexion Ltd. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <netdev.h> +#include <asm/io.h> +#include <asm/arch/mem.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/omap_gpio.h> +#include <asm/arch/mmc_host_def.h> +#include <i2c.h> +#include <asm/gpio.h> +#include "twister.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* Timing definitions for Ethernet Controller */ +static const u32 gpmc_smc911[] = { + NET_GPMC_CONFIG1, + NET_GPMC_CONFIG2, + NET_GPMC_CONFIG3, + NET_GPMC_CONFIG4, + NET_GPMC_CONFIG5, + NET_GPMC_CONFIG6, +}; + +static const u32 gpmc_XR16L2751[] = { + XR16L2751_GPMC_CONFIG1, + XR16L2751_GPMC_CONFIG2, + XR16L2751_GPMC_CONFIG3, + XR16L2751_GPMC_CONFIG4, + XR16L2751_GPMC_CONFIG5, + XR16L2751_GPMC_CONFIG6, +}; + +int board_init(void) +{ + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ + + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + + /* Chip select 1 and 3 are used for XR16L2751 UART controller */ + enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[1], + XR16L2751_UART1_BASE, GPMC_SIZE_16M); + + enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[3], + XR16L2751_UART2_BASE, GPMC_SIZE_16M); + + gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB_PHY1_RESET"); + gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1); + + return 0; +} + +int misc_init_r(void) +{ + dieid_num_r(); + + return 0; +} + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +void set_muxconf_regs(void) +{ + MUX_TWISTER(); +} + +int board_eth_init(bd_t *bis) +{ + davinci_emac_initialize(); + + /* init cs for extern lan */ + enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5], + CONFIG_SMC911X_BASE, GPMC_SIZE_16M); + if (smc911x_initialize(0, CONFIG_SMC911X_BASE) <= 0) + printf("\nError initializing SMC911x controlleri\n"); + + return 0; +} + +#if defined(CONFIG_GENERIC_MMC) && defined(CONFIG_OMAP_HSMMC) && \ + !defined(CONFIG_SPL_BUILD) +int board_mmc_init(bd_t *bis) +{ + return omap_mmc_init(0); +} +#endif diff --git a/board/technexion/twister/twister.h b/board/technexion/twister/twister.h new file mode 100644 index 0000000..a2051c0 --- /dev/null +++ b/board/technexion/twister/twister.h @@ -0,0 +1,411 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic at denx.de. + * + * Copyright (C) 2010 TechNexion Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef _TAM3517_H_ +#define _TAM3517_H_ + +const omap3_sysinfo sysinfo = { + DDR_DISCRETE, + "TAM3517 TWISTER Board", + "NAND", +}; + +#define XR16L2751_GPMC_CONFIG1 0x00000000 +#define XR16L2751_GPMC_CONFIG2 0x001e1e01 +#define XR16L2751_GPMC_CONFIG3 0x00080300 +#define XR16L2751_GPMC_CONFIG4 0x1c091c09 +#define XR16L2751_GPMC_CONFIG5 0x04181f1f +#define XR16L2751_GPMC_CONFIG6 0x00000FCF + +#define XR16L2751_UART1_BASE 0x21000000 +#define XR16L2751_UART2_BASE 0x23000000 + + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ +#define MUX_TWISTER() \ + /* SDRC */\ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SDRC_DQS0N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_DQS1N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_DQS2N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_DQS3N), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SDRC_CKE0), (M0)) \ + MUX_VAL(CP(SDRC_CKE1), (M0)) \ + MUX_VAL(CP(STRBEN_DLY0), (IEN | PTD | EN | M0)) \ + /*sdrc_strben_dly0*/\ + MUX_VAL(CP(STRBEN_DLY1), (IEN | PTD | EN | M0)) \ + /*sdrc_strben_dly1*/\ + /* GPMC */\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS1), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTD | EN | M2)) /*PWM9*/\ + MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS4), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NCS6), (IDIS | PTD | EN | M3)) /*PWM11*/ \ + MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | EN | M4)) /*GPIO_58*/ \ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) \ + /* DSS */\ + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \ + /* CAMERA */\ + MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ + MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ + MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) \ + /* MMC */\ + MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(MMC1_CMD), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M4)) \ + /* CardDetect */\ + MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) \ + \ + MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(MMC2_CMD), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MMC2_DAT4), (IDIS | PTU | EN | M4)) \ + MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | EN | M4)) \ + MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) \ + MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) \ + /* McBSP */\ + MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) \ + \ + MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | EN | M4)) /*GPIO_116*/ \ + MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(MCBSP2_DX), (IEN | PTD | EN | M4)) \ + \ + MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(MCBSP3_FSX), (IEN | PTU | EN | M4)) \ + \ + MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_152*/\ + MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) /*GPIO_153*/\ + MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M4)) /*GPIO_154*/\ + MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M4)) /*GPIO_155*/\ + /* UART */\ + MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(UART1_RTS), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(UART1_CTS), (IEN | PTU | EN | M4)) \ + \ + MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) \ + \ + MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M4)) /*GPIO_163*/ \ + MUX_VAL(CP(UART3_RTS_SD), (IEN | PTD | DIS | M4)) /*GPIO_164*/\ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) \ + /* I2C */\ + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) \ + /* McSPI */\ + MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)) /*GPIO_175*/\ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | EN | M4)) /*GPIO_176*/\ + MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M4)) \ + \ + MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M4)) \ + /* CCDC */\ + MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CCDC_FIELD), (IEN | PTD | DIS | M1)) \ + MUX_VAL(CP(CCDC_HD), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CCDC_VD), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(CCDC_WEN), (IEN | PTD | DIS | M1)) \ + MUX_VAL(CP(CCDC_DATA0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | DIS | M0)) \ + /* RMII */\ + MUX_VAL(CP(RMII_MDIO_DATA), (IEN | M0)) \ + MUX_VAL(CP(RMII_MDIO_CLK), (M0)) \ + MUX_VAL(CP(RMII_RXD0) , (IEN | PTD | M0)) \ + MUX_VAL(CP(RMII_RXD1), (IEN | PTD | M0)) \ + MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | M0)) \ + MUX_VAL(CP(RMII_RXER), (PTD | M0)) \ + MUX_VAL(CP(RMII_TXD0), (PTD | M0)) \ + MUX_VAL(CP(RMII_TXD1), (PTD | M0)) \ + MUX_VAL(CP(RMII_TXEN), (PTD | M0)) \ + MUX_VAL(CP(RMII_50MHZ_CLK), (IEN | PTD | EN | M0)) \ + /* HECC */\ + MUX_VAL(CP(HECC1_TXD), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(HECC1_RXD), (IEN | PTU | EN | M0)) \ + /* HSUSB */\ + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTU | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0)) \ + /* HDQ */\ + MUX_VAL(CP(HDQ_SIO), (IEN | PTD | EN | M4)) \ + /* Control and debug */\ + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(SYS_NRESWARM), (IDIS | PTU | DIS | M4)) \ + /* - GPIO30 */\ + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4*/\ + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\ + /* - VIO_1V8*/\ + MUX_VAL(CP(SYS_BOOT7), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(SYS_BOOT8), (IEN | PTD | EN | M0)) \ + \ + MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)) \ + /* JTAG */\ + MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(JTAG_EMU0), (IDIS | PTD | EN | M4)) /*GPIO_11*/ \ + MUX_VAL(CP(JTAG_EMU1), (IDIS | PTD | EN | M4)) /*GPIO_31*/ \ + /* ETK (ES2 onwards) */\ + MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTD | DIS | M3)) \ + /* hsusb1_stp */ \ + MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M3)) \ + /* hsusb1_clk */\ + MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D1_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | EN | M3)) \ + MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | EN | M3)) \ + /* hsusb1_dir */\ + MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | EN | M3)) \ + /* hsusb1_nxt */\ + MUX_VAL(CP(ETK_D10_ES2), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M4)) \ + MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M4)) \ + MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M4)) \ + MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M4)) \ + /* Die to Die */\ + MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) \ + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) \ + +#endif diff --git a/boards.cfg b/boards.cfg index 11ef60b..7826e29 100644 --- a/boards.cfg +++ b/boards.cfg @@ -195,6 +195,7 @@ omap3_evm_quick_nand arm armv7 evm ti omap3_sdp3430 arm armv7 sdp3430 ti omap3 devkit8000 arm armv7 devkit8000 timll omap3 mcx arm armv7 mcx htkw omap3 +twister arm armv7 twister technexion omap3 omap4_panda arm armv7 panda ti omap4 omap4_sdp4430 arm armv7 sdp4430 ti omap4 omap5_evm arm armv7 omap5_evm ti omap5 diff --git a/include/configs/twister.h b/include/configs/twister.h new file mode 100644 index 0000000..f4af2a3 --- /dev/null +++ b/include/configs/twister.h @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * Copyright (C) 2009 TechNexion Ltd. + * + * Configuration for the Technexion twister board. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "tam3517-common.h" + +#define MACH_TYPE_TAM3517 2818 +#define CONFIG_MACH_TYPE MACH_TYPE_TAM3517 + +#define CONFIG_TAM3517_SW3_SETTINGS +#define CONFIG_XR16L2751 + +#define CONFIG_BOOTDELAY 10 + +#define CONFIG_BOOTFILE "uImage" + +#define xstr(s) str(s) +#define str(s) #s +#define CONFIG_HOSTNAME twister + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_PROMPT "twister => " + +#define CONFIG_SMC911X +#define CONFIG_SMC911X_16_BIT +#define CONFIG_SMC911X_BASE 0x2C000000 +#define CONFIG_SMC911X_NO_EEPROM + +#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \ + "bootcmd=run nandboot\0" + +#endif /* __CONFIG_H */ -- 1.7.5.4 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board 2011-11-24 15:44 ` [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic @ 2011-11-24 20:40 ` Wolfgang Denk 2011-11-29 23:18 ` Tom Rini 1 sibling, 0 replies; 42+ messages in thread From: Wolfgang Denk @ 2011-11-24 20:40 UTC (permalink / raw) To: u-boot Dear Stefano Babic, In message <1322149442-16555-2-git-send-email-sbabic@denx.de> you wrote: > The twister board is a development board using > the TAM3517 SOM. > > Support for NAND, 2 Ethernet (EMAC and SMC911), > USB (EHCI_OMAP). ... Nitpick: > +#define xstr(s) str(s) > +#define str(s) #s It appears neither of these is actuallyused any more in this header file? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "All my life I wanted to be someone; I guess I should have been more specific." - Jane Wagner ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board 2011-11-24 15:44 ` [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic 2011-11-24 20:40 ` Wolfgang Denk @ 2011-11-29 23:18 ` Tom Rini 2011-11-30 8:53 ` Stefano Babic 1 sibling, 1 reply; 42+ messages in thread From: Tom Rini @ 2011-11-29 23:18 UTC (permalink / raw) To: u-boot On Thu, Nov 24, 2011 at 8:44 AM, Stefano Babic <sbabic@denx.de> wrote: > The twister board is a development board using > the TAM3517 SOM. > > Support for NAND, 2 Ethernet (EMAC and SMC911), > USB (EHCI_OMAP). [snip] > +#if defined(CONFIG_GENERIC_MMC) && defined(CONFIG_OMAP_HSMMC) && \ > + ? ? ? !defined(CONFIG_SPL_BUILD) Another little change, OMAP_HSMMC requires GENERIC_MMC so no need to test both. With this, and Wolfgang's change made in a v3, are you and Tapani otherwise in agreement for how this looks going in? -- Tom ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board 2011-11-29 23:18 ` Tom Rini @ 2011-11-30 8:53 ` Stefano Babic 2011-12-01 11:33 ` Tapani Utriainen 0 siblings, 1 reply; 42+ messages in thread From: Stefano Babic @ 2011-11-30 8:53 UTC (permalink / raw) To: u-boot On 30/11/2011 00:18, Tom Rini wrote: > On Thu, Nov 24, 2011 at 8:44 AM, Stefano Babic <sbabic@denx.de> wrote: >> The twister board is a development board using >> the TAM3517 SOM. >> >> Support for NAND, 2 Ethernet (EMAC and SMC911), >> USB (EHCI_OMAP). > [snip] >> +#if defined(CONFIG_GENERIC_MMC) && defined(CONFIG_OMAP_HSMMC) && \ >> + !defined(CONFIG_SPL_BUILD) > > Another little change, OMAP_HSMMC requires GENERIC_MMC so no need to test both. Thanks, I drop it. > With this, and Wolfgang's change made in a v3, are you and Tapani > otherwise in agreement for how this looks going in? Yes, I think so. Tapani, I also changed in V2 the default way to boot from network to NAND for the twister, and further boards can always overwrite this behavior if desired. Do you have any open points ? Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board 2011-11-30 8:53 ` Stefano Babic @ 2011-12-01 11:33 ` Tapani Utriainen 2011-12-01 14:40 ` Wolfgang Denk 0 siblings, 1 reply; 42+ messages in thread From: Tapani Utriainen @ 2011-12-01 11:33 UTC (permalink / raw) To: u-boot On Wed, 30 Nov 2011 09:53:39 +0100 Stefano Babic <sbabic@denx.de> wrote: > On 30/11/2011 00:18, Tom Rini wrote: > > > With this, and Wolfgang's change made in a v3, are you and Tapani > > otherwise in agreement for how this looks going in? > > Yes, I think so. Tapani, I also changed in V2 the default way to boot > from network to NAND for the twister, and further boards can always > overwrite this behavior if desired. Do you have any open points ? > In my view the architecture and implementation is ok. The only dark cloud is this u-boot cannot act as a direct replacement for the one we have, because of failures to mount USBv3 devices on the Twister board using our (ancient, but still the latest released) 2.6.32 kernel. As discussed, there can be any number of reasons to that, not necessarily related to u-boot. However, for this I cannot give an "ack" or succesfully "tested by". :-( With some luck, I get some time to play with Twister tomorrow -- I can see if I can get this u-boot to work there. //Tapani ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board 2011-12-01 11:33 ` Tapani Utriainen @ 2011-12-01 14:40 ` Wolfgang Denk 0 siblings, 0 replies; 42+ messages in thread From: Wolfgang Denk @ 2011-12-01 14:40 UTC (permalink / raw) To: u-boot Dear Tapani Utriainen, In message <20111201193351.657780c1@myhost> you wrote: > > The only dark cloud is this u-boot cannot act as a direct replacement for > the one we have, because of failures to mount USBv3 devices on the Twister > board using our (ancient, but still the latest released) 2.6.32 kernel. I'm not sure how you define "released". The latest stable released Linux kernel is v3.1.4; compared to that, 2.6.32 is more than 9 kernel releases ago, or more than 2.5 years in time. In terms of Linux kernel development, this is stone age. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de One essential to success is that you desire be an all-obsessing one, your thoughts and aims be co-ordinated, and your energy be concentra- ted and applied without letup. ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-24 15:44 ` [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Stefano Babic 2011-11-24 15:44 ` [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic @ 2011-11-24 20:43 ` Wolfgang Denk 2011-11-24 22:42 ` stefano babic 1 sibling, 1 reply; 42+ messages in thread From: Wolfgang Denk @ 2011-11-24 20:43 UTC (permalink / raw) To: u-boot Dear Stefano Babic, In message <1322149442-16555-1-git-send-email-sbabic@denx.de> you wrote: > The TAM3517 is a SOM module that can be used on custom boards. > The patch add a common configuration file that is included > by the boards using this module. ... > diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h > new file mode 100644 > index 0000000..f972592 ... > + "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ > + "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ Here you rely on xstr() being defined in some higher level header file. That's not a good idea. Please mode the definitions into this common header, and drop it in the other file(s). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Premature optimization is the root of all evil. -- D.E. Knuth ^ permalink raw reply [flat|nested] 42+ messages in thread
* [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 2011-11-24 20:43 ` [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Wolfgang Denk @ 2011-11-24 22:42 ` stefano babic 0 siblings, 0 replies; 42+ messages in thread From: stefano babic @ 2011-11-24 22:42 UTC (permalink / raw) To: u-boot Am 24/11/2011 21:43, schrieb Wolfgang Denk: >> + "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ >> + "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ > > Here you rely on xstr() being defined in some higher level header > file. This was not thought, I miss to move it, thanks for pointing out > That's not a good idea. ..it's a very bad idea.... > Please mode the definitions into this > common header, and drop it in the other file(s). I do it Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 42+ messages in thread
end of thread, other threads:[~2012-01-14 15:05 UTC | newest]
Thread overview: 42+ messages (download: mbox.gz follow: Atom feed
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2011-11-23 9:26 [U-Boot] Adding support to Technexion TAM3517 SOM Stefano Babic
2011-11-23 9:26 ` [U-Boot] [PATCH 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Stefano Babic
2011-11-23 12:44 ` Igor Grinberg
2011-11-23 13:08 ` Stefano Babic
2011-11-23 16:11 ` Wolfgang Denk
2011-11-23 16:29 ` Igor Grinberg
2011-11-23 16:21 ` Wolfgang Denk
2011-11-24 2:47 ` Tom Rini
2011-11-24 9:07 ` Stefano Babic
2011-11-24 12:07 ` Wolfgang Denk
2011-12-01 9:56 ` [U-Boot] [PATCH V3 " Stefano Babic
2011-12-01 9:56 ` [U-Boot] [PATCH V3 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic
2012-01-14 8:47 ` Albert ARIBAUD
2012-01-14 9:48 ` Stefano Babic
2012-01-14 10:06 ` Albert ARIBAUD
2012-01-14 10:15 ` Stefano Babic
2012-01-14 10:22 ` Albert ARIBAUD
2012-01-14 14:25 ` Tom Rini
2012-01-14 15:05 ` Stefano Babic
2011-12-05 23:31 ` [U-Boot] [PATCH V3 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Tom Rini
2011-11-23 9:26 ` [U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic
2011-11-23 13:47 ` Igor Grinberg
2011-11-23 14:22 ` Stefano Babic
2011-11-23 14:18 ` Igor Grinberg
2011-11-23 14:41 ` Stefano Babic
2011-11-23 15:20 ` Igor Grinberg
2011-11-23 16:27 ` Wolfgang Denk
[not found] ` <20111124145753.04084d1b@myhost>
2011-11-24 8:05 ` [U-Boot] Adding support to Technexion TAM3517 SOM Stefano Babic
2011-11-24 12:04 ` Wolfgang Denk
2011-11-24 12:30 ` Stefano Babic
2011-11-24 15:19 ` Stefano Babic
2011-11-25 3:25 ` Tapani Utriainen
2011-11-25 7:35 ` Stefano Babic
2011-11-24 15:44 ` [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Stefano Babic
2011-11-24 15:44 ` [U-Boot] [PATCH V2 2/2] ARM: omap3: add support to Technexion twister board Stefano Babic
2011-11-24 20:40 ` Wolfgang Denk
2011-11-29 23:18 ` Tom Rini
2011-11-30 8:53 ` Stefano Babic
2011-12-01 11:33 ` Tapani Utriainen
2011-12-01 14:40 ` Wolfgang Denk
2011-11-24 20:43 ` [U-Boot] [PATCH V2 1/2] ARM: omap3: added common configuration for Technexion TAM3517 Wolfgang Denk
2011-11-24 22:42 ` stefano babic
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