From mboxrd@z Thu Jan  1 00:00:00 1970
From: Scott Wood <scottwood@freescale.com>
Date: Mon, 5 Dec 2011 13:17:34 -0600
Subject: [U-Boot] [PATCH 4/4] mtd/nand: Add ONFI support for FSL NAND
	controller
In-Reply-To: <3F453DDFF675A64A89321A1F352810216B03B9@039-SN1MPN1-005.039d.mgd.msft.net>
References: <1322817437-4955-1-git-send-email-Shengzhou.Liu@freescale.com>
	<1322817437-4955-2-git-send-email-Shengzhou.Liu@freescale.com>
	<1322817437-4955-3-git-send-email-Shengzhou.Liu@freescale.com>
	<1322817437-4955-4-git-send-email-Shengzhou.Liu@freescale.com>
	<4ED91CB5.9090206@freescale.com>
	<3F453DDFF675A64A89321A1F352810216B03B9@039-SN1MPN1-005.039d.mgd.msft.net>
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On 12/03/2011 03:25 AM, Liu Shengzhou-B36685 wrote:
> 
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: 2011?12?3? 2:45
>> To: Liu Shengzhou-B36685
>> Cc: u-boot at lists.denx.de; Gala Kumar-B11780
>> Subject: Re: [PATCH 4/4] mtd/nand: Add ONFI support for FSL NAND
>> controller
>>
>> On 12/02/2011 03:17 AM, Shengzhou Liu wrote:
>>> +	case NAND_CMD_PARAM:
>>> +		dbg("fsl_elbc_cmdfunc: NAND_CMD_PARAM.\n");
>>> +		out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) |
>>> +				    (FIR_OP_UA  << FIR_OP1_SHIFT) |
>>> +				    (FIR_OP_RBW << FIR_OP2_SHIFT));
>>> +		out_be32(&lbc->fcr, NAND_CMD_PARAM << FCR_CMD0_SHIFT);
>>> +		out_be32(&lbc->fbcr, 256);
>>> +		ctrl->read_bytes = 256;
>>> +		ctrl->use_mdr = 1;
>>> +		ctrl->mdr = column;
>>> +		set_addr(mtd, 0, 0, 0);
>>> +		fsl_elbc_run_command(mtd);
>>> +		return;
>>
>> This could share code with NAND_CMD_READID -- always read 256 bytes
>> (we'll need to read more than 5 bytes for non-ONFI as well, when we
>> pull
>> in the newer Linux NAND code), and use "command << FCR_CMD0_SHIFT" for
>> FCR.
>>
>> BTW, has anyone tested the eLBC driver with 16-bit NAND?  I think our
>> read_byte() implementation is not going to do the right thing here --
>> it
>> needs to read a 16-bit word when the chip is 16-bit, and discard the
>> upper half.
>>
>> -Scott
> 
> There was already NAND_CMD_PARAM command which is called in mtd/nand/nand_base.c, it's not new created.
> NAND_CMD_PARAM is defined in spec, we should not share it with NAND_CMD_READID, if so, we'll have to intrusive to nand_base.c.

Huh?

All I'm saying is that you could do this in fsl_elbc_nand.c:

	case NAND_CMD_READID:
	case NAND_CMD_PARAM:
		out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) |
				    (FIR_OP_UA  << FIR_OP1_SHIFT) |
				    (FIR_OP_RBW << FIR_OP2_SHIFT));
		out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT);
		out_be32(&lbc->fbcr, 256);
		ctrl->read_bytes = 256;
		ctrl->use_mdr = 1;
		ctrl->mdr = column;
		set_addr(mtd, 0, 0, 0);
		fsl_elbc_run_command(mtd);
		return;

-Scott