From mboxrd@z Thu Jan  1 00:00:00 1970
From: Aneesh V <aneesh@ti.com>
Date: Thu, 08 Dec 2011 11:21:01 +0530
Subject: [U-Boot] [PATCH] arm: Tegra: fix undefined instruction hang
 immediately after reset
In-Reply-To: <201112071914.32335.vapier@gentoo.org>
References: <1323212419-21023-1-git-send-email-twarren@nvidia.com>
	<201112071914.32335.vapier@gentoo.org>
Message-ID: <4EE05045.3000100@ti.com>
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To: u-boot@lists.denx.de

Mike,

On Thursday 08 December 2011 05:44 AM, Mike Frysinger wrote:
> On Tuesday 06 December 2011 18:00:19 Tom Warren wrote:
>> commit 0d479b53 (Aneesh V) added code for OMAP4 that doesn't
>> execute on Tegra, due to the AVP (ARM7TDI) not having a CP15.
>> Result was an undefined instruction hang just after reset.
>>
>> --- a/arch/arm/cpu/armv7/start.S
>> +++ b/arch/arm/cpu/armv7/start.S
>>
>> +#if !defined(CONFIG_TEGRA2)
>>   /*
>>    * Setup vector:
>>    * (OMAP4 spl TEXT_BASE is not 32 byte aligned.
>> @@ -159,6 +160,7 @@ reset:
>>   	ldr	r0, =_start
>>   	mcr	p15, 0, r0, c12, c0, 0	@Set VBAR
>>   #endif
>> +#endif	/* !Tegra2 */
>
> forgive my ignorance, but would it be better to invert the logic ?  have ARM
> cores that do have a CP15 define CONFIG_ARM_CP15 (or whatever) and then put all
> this logic behind that rather than grow a list of SoC's that lack it ?
> -mike

As far as I understand CP15 is typically available(if not mandatory) on
all armv7 processors. Here, IIUC, NVidia has a peculiar architecture
that necessitates an armv4 processor supported by armv7 code. IMHO,
this is the exceptional case.

br,
Aneesh