From: Aneesh V <aneesh@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] overo: add SPL support
Date: Tue, 20 Dec 2011 22:06:54 +0530 [thread overview]
Message-ID: <4EF0B9A6.6050600@ti.com> (raw)
In-Reply-To: <201112201339.39460.schnitzeltony@gmx.de>
On Tuesday 20 December 2011 06:09 PM, Andreas M?ller wrote:
> On Tuesday, December 20, 2011 01:06:07 PM you wrote:
>> Dear Andreas,
>>
>> In message<201112201253.46991.schnitzeltony@gmx.de> you wrote:
>>> I agree to your concerns but - as I understood Steve Sakoman - here the
>>
>>> situation is slightly different:
>> I think you misunderstand.
> Yes I think too :-)
>>
>>> At elder overo boards TWL4030 RTC irq is connected to gpio112.
>>> Unfortunately this pin is also used for binary revision detection.
>>> Therefore we need to send 'shut-up' to TWL4030 via i2c to avoid reading
>>> wrong revision. In SPL this must be done *before* SDRAM (timing) is set
>>> up, because the type of SDRAM is revision dependent.
>>
>> My suggestion was to check if memory initialization can not rather be
>> done _without_ reading (and without otherwise knowing) the board type
>> or revision. Usually this is possible, and I always prefer such
>> auto-adjusting solutions over hard-wired approaches that break down
>> when any of the expected inout data is not correct or not available.
>>
> Dear Wolfgang,
>
> I don't know if I want to jump also into these changes now - especially since
> I am quite new here..
> But for my intererst - since it seems more error tolerant: How is SDRAM timing
> set up without exactly knowing what type is connected? Is there a good example
> implementation in u-boot(-spl)?
Here is an example for automatic configuration with LPDDR2 memories in
OMAP4.
http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/omap-common/emif-common.c;h=62678ff5d30739ce6dc0a4fdb5ea398acc3d31ea;hb=HEAD
Look at the function emif_get_device_details().
The automatic settings make use of timing values from JEDEC spec
that is guaranteed to be safe for all devices, but not necessarily
optimal(but for all LPDDR2 devices I have seen so far their timings are
not different from the JEDEC defaults). In addition, we need to know
density etc. which can be read from the LPDDR2 device itself.
Something similar may be possible for LPDDR (I presume you are using
LPDDR), but will be somewhat complex, to say the least. Please note
that we have compiled out the above code from OMAP4 SPL due to space
constraints!
If something like 'int foo __attribute__ ((section(".data"))) = 0;' is
solving your problem that may be the easier solution at the moment.
br,
Aneesh
next prev parent reply other threads:[~2011-12-20 16:36 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-15 14:34 [U-Boot] [PATCH] overo: add SPL support Andreas Müller
2011-12-15 18:32 ` Tom Rini
2011-12-15 21:12 ` Andreas Müller
2011-12-20 1:03 ` Andreas Müller
2011-12-20 1:08 ` Tom Rini
2011-12-20 1:15 ` Andreas Müller
2011-12-20 5:43 ` Wolfgang Denk
2011-12-20 5:45 ` Tom Rini
2011-12-20 11:41 ` Wolfgang Denk
2011-12-20 11:53 ` Andreas Müller
2011-12-20 12:06 ` Wolfgang Denk
2011-12-20 12:39 ` Andreas Müller
2011-12-20 16:36 ` Aneesh V [this message]
2011-12-20 21:17 ` Wolfgang Denk
2011-12-20 12:20 ` Igor Grinberg
2011-12-20 13:55 ` Steve Sakoman
2011-12-21 1:00 ` Andreas Müller
-- strict thread matches above, loose matches on Subject: below --
2011-12-14 16:27 Andreas Müller
2011-12-14 17:24 ` Steve Sakoman
2011-12-14 23:00 ` Andreas Müller
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