From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Tue, 10 Jan 2012 14:48:27 -0700 Subject: [U-Boot] [PATCH v2] tegra: mmc: Support operation with dcache enabled In-Reply-To: <1326151240-20789-1-git-send-email-sjg@chromium.org> References: <1326151240-20789-1-git-send-email-sjg@chromium.org> Message-ID: <4F0CB22B.3010609@nvidia.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 01/09/2012 04:20 PM, Simon Glass wrote: > When the data cache is enabled we must flush on write and invalidate > on read. We also check that buffers are aligned to data cache lines > boundaries. With recent work in U-Boot this should generally be the case > but the warnings will catch problems. > > Signed-off-by: Simon Glass Seems reasonable to me. Acked-by: Stephen Warren -- nvpublic