* [U-Boot] [PATCH] mx28: fix clearing of IRQs in power init
@ 2012-01-09 20:22 Zach Sadecki
0 siblings, 0 replies; 4+ messages in thread
From: Zach Sadecki @ 2012-01-09 20:22 UTC (permalink / raw)
To: u-boot
There are 2 locations in the power init code for the mx28 where IRQs are not being cleared because incorrect methods to clear those bits were being used. This was causing my board to get stuck waiting for POWER_CTRL_VDD5V_DROOP_IRQ to clear. Using the correct method to clear the IRQs fixes it.
Signed-off-by: Zach Sadecki <zach@itwatchdogs.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index a4dc2a3..380b120 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -240,8 +240,8 @@ void mx28_enable_4p2_dcdc_input(int xfer)
clrbits_le32(&power_regs->hw_power_minpwr, POWER_MINPWR_PWD_BO);
while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ)
- clrbits_le32(&power_regs->hw_power_ctrl,
- POWER_CTRL_VBUS_VALID_IRQ);
+ writel(POWER_CTRL_VBUS_VALID_IRQ,
+ &power_regs->hw_power_ctrl_clr);
if (prev_5v_brnout) {
writel(POWER_5VCTRL_PWDN_5VBRNOUT,
@@ -256,8 +256,8 @@ void mx28_enable_4p2_dcdc_input(int xfer)
}
while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VDD5V_DROOP_IRQ)
- clrbits_le32(&power_regs->hw_power_ctrl,
- POWER_CTRL_VDD5V_DROOP_IRQ);
+ writel(POWER_CTRL_VDD5V_DROOP_IRQ,
+ &power_regs->hw_power_ctrl_clr);
if (prev_5v_droop)
clrbits_le32(&power_regs->hw_power_ctrl,
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH] mx28: fix clearing of IRQs in power init
@ 2012-01-09 20:22 Zach Sadecki
2012-01-09 23:10 ` Marek Vasut
2012-01-11 8:06 ` Stefano Babic
0 siblings, 2 replies; 4+ messages in thread
From: Zach Sadecki @ 2012-01-09 20:22 UTC (permalink / raw)
To: u-boot
There are 2 locations in the power init code for the mx28 where IRQs are not being cleared because incorrect methods to clear those bits were being used. This was causing my board to get stuck waiting for POWER_CTRL_VDD5V_DROOP_IRQ to clear. Using the correct method to clear the IRQs fixes it.
Signed-off-by: Zach Sadecki <zach@itwatchdogs.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index a4dc2a3..380b120 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -240,8 +240,8 @@ void mx28_enable_4p2_dcdc_input(int xfer)
clrbits_le32(&power_regs->hw_power_minpwr, POWER_MINPWR_PWD_BO);
while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ)
- clrbits_le32(&power_regs->hw_power_ctrl,
- POWER_CTRL_VBUS_VALID_IRQ);
+ writel(POWER_CTRL_VBUS_VALID_IRQ,
+ &power_regs->hw_power_ctrl_clr);
if (prev_5v_brnout) {
writel(POWER_5VCTRL_PWDN_5VBRNOUT,
@@ -256,8 +256,8 @@ void mx28_enable_4p2_dcdc_input(int xfer)
}
while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VDD5V_DROOP_IRQ)
- clrbits_le32(&power_regs->hw_power_ctrl,
- POWER_CTRL_VDD5V_DROOP_IRQ);
+ writel(POWER_CTRL_VDD5V_DROOP_IRQ,
+ &power_regs->hw_power_ctrl_clr);
if (prev_5v_droop)
clrbits_le32(&power_regs->hw_power_ctrl,
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH] mx28: fix clearing of IRQs in power init
2012-01-09 20:22 [U-Boot] [PATCH] mx28: fix clearing of IRQs in power init Zach Sadecki
@ 2012-01-09 23:10 ` Marek Vasut
2012-01-11 8:06 ` Stefano Babic
1 sibling, 0 replies; 4+ messages in thread
From: Marek Vasut @ 2012-01-09 23:10 UTC (permalink / raw)
To: u-boot
> There are 2 locations in the power init code for the mx28 where IRQs are
> not being cleared because incorrect methods to clear those bits were being
> used. This was causing my board to get stuck waiting for
> POWER_CTRL_VDD5V_DROOP_IRQ to clear. Using the correct method to clear
> the IRQs fixes it.
>
> Signed-off-by: Zach Sadecki <zach@itwatchdogs.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 8 ++++----
> 1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
> b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c index a4dc2a3..380b120
> 100644
> --- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
> +++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
> @@ -240,8 +240,8 @@ void mx28_enable_4p2_dcdc_input(int xfer)
> clrbits_le32(&power_regs->hw_power_minpwr, POWER_MINPWR_PWD_BO);
>
> while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ)
> - clrbits_le32(&power_regs->hw_power_ctrl,
> - POWER_CTRL_VBUS_VALID_IRQ);
> + writel(POWER_CTRL_VBUS_VALID_IRQ,
> + &power_regs->hw_power_ctrl_clr);
>
> if (prev_5v_brnout) {
> writel(POWER_5VCTRL_PWDN_5VBRNOUT,
> @@ -256,8 +256,8 @@ void mx28_enable_4p2_dcdc_input(int xfer)
> }
>
> while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VDD5V_DROOP_IRQ)
> - clrbits_le32(&power_regs->hw_power_ctrl,
> - POWER_CTRL_VDD5V_DROOP_IRQ);
> + writel(POWER_CTRL_VDD5V_DROOP_IRQ,
> + &power_regs->hw_power_ctrl_clr);
>
> if (prev_5v_droop)
> clrbits_le32(&power_regs->hw_power_ctrl,
Hello,
this is an impressive catch! I did investigation of the Freescale bootlets code
and found out you're right, it's an SCT register. So:
Acked-by: Marek Vasut <marek.vasut@gmail.com>
M
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH] mx28: fix clearing of IRQs in power init
2012-01-09 20:22 [U-Boot] [PATCH] mx28: fix clearing of IRQs in power init Zach Sadecki
2012-01-09 23:10 ` Marek Vasut
@ 2012-01-11 8:06 ` Stefano Babic
1 sibling, 0 replies; 4+ messages in thread
From: Stefano Babic @ 2012-01-11 8:06 UTC (permalink / raw)
To: u-boot
On 09/01/2012 21:22, Zach Sadecki wrote:
> There are 2 locations in the power init code for the mx28 where IRQs are not being cleared because incorrect methods to clear those bits were being used. This was causing my board to get stuck waiting for POWER_CTRL_VDD5V_DROOP_IRQ to clear. Using the correct method to clear the IRQs fixes it.
>
> Signed-off-by: Zach Sadecki <zach@itwatchdogs.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2012-01-11 8:06 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-01-09 20:22 [U-Boot] [PATCH] mx28: fix clearing of IRQs in power init Zach Sadecki
2012-01-09 23:10 ` Marek Vasut
2012-01-11 8:06 ` Stefano Babic
-- strict thread matches above, loose matches on Subject: below --
2012-01-09 20:22 Zach Sadecki
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox