From: Matthias Fuchs <matthias.fuchs@esd.eu>
To: u-boot@lists.denx.de
Subject: [U-Boot] SPI Test
Date: Mon, 16 Jan 2012 12:29:09 +0100 [thread overview]
Message-ID: <4F140A05.6050503@esd.eu> (raw)
In-Reply-To: <201201161223.57528.marek.vasut@gmail.com>
On 16.01.2012 12:23, Marek Vasut wrote:
>> Hmm,
>>
>> can you tell me what type of SPI flash you have installed?
>> Typically the read-status-register operation requires a low to high
>> transition to get terminated. This is from my flash' datasheet:
>>
>> Read-Status-Register (RDSR)
>> The Read-Status-Register (RDSR) instruction allows reading of the status
>> register. The status register
>> may be read at any time even during a Write (Program/Erase) operation.
>> When a Write operation is in
>> progress, the Busy bit may be checked before sending any new commands to
>> assure that the new
>> commands are properly received by the device. CE# must be driven low
>> before the RDSR instruction is
>> entered and remain low until the status data is read.
>> Read-Status-Register is continuous with ongoing
>> clock cycles until it is terminated by a low to high transition of the
>> CE#. See Figure 16 for the RDSR instruction sequence...
>> It's a SST part.
>
> I just noticed ... Matthias, why don't you CC the mailing list?
Fabio wanted to stop the list being flood with this discussion.
But you are right. Let's stop this thread an return to the list.
Matthias
>
> Also, I can't really remember now what part there is.
next prev parent reply other threads:[~2012-01-16 11:29 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CAOMZO5CEjb-Gph6-Qd5b=tgge1SD=GTHy62_CzV3LJdxoP8kMw@mail.gmail.com>
[not found] ` <201201151949.44034.marek.vasut@gmail.com>
[not found] ` <4F13D1DB.1060105@esd.eu>
2012-01-16 11:23 ` [U-Boot] SPI Test Marek Vasut
2012-01-16 11:29 ` Matthias Fuchs [this message]
2012-01-16 15:48 ` Marek Vasut
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