* [U-Boot] [PATCH v3 1/7] ehci-omap: driver for EHCI host on OMAP3
2012-02-03 13:38 [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs Govindraj.R
@ 2012-02-03 13:38 ` Govindraj.R
2012-02-03 13:38 ` [U-Boot] [PATCH v3 2/7] ehci-omap: Clean up added ehci-omap.c Govindraj.R
` (6 subsequent siblings)
7 siblings, 0 replies; 20+ messages in thread
From: Govindraj.R @ 2012-02-03 13:38 UTC (permalink / raw)
To: u-boot
From: Ilya Yanok <yanok@emcraft.com>
Taken from Beagle code. Tested on mcx board (AM3517-based).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
---
board/ti/beagle/beagle.c | 101 --------------------------
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ehci-omap.c | 156 ++++++++++++++++++++++++++++++++++++++++
include/configs/omap3_beagle.h | 3 +
4 files changed, 160 insertions(+), 101 deletions(-)
create mode 100644 drivers/usb/host/ehci-omap.c
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 5c04b34..98548ab 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -42,15 +42,6 @@
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-types.h>
-#ifdef CONFIG_USB_EHCI
-#include <usb.h>
-#include <asm/arch/clocks.h>
-#include <asm/arch/clocks_omap3.h>
-#include <asm/arch/ehci_omap3.h>
-/* from drivers/usb/host/ehci-core.h */
-extern struct ehci_hccr *hccr;
-extern volatile struct ehci_hcor *hcor;
-#endif
#include "beagle.h"
#include <command.h>
@@ -445,104 +436,12 @@ int board_mmc_init(bd_t *bis)
#endif
#ifdef CONFIG_USB_EHCI
-
-#define GPIO_PHY_RESET 147
-
-/* Reset is needed otherwise the kernel-driver will throw an error. */
-int ehci_hcd_stop(void)
-{
- pr_debug("Resetting OMAP3 EHCI\n");
- gpio_set_value(GPIO_PHY_RESET, 0);
- writel(OMAP_UHH_SYSCONFIG_SOFTRESET, OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
- /* disable USB clocks */
- struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
- sr32(&prcm_base->iclken_usbhost, 0, 1, 0);
- sr32(&prcm_base->fclken_usbhost, 0, 2, 0);
- sr32(&prcm_base->iclken3_core, 2, 1, 0);
- sr32(&prcm_base->fclken3_core, 2, 1, 0);
- return 0;
-}
-
/* Call usb_stop() before starting the kernel */
void show_boot_progress(int val)
{
if(val == 15)
usb_stop();
}
-
-/*
- * Initialize the OMAP3 EHCI controller and PHY on the BeagleBoard.
- * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37.
- * See there for additional Copyrights.
- */
-int ehci_hcd_init(void)
-{
- pr_debug("Initializing OMAP3 ECHI\n");
-
- /* Put the PHY in RESET */
- gpio_request(GPIO_PHY_RESET, "");
- gpio_direction_output(GPIO_PHY_RESET, 0);
- gpio_set_value(GPIO_PHY_RESET, 0);
-
- /* Hold the PHY in RESET for enough time till DIR is high */
- /* Refer: ISSUE1 */
- udelay(10);
-
- struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
- /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
- sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
- /*
- * Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
- * and USBHOST_120M_FCLK (USBHOST_FCLK2)
- */
- sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
- /* Enable USBTTL_ICLK */
- sr32(&prcm_base->iclken3_core, 2, 1, 1);
- /* Enable USBTTL_FCLK */
- sr32(&prcm_base->fclken3_core, 2, 1, 1);
- pr_debug("USB clocks enabled\n");
-
- /* perform TLL soft reset, and wait until reset is complete */
- writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
- OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
- /* Wait for TLL reset to complete */
- while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS)
- & OMAP_USBTLL_SYSSTATUS_RESETDONE));
- pr_debug("TLL reset done\n");
-
- writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
- OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
- OMAP_USBTLL_SYSCONFIG_CACTIVITY,
- OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
-
- /* Put UHH in NoIdle/NoStandby mode */
- writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP
- | OMAP_UHH_SYSCONFIG_SIDLEMODE
- | OMAP_UHH_SYSCONFIG_CACTIVITY
- | OMAP_UHH_SYSCONFIG_MIDLEMODE,
- OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
-
- /* setup burst configurations */
- writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
- | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
- | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN,
- OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG);
-
- /*
- * Refer ISSUE1:
- * Hold the PHY in RESET for enough time till
- * PHY is settled and ready
- */
- udelay(10);
- gpio_set_value(GPIO_PHY_RESET, 1);
-
- hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE);
- hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10);
-
- pr_debug("OMAP3 EHCI init done\n");
- return 0;
-}
-
#endif /* CONFIG_USB_EHCI */
#ifndef CONFIG_SPL_BUILD
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 77e217f..975c3e5 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -43,6 +43,7 @@ endif
COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o
COBJS-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o
COBJS-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o
+COBJS-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
COBJS-$(CONFIG_USB_EHCI_KIRKWOOD) += ehci-kirkwood.o
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
new file mode 100644
index 0000000..93d3bb7
--- /dev/null
+++ b/drivers/usb/host/ehci-omap.c
@@ -0,0 +1,156 @@
+/*
+ * (C) Copyright 2011 Ilya Yanok, Emcraft Systems
+ * (C) Copyright 2004-2008
+ * Texas Instruments, <www.ti.com>
+ *
+ * Derived from Beagle Board code by
+ * Sunil Kumar <sunilsaini05@gmail.com>
+ * Shashi Ranjan <shashiranjanmca05@gmail.com>
+ *
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/clocks_omap3.h>
+#include <asm/arch/ehci_omap3.h>
+#include <asm/arch/sys_proto.h>
+#include "ehci-core.h"
+
+inline int __board_usb_init(void)
+{
+ return 0;
+}
+int board_usb_init(void) __attribute__((weak, alias("__board_usb_init")));
+
+#if defined(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO) || \
+ defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO)
+/* controls PHY(s) reset signal(s) */
+static inline void omap_ehci_phy_reset(int on, int delay)
+{
+ /*
+ * Refer ISSUE1:
+ * Hold the PHY in RESET for enough time till
+ * PHY is settled and ready
+ */
+ if (delay && !on)
+ udelay(delay);
+#ifdef CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
+ gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB PHY1 reset");
+ gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, !on);
+#endif
+#ifdef CONFIG_OMAP_EHCI_PHY2_RESET_GPIO
+ gpio_request(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO, "USB PHY2 reset");
+ gpio_direction_output(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO, !on);
+#endif
+
+ /* Hold the PHY in RESET for enough time till DIR is high */
+ /* Refer: ISSUE1 */
+ if (delay && on)
+ udelay(delay);
+}
+#else
+#define omap_ehci_phy_reset(on, delay) do {} while (0)
+#endif
+
+/* Reset is needed otherwise the kernel-driver will throw an error. */
+int ehci_hcd_stop(void)
+{
+ debug("Resetting OMAP3 EHCI\n");
+ omap_ehci_phy_reset(1, 0);
+ writel(OMAP_UHH_SYSCONFIG_SOFTRESET,
+ OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
+ /* disable USB clocks */
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+ sr32(&prcm_base->iclken_usbhost, 0, 1, 0);
+ sr32(&prcm_base->fclken_usbhost, 0, 2, 0);
+ sr32(&prcm_base->iclken3_core, 2, 1, 0);
+ sr32(&prcm_base->fclken3_core, 2, 1, 0);
+ return 0;
+}
+
+/*
+ * Initialize the OMAP3 EHCI controller and PHY.
+ * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37.
+ * See there for additional Copyrights.
+ */
+int ehci_hcd_init(void)
+{
+ int ret;
+
+ debug("Initializing OMAP3 EHCI\n");
+
+ ret = board_usb_init();
+ if (ret < 0)
+ return ret;
+
+ /* Put the PHY in RESET */
+ omap_ehci_phy_reset(1, 10);
+
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+ /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
+ sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
+ /*
+ * Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
+ * and USBHOST_120M_FCLK (USBHOST_FCLK2)
+ */
+ sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
+ /* Enable USBTTL_ICLK */
+ sr32(&prcm_base->iclken3_core, 2, 1, 1);
+ /* Enable USBTTL_FCLK */
+ sr32(&prcm_base->fclken3_core, 2, 1, 1);
+ debug("USB clocks enabled\n");
+
+ /* perform TLL soft reset, and wait until reset is complete */
+ writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
+ OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
+ /* Wait for TLL reset to complete */
+ while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS)
+ & OMAP_USBTLL_SYSSTATUS_RESETDONE))
+ ;
+ debug("TLL reset done\n");
+
+ writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
+ OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
+ OMAP_USBTLL_SYSCONFIG_CACTIVITY,
+ OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
+
+ /* Put UHH in NoIdle/NoStandby mode */
+ writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP
+ | OMAP_UHH_SYSCONFIG_SIDLEMODE
+ | OMAP_UHH_SYSCONFIG_CACTIVITY
+ | OMAP_UHH_SYSCONFIG_MIDLEMODE,
+ OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
+
+ /* setup burst configurations */
+ writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
+ | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
+ | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN,
+ OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG);
+
+ omap_ehci_phy_reset(0, 10);
+
+ hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE);
+ hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10);
+
+ debug("OMAP3 EHCI init done\n");
+ return 0;
+}
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 91af8a0..b4d6443 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -129,6 +129,9 @@
/* USB EHCI */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+/*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_SMSC95XX
--
1.7.5.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v3 2/7] ehci-omap: Clean up added ehci-omap.c
2012-02-03 13:38 [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs Govindraj.R
2012-02-03 13:38 ` [U-Boot] [PATCH v3 1/7] ehci-omap: driver for EHCI host on OMAP3 Govindraj.R
@ 2012-02-03 13:38 ` Govindraj.R
2012-02-06 11:26 ` Igor Grinberg
2012-02-03 13:38 ` [U-Boot] [PATCH v3 3/7] OMAP3+: Clock: Adding ehci clock enabling Govindraj.R
` (5 subsequent siblings)
7 siblings, 1 reply; 20+ messages in thread
From: Govindraj.R @ 2012-02-03 13:38 UTC (permalink / raw)
To: u-boot
From: "Govindraj.R" <govindraj.raja@ti.com>
Clean up added ehci-omap.c and make it generic for re-use across
omap-soc having same ehci ip block. Also pass the modes to be configured
from board file and configure the ports accordingly. All usb layers
are not cache aligned, till then keep cache off for usb ops as ehci will use
internally dma for all usb ops.
* Add a generic common header ehci-omap.h having common ip block
data and reg shifts.
* Rename and modify ehci-omap3 to ehci.h retain only conflicting
sysc reg shifts remove others and move to common header file.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
arch/arm/include/asm/arch-omap3/ehci.h | 55 +++++++
arch/arm/include/asm/arch-omap3/ehci_omap3.h | 58 -------
arch/arm/include/asm/arch-omap4/ehci.h | 49 ++++++
arch/arm/include/asm/ehci-omap.h | 148 ++++++++++++++++++
drivers/usb/host/ehci-omap.c | 212 +++++++++++++++++++-------
5 files changed, 408 insertions(+), 114 deletions(-)
create mode 100644 arch/arm/include/asm/arch-omap3/ehci.h
delete mode 100644 arch/arm/include/asm/arch-omap3/ehci_omap3.h
create mode 100644 arch/arm/include/asm/arch-omap4/ehci.h
create mode 100644 arch/arm/include/asm/ehci-omap.h
diff --git a/arch/arm/include/asm/arch-omap3/ehci.h b/arch/arm/include/asm/arch-omap3/ehci.h
new file mode 100644
index 0000000..0f73d20
--- /dev/null
+++ b/arch/arm/include/asm/arch-omap3/ehci.h
@@ -0,0 +1,55 @@
+/*
+ * (C) Copyright 2011
+ * Alexander Holler <holler@ahsoftware.de>
+ *
+ * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37
+ *
+ * See there for additional Copyrights.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+#ifndef _OMAP3_EHCI_H_
+#define _OMAP3_EHCI_H_
+
+/* USB/EHCI registers */
+#define OMAP_USBTLL_BASE 0x48062000UL
+#define OMAP_UHH_BASE 0x48064000UL
+#define OMAP_EHCI_BASE 0x48064800UL
+
+/* TLL Register Set */
+#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
+#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
+#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
+#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
+#define OMAP_USBTLL_SYSSTATUS_RESETDONE 1
+
+/* UHH Register Set */
+#define OMAP_UHH_SYSCONFIG_SOFTRESET (1 << 1)
+#define OMAP_UHH_SYSCONFIG_CACTIVITY (1 << 8)
+#define OMAP_UHH_SYSCONFIG_SIDLEMODE (1 << 3)
+#define OMAP_UHH_SYSCONFIG_ENAWAKEUP (1 << 2)
+#define OMAP_UHH_SYSCONFIG_MIDLEMODE (1 << 12)
+#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE (1 << 2)
+
+#define OMAP_UHH_SYSCONFIG_VAL (OMAP_UHH_SYSCONFIG_CACTIVITY | \
+ OMAP_UHH_SYSCONFIG_SIDLEMODE | \
+ OMAP_UHH_SYSCONFIG_ENAWAKEUP | \
+ OMAP_UHH_SYSCONFIG_MIDLEMODE)
+
+#endif /* _OMAP3_EHCI_H_ */
diff --git a/arch/arm/include/asm/arch-omap3/ehci_omap3.h b/arch/arm/include/asm/arch-omap3/ehci_omap3.h
deleted file mode 100644
index cd01f50..0000000
--- a/arch/arm/include/asm/arch-omap3/ehci_omap3.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2011
- * Alexander Holler <holler@ahsoftware.de>
- *
- * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37
- *
- * See there for additional Copyrights.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-#ifndef _EHCI_OMAP3_H_
-#define _EHCI_OMAP3_H_
-
-/* USB/EHCI registers */
-#define OMAP3_USBTLL_BASE 0x48062000UL
-#define OMAP3_UHH_BASE 0x48064000UL
-#define OMAP3_EHCI_BASE 0x48064800UL
-
-/* TLL Register Set */
-#define OMAP_USBTLL_SYSCONFIG (0x10)
-#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
-#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
-#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
-#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
-
-#define OMAP_USBTLL_SYSSTATUS (0x14)
-#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
-
-/* UHH Register Set */
-#define OMAP_UHH_SYSCONFIG (0x10)
-#define OMAP_UHH_SYSCONFIG_SOFTRESET (1 << 1)
-#define OMAP_UHH_SYSCONFIG_CACTIVITY (1 << 8)
-#define OMAP_UHH_SYSCONFIG_SIDLEMODE (1 << 3)
-#define OMAP_UHH_SYSCONFIG_ENAWAKEUP (1 << 2)
-#define OMAP_UHH_SYSCONFIG_MIDLEMODE (1 << 12)
-
-#define OMAP_UHH_HOSTCONFIG (0x40)
-#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2)
-#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN (1 << 3)
-#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN (1 << 4)
-
-#endif /* _EHCI_OMAP3_H_ */
diff --git a/arch/arm/include/asm/arch-omap4/ehci.h b/arch/arm/include/asm/arch-omap4/ehci.h
new file mode 100644
index 0000000..984c8b9
--- /dev/null
+++ b/arch/arm/include/asm/arch-omap4/ehci.h
@@ -0,0 +1,49 @@
+/*
+ * OMAP EHCI port support
+ * Based on LINUX KERNEL
+ * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com
+ * Author: Govindraj R <govindraj.raja@ti.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _OMAP4_EHCI_H_
+#define _OMAP4_EHCI_H_
+
+#define OMAP_EHCI_BASE (OMAP44XX_L4_CORE_BASE + 0x64C00)
+#define OMAP_UHH_BASE (OMAP44XX_L4_CORE_BASE + 0x64000)
+#define OMAP_USBTLL_BASE (OMAP44XX_L4_CORE_BASE + 0x62000)
+
+/* UHH, TLL and opt clocks */
+#define CM_L3INIT_HSUSBHOST_CLKCTRL 0x4A009358UL
+
+#define HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK (1 << 24)
+
+/* TLL Register Set */
+#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
+#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
+#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
+#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
+#define OMAP_USBTLL_SYSSTATUS_RESETDONE 1
+
+#define OMAP_UHH_SYSCONFIG_SOFTRESET 1
+#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE (1 << 2)
+#define OMAP_UHH_SYSCONFIG_NOIDLE (1 << 2)
+#define OMAP_UHH_SYSCONFIG_NOSTDBY (1 << 4)
+
+#define OMAP_UHH_SYSCONFIG_VAL (OMAP_UHH_SYSCONFIG_NOIDLE | \
+ OMAP_UHH_SYSCONFIG_NOSTDBY)
+
+#endif /* _OMAP4_EHCI_H_ */
diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
new file mode 100644
index 0000000..c99ac20
--- /dev/null
+++ b/arch/arm/include/asm/ehci-omap.h
@@ -0,0 +1,148 @@
+/*
+ * OMAP EHCI port support
+ * Based on LINUX KERNEL
+ * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com*
+ * Author: Govindraj R <govindraj.raja@ti.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _OMAP_COMMON_EHCI_H_
+#define _OMAP_COMMON_EHCI_H_
+
+enum usbhs_omap_port_mode {
+ OMAP_USBHS_PORT_MODE_UNUSED,
+ OMAP_EHCI_PORT_MODE_PHY,
+ OMAP_EHCI_PORT_MODE_TLL,
+ OMAP_EHCI_PORT_MODE_HSIC,
+};
+
+#ifdef CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
+#define OMAP_HS_USB_PORTS CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
+#else
+#define OMAP_HS_USB_PORTS 3
+#endif
+
+#define is_ehci_phy_mode(x) ((x) == OMAP_EHCI_PORT_MODE_PHY)
+#define is_ehci_tll_mode(x) ((x) == OMAP_EHCI_PORT_MODE_TLL)
+#define is_ehci_hsic_mode(x) ((x) == OMAP_EHCI_PORT_MODE_HSIC)
+
+/* Values of UHH_REVISION - Note: these are not given in the TRM */
+#define OMAP_USBHS_REV1 0x00000010 /* OMAP3 */
+#define OMAP_USBHS_REV2 0x50700100 /* OMAP4 */
+
+/* UHH Register Set */
+#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2)
+#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN (1 << 3)
+#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN (1 << 4)
+#define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN (1 << 5)
+
+#define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS 1
+#define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS (1 << 11)
+#define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS (1 << 12)
+#define OMAP4_UHH_HOSTCONFIG_APP_START_CLK (1 << 31)
+
+#define OMAP_P1_MODE_CLEAR (3 << 16)
+#define OMAP_P1_MODE_TLL (1 << 16)
+#define OMAP_P1_MODE_HSIC (3 << 16)
+#define OMAP_P2_MODE_CLEAR (3 << 18)
+#define OMAP_P2_MODE_TLL (1 << 18)
+#define OMAP_P2_MODE_HSIC (3 << 18)
+#define OMAP_P3_MODE_HSIC (3 << 20)
+
+/* EHCI Register Set */
+#define EHCI_INSNREG04_DISABLE_UNSUSPEND (1 << 5)
+#define EHCI_INSNREG05_ULPI_CONTROL_SHIFT 31
+#define EHCI_INSNREG05_ULPI_PORTSEL_SHIFT 24
+#define EHCI_INSNREG05_ULPI_OPSEL_SHIFT 22
+#define EHCI_INSNREG05_ULPI_REGADD_SHIFT 16
+
+#define OMAP_REV1_TLL_CHANNEL_COUNT 3
+#define OMAP_REV2_TLL_CHANNEL_COUNT 2
+
+/* TLL Register Set */
+#define OMAP_TLL_CHANNEL_CONF(num) (0x004 * num)
+#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16)
+#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15)
+#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
+#define OMAP_TLL_CHANNEL_CONF_CHANMODE_TRANSPARENT_UTMI (2 << 1)
+#define OMAP_TLL_CHANNEL_CONF_CHANEN 1
+
+/* ULPI */
+#define ULPI_SET(a) (a + 1)
+#define ULPI_CLR(a) (a + 2)
+#define ULPI_FUNC_CTRL 0x04
+#define ULPI_FUNC_CTRL_RESET (1 << 5)
+
+struct omap_usbhs_board_data {
+ enum usbhs_omap_port_mode port_mode[OMAP_HS_USB_PORTS];
+};
+
+struct omap_usbtll {
+ u32 rev; /* 0x00 */
+ u32 hwinfo; /* 0x04 */
+ u8 reserved1[0x8];
+ u32 sysc; /* 0x10 */
+ u32 syss; /* 0x14 */
+ u32 irqst; /* 0x18 */
+ u32 irqen; /* 0x1c */
+ u8 reserved2[0x10];
+ u32 shared_conf; /* 0x30 */
+ u8 reserved3[0xc];
+ u32 channel_conf; /* 0x40 */
+};
+
+struct omap_uhh {
+ u32 rev; /* 0x00 */
+ u32 hwinfo; /* 0x04 */
+ u8 reserved1[0x8];
+ u32 sysc; /* 0x10 */
+ u32 syss; /* 0x14 */
+ u8 reserved2[0x28];
+ u32 hostconfig; /* 0x40 */
+ u32 debugcsr; /* 0x44 */
+};
+
+struct omap_ehci {
+ u32 hccapbase; /* 0x00 */
+ u32 hcsparams; /* 0x04 */
+ u32 hccparams; /* 0x08 */
+ u8 reserved1[0x04];
+ u32 usbcmd; /* 0x10 */
+ u32 usbsts; /* 0x14 */
+ u32 usbintr; /* 0x18 */
+ u32 frindex; /* 0x1c */
+ u32 ctrldssegment; /* 0x20 */
+ u32 periodiclistbase; /* 0x24 */
+ u32 asysnclistaddr; /* 0x28 */
+ u8 reserved2[0x24];
+ u32 configflag; /* 0x50 */
+ u32 portsc_i; /* 0x54 */
+ u8 reserved3[0x38];
+ u32 insreg00; /* 0x90 */
+ u32 insreg01; /* 0x94 */
+ u32 insreg02; /* 0x98 */
+ u32 insreg03; /* 0x9c */
+ u32 insreg04; /* 0xa0 */
+ u32 insreg05_utmi_ulpi; /* 0xa4 */
+ u32 insreg06; /* 0xa8 */
+ u32 insreg07; /* 0xac */
+ u32 insreg08; /* 0xb0 */
+};
+
+int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata);
+int omap_ehci_hcd_stop(void);
+
+#endif /* _OMAP_COMMON_EHCI_H_ */
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 93d3bb7..89c3c3a 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -27,14 +27,79 @@
*/
#include <common.h>
#include <usb.h>
+#include <usb/ulpi.h>
+#include <errno.h>
#include <asm/io.h>
#include <asm/gpio.h>
-#include <asm/arch/clocks.h>
-#include <asm/arch/clocks_omap3.h>
-#include <asm/arch/ehci_omap3.h>
-#include <asm/arch/sys_proto.h>
+#include <asm/arch/ehci.h>
+#include <asm/ehci-omap.h>
#include "ehci-core.h"
+static struct omap_uhh *const uhh = (struct omap_uhh *)OMAP_UHH_BASE;
+static struct omap_usbtll *const usbtll = (struct omap_usbtll *)OMAP_USBTLL_BASE;
+static struct omap_ehci *const ehci = (struct omap_ehci *)OMAP_EHCI_BASE;
+
+static int omap_uhh_reset(void)
+{
+ unsigned long init = get_timer(0);
+
+ /* perform UHH soft reset, and wait until reset is complete */
+ writel(OMAP_UHH_SYSCONFIG_SOFTRESET, &uhh->sysc);
+
+ /* Wait for UHH reset to complete */
+ while (!(readl(&uhh->syss) & OMAP_UHH_SYSSTATUS_EHCI_RESETDONE))
+ if (get_timer(init) > CONFIG_SYS_HZ) {
+ debug("OMAP UHH error: timeout resetting ehci\n");
+ return -EL3RST;
+ }
+
+ return 0;
+}
+
+static int omap_ehci_tll_reset(void)
+{
+ unsigned long init = get_timer(0);
+
+ /* perform TLL soft reset, and wait until reset is complete */
+ writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET, &usbtll->sysc);
+
+ /* Wait for TLL reset to complete */
+ while (!(readl(&usbtll->syss) & OMAP_USBTLL_SYSSTATUS_RESETDONE))
+ if (get_timer(init) > CONFIG_SYS_HZ) {
+ debug("OMAP EHCI error: timeout resetting TLL\n");
+ return -EL3RST;
+ }
+
+ return 0;
+}
+
+static void omap_usbhs_hsic_init(int port)
+{
+ unsigned int reg;
+
+ /* Enable channels now */
+ reg = readl(&usbtll->channel_conf + port);
+
+ setbits_le32(®, (OMAP_TLL_CHANNEL_CONF_CHANMODE_TRANSPARENT_UTMI
+ | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
+ | OMAP_TLL_CHANNEL_CONF_DRVVBUS
+ | OMAP_TLL_CHANNEL_CONF_CHRGVBUS
+ | OMAP_TLL_CHANNEL_CONF_CHANEN));
+
+ writel(reg, &usbtll->channel_conf + port);
+}
+
+static void omap_ehci_soft_phy_reset(int port)
+{
+ struct ulpi_viewport ulpi_vp;
+
+ ulpi_vp.viewport_addr = (u32)&ehci->insreg05_utmi_ulpi;
+ ulpi_vp.port_num = port;
+
+ ulpi_reset(&ulpi_vp);
+
+}
+
inline int __board_usb_init(void)
{
return 0;
@@ -72,31 +137,31 @@ static inline void omap_ehci_phy_reset(int on, int delay)
#endif
/* Reset is needed otherwise the kernel-driver will throw an error. */
-int ehci_hcd_stop(void)
+int omap_ehci_hcd_stop(void)
{
- debug("Resetting OMAP3 EHCI\n");
+ debug("Resetting OMAP EHCI\n");
omap_ehci_phy_reset(1, 0);
- writel(OMAP_UHH_SYSCONFIG_SOFTRESET,
- OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
- /* disable USB clocks */
- struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
- sr32(&prcm_base->iclken_usbhost, 0, 1, 0);
- sr32(&prcm_base->fclken_usbhost, 0, 2, 0);
- sr32(&prcm_base->iclken3_core, 2, 1, 0);
- sr32(&prcm_base->fclken3_core, 2, 1, 0);
+
+ if (omap_uhh_reset() < 0)
+ return -1;
+
+ if (omap_ehci_tll_reset() < 0)
+ return -1;
+
return 0;
}
/*
- * Initialize the OMAP3 EHCI controller and PHY.
- * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37.
+ * Initialize the OMAP EHCI controller and PHY.
+ * Based on "drivers/usb/host/ehci-omap.c" from Linux 3.1
* See there for additional Copyrights.
*/
-int ehci_hcd_init(void)
+int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata)
{
- int ret;
+ int ret = 0;
+ unsigned int i, reg = 0, rev = 0;
- debug("Initializing OMAP3 EHCI\n");
+ debug("Initializing OMAP EHCI\n");
ret = board_usb_init();
if (ret < 0)
@@ -105,52 +170,87 @@ int ehci_hcd_init(void)
/* Put the PHY in RESET */
omap_ehci_phy_reset(1, 10);
- struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
- /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
- sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
- /*
- * Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
- * and USBHOST_120M_FCLK (USBHOST_FCLK2)
- */
- sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
- /* Enable USBTTL_ICLK */
- sr32(&prcm_base->iclken3_core, 2, 1, 1);
- /* Enable USBTTL_FCLK */
- sr32(&prcm_base->fclken3_core, 2, 1, 1);
- debug("USB clocks enabled\n");
+ ret = omap_uhh_reset();
+ if (ret < 0)
+ return ret;
- /* perform TLL soft reset, and wait until reset is complete */
- writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
- OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
- /* Wait for TLL reset to complete */
- while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS)
- & OMAP_USBTLL_SYSSTATUS_RESETDONE))
- ;
- debug("TLL reset done\n");
+ ret = omap_ehci_tll_reset();
+ if (ret)
+ return ret;
writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
- OMAP_USBTLL_SYSCONFIG_CACTIVITY,
- OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
+ OMAP_USBTLL_SYSCONFIG_CACTIVITY, &usbtll->sysc);
/* Put UHH in NoIdle/NoStandby mode */
- writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP
- | OMAP_UHH_SYSCONFIG_SIDLEMODE
- | OMAP_UHH_SYSCONFIG_CACTIVITY
- | OMAP_UHH_SYSCONFIG_MIDLEMODE,
- OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
-
- /* setup burst configurations */
- writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
- | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
- | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN,
- OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG);
+ writel(OMAP_UHH_SYSCONFIG_VAL, &uhh->sysc);
+
+ /* setup ULPI bypass and burst configurations */
+ clrsetbits_le32(®, OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN,
+ (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN |
+ OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN |
+ OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN));
+
+ rev = readl(&uhh->rev);
+ if (rev == OMAP_USBHS_REV1) {
+ if (is_ehci_phy_mode(usbhs_pdata->port_mode[0]))
+ clrbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS);
+ else
+ setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS);
+
+ if (is_ehci_phy_mode(usbhs_pdata->port_mode[1]))
+ clrbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS);
+ else
+ setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS);
+
+ if (is_ehci_phy_mode(usbhs_pdata->port_mode[2]))
+ clrbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
+ else
+ setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS);
+ } else if (rev == OMAP_USBHS_REV2) {
+ clrsetbits_le32(®, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR),
+ OMAP4_UHH_HOSTCONFIG_APP_START_CLK);
+
+ /* Clear port mode fields for PHY mode*/
+
+ if (is_ehci_hsic_mode(usbhs_pdata->port_mode[0]))
+ setbits_le32(®, OMAP_P1_MODE_HSIC);
+
+ if (is_ehci_hsic_mode(usbhs_pdata->port_mode[1]))
+ setbits_le32(®, OMAP_P2_MODE_HSIC);
+
+ if (is_ehci_hsic_mode(usbhs_pdata->port_mode[2]))
+ setbits_le32(®, OMAP_P3_MODE_HSIC);
+ }
+
+ debug("OMAP UHH_REVISION 0x%x\n", rev);
+ writel(reg, &uhh->hostconfig);
+
+ for (i = 0; i < OMAP_HS_USB_PORTS; i++)
+ if (is_ehci_hsic_mode(usbhs_pdata->port_mode[i]))
+ omap_usbhs_hsic_init(i);
omap_ehci_phy_reset(0, 10);
- hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE);
- hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10);
+ /*
+ * An undocumented "feature" in the OMAP3 EHCI controller,
+ * causes suspended ports to be taken out of suspend when
+ * the USBCMD.Run/Stop bit is cleared (for example when
+ * we do ehci_bus_suspend).
+ * This breaks suspend-resume if the root-hub is allowed
+ * to suspend. Writing 1 to this undocumented register bit
+ * disables this feature and restores normal behavior.
+ */
+ writel(EHCI_INSNREG04_DISABLE_UNSUSPEND, &ehci->insreg04);
+
+ for (i = 0; i < OMAP_HS_USB_PORTS; i++)
+ if (is_ehci_phy_mode(usbhs_pdata->port_mode[i]))
+ omap_ehci_soft_phy_reset(i);
+
+ dcache_disable();
+ hccr = (struct ehci_hccr *)(OMAP_EHCI_BASE);
+ hcor = (struct ehci_hcor *)(OMAP_EHCI_BASE + 0x10);
- debug("OMAP3 EHCI init done\n");
+ debug("OMAP EHCI init done\n");
return 0;
}
--
1.7.5.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v3 2/7] ehci-omap: Clean up added ehci-omap.c
2012-02-03 13:38 ` [U-Boot] [PATCH v3 2/7] ehci-omap: Clean up added ehci-omap.c Govindraj.R
@ 2012-02-06 11:26 ` Igor Grinberg
0 siblings, 0 replies; 20+ messages in thread
From: Igor Grinberg @ 2012-02-06 11:26 UTC (permalink / raw)
To: u-boot
On 02/03/12 15:38, Govindraj.R wrote:
> From: "Govindraj.R" <govindraj.raja@ti.com>
>
> Clean up added ehci-omap.c and make it generic for re-use across
> omap-soc having same ehci ip block. Also pass the modes to be configured
> from board file and configure the ports accordingly. All usb layers
> are not cache aligned, till then keep cache off for usb ops as ehci will use
> internally dma for all usb ops.
>
> * Add a generic common header ehci-omap.h having common ip block
> data and reg shifts.
> * Rename and modify ehci-omap3 to ehci.h retain only conflicting
> sysc reg shifts remove others and move to common header file.
>
> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Some final neats below, otherwise:
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
> ---
> arch/arm/include/asm/arch-omap3/ehci.h | 55 +++++++
> arch/arm/include/asm/arch-omap3/ehci_omap3.h | 58 -------
> arch/arm/include/asm/arch-omap4/ehci.h | 49 ++++++
> arch/arm/include/asm/ehci-omap.h | 148 ++++++++++++++++++
> drivers/usb/host/ehci-omap.c | 212 +++++++++++++++++++-------
> 5 files changed, 408 insertions(+), 114 deletions(-)
> create mode 100644 arch/arm/include/asm/arch-omap3/ehci.h
> delete mode 100644 arch/arm/include/asm/arch-omap3/ehci_omap3.h
> create mode 100644 arch/arm/include/asm/arch-omap4/ehci.h
> create mode 100644 arch/arm/include/asm/ehci-omap.h
[...]
> diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
> new file mode 100644
> index 0000000..c99ac20
> --- /dev/null
> +++ b/arch/arm/include/asm/ehci-omap.h
[...]
> +
> +/* ULPI */
> +#define ULPI_SET(a) (a + 1)
> +#define ULPI_CLR(a) (a + 2)
> +#define ULPI_FUNC_CTRL 0x04
> +#define ULPI_FUNC_CTRL_RESET (1 << 5)
The above should be removed as it is not used anymore.
> +
> +struct omap_usbhs_board_data {
> + enum usbhs_omap_port_mode port_mode[OMAP_HS_USB_PORTS];
> +};
> +
> +struct omap_usbtll {
> + u32 rev; /* 0x00 */
> + u32 hwinfo; /* 0x04 */
> + u8 reserved1[0x8];
Are you sure you want this to be an array of bytes instead of
register (u32) wide fields?
IMO,
u32 reserved1[2];
looks much better than:
u8 reserved1[0x8];
and does not have alignment issues, but if you think u8 is better,
I will not object.
> + u32 sysc; /* 0x10 */
> + u32 syss; /* 0x14 */
> + u32 irqst; /* 0x18 */
> + u32 irqen; /* 0x1c */
> + u8 reserved2[0x10];
> + u32 shared_conf; /* 0x30 */
> + u8 reserved3[0xc];
> + u32 channel_conf; /* 0x40 */
> +};
> +
> +struct omap_uhh {
> + u32 rev; /* 0x00 */
> + u32 hwinfo; /* 0x04 */
> + u8 reserved1[0x8];
> + u32 sysc; /* 0x10 */
> + u32 syss; /* 0x14 */
> + u8 reserved2[0x28];
> + u32 hostconfig; /* 0x40 */
> + u32 debugcsr; /* 0x44 */
> +};
> +
> +struct omap_ehci {
> + u32 hccapbase; /* 0x00 */
> + u32 hcsparams; /* 0x04 */
> + u32 hccparams; /* 0x08 */
> + u8 reserved1[0x04];
> + u32 usbcmd; /* 0x10 */
> + u32 usbsts; /* 0x14 */
> + u32 usbintr; /* 0x18 */
> + u32 frindex; /* 0x1c */
> + u32 ctrldssegment; /* 0x20 */
> + u32 periodiclistbase; /* 0x24 */
> + u32 asysnclistaddr; /* 0x28 */
> + u8 reserved2[0x24];
> + u32 configflag; /* 0x50 */
> + u32 portsc_i; /* 0x54 */
> + u8 reserved3[0x38];
> + u32 insreg00; /* 0x90 */
> + u32 insreg01; /* 0x94 */
> + u32 insreg02; /* 0x98 */
> + u32 insreg03; /* 0x9c */
> + u32 insreg04; /* 0xa0 */
> + u32 insreg05_utmi_ulpi; /* 0xa4 */
> + u32 insreg06; /* 0xa8 */
> + u32 insreg07; /* 0xac */
> + u32 insreg08; /* 0xb0 */
> +};
> +
> +int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata);
> +int omap_ehci_hcd_stop(void);
> +
> +#endif /* _OMAP_COMMON_EHCI_H_ */
[...]
> diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
> index 93d3bb7..89c3c3a 100644
> --- a/drivers/usb/host/ehci-omap.c
> +++ b/drivers/usb/host/ehci-omap.c
[...]
> +static void omap_ehci_soft_phy_reset(int port)
> +{
> + struct ulpi_viewport ulpi_vp;
> +
> + ulpi_vp.viewport_addr = (u32)&ehci->insreg05_utmi_ulpi;
> + ulpi_vp.port_num = port;
> +
> + ulpi_reset(&ulpi_vp);
> +
no need for the empty line here
> +}
> +
[...]
> /*
> - * Initialize the OMAP3 EHCI controller and PHY.
> - * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37.
> + * Initialize the OMAP EHCI controller and PHY.
> + * Based on "drivers/usb/host/ehci-omap.c" from Linux 3.1
> * See there for additional Copyrights.
> */
> -int ehci_hcd_init(void)
> +int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata)
> {
> - int ret;
> + int ret = 0;
> + unsigned int i, reg = 0, rev = 0;
no need to initialize ret here, it is done below.
>
> - debug("Initializing OMAP3 EHCI\n");
> + debug("Initializing OMAP EHCI\n");
>
> ret = board_usb_init();
> if (ret < 0)
[...]
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 3/7] OMAP3+: Clock: Adding ehci clock enabling
2012-02-03 13:38 [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs Govindraj.R
2012-02-03 13:38 ` [U-Boot] [PATCH v3 1/7] ehci-omap: driver for EHCI host on OMAP3 Govindraj.R
2012-02-03 13:38 ` [U-Boot] [PATCH v3 2/7] ehci-omap: Clean up added ehci-omap.c Govindraj.R
@ 2012-02-03 13:38 ` Govindraj.R
2012-02-06 11:42 ` Igor Grinberg
2012-02-03 13:38 ` [U-Boot] [PATCH v3 4/7] OMAP4: clock-common: Move the usb dppl configuration to new func Govindraj.R
` (4 subsequent siblings)
7 siblings, 1 reply; 20+ messages in thread
From: Govindraj.R @ 2012-02-03 13:38 UTC (permalink / raw)
To: u-boot
From: "Govindraj.R" <govindraj.raja@ti.com>
Adding ehci clock enabling mechanism part of clock framework.
When essential clocks are enabled during init phase usb host
clocks can also be enabled from clock framework.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
arch/arm/cpu/armv7/omap3/board.c | 4 ++++
arch/arm/cpu/armv7/omap3/clock.c | 20 ++++++++++++++++++++
arch/arm/cpu/armv7/omap4/clocks.c | 5 +++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
4 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 871aa37..054e9c4 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -228,6 +228,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_USB_EHCI_OMAP
+ ehci_clocks_enable();
+#endif
+
#ifdef CONFIG_SPL_BUILD
preloader_console_init();
diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
index e0d65c7..567817e 100644
--- a/arch/arm/cpu/armv7/omap3/clock.c
+++ b/arch/arm/cpu/armv7/omap3/clock.c
@@ -626,6 +626,26 @@ void prcm_init(void)
sdelay(5000);
}
+/*
+ * Enable usb ehci uhh, tll clocks
+ */
+void ehci_clocks_enable(void)
+{
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+
+ /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
+ sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
+ /*
+ * Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
+ * and USBHOST_120M_FCLK (USBHOST_FCLK2)
+ */
+ sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
+ /* Enable USBTTL_ICLK */
+ sr32(&prcm_base->iclken3_core, 2, 1, 1);
+ /* Enable USBTTL_FCLK */
+ sr32(&prcm_base->fclken3_core, 2, 1, 1);
+}
+
/******************************************************************************
* peripheral_enable() - Enable the clks & power for perifs (GPT2, UART1,...)
*****************************************************************************/
diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c
index 0886f92..12e283a 100644
--- a/arch/arm/cpu/armv7/omap4/clocks.c
+++ b/arch/arm/cpu/armv7/omap4/clocks.c
@@ -342,6 +342,9 @@ void enable_basic_clocks(void)
&prcm->cm_l4per_gpio4_clkctrl,
&prcm->cm_l4per_gpio5_clkctrl,
&prcm->cm_l4per_gpio6_clkctrl,
+ &prcm->cm_l3init_usbphy_clkctrl,
+ &prcm->cm_clksel_usb_60mhz,
+ &prcm->cm_l3init_hsusbtll_clkctrl,
0
};
@@ -352,6 +355,8 @@ void enable_basic_clocks(void)
&prcm->cm_l4per_gptimer2_clkctrl,
&prcm->cm_wkup_wdtimer2_clkctrl,
&prcm->cm_l4per_uart3_clkctrl,
+ &prcm->cm_l3init_fsusb_clkctrl,
+ &prcm->cm_l3init_hsusbhost_clkctrl,
0
};
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index e5031d5..2a89e56 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -34,6 +34,7 @@ struct emu_hal_params {
void prcm_init(void);
void per_clocks_enable(void);
+void ehci_clocks_enable(void);
void memif_init(void);
void sdrc_init(void);
--
1.7.5.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v3 3/7] OMAP3+: Clock: Adding ehci clock enabling
2012-02-03 13:38 ` [U-Boot] [PATCH v3 3/7] OMAP3+: Clock: Adding ehci clock enabling Govindraj.R
@ 2012-02-06 11:42 ` Igor Grinberg
2012-02-06 11:57 ` Govindraj
0 siblings, 1 reply; 20+ messages in thread
From: Igor Grinberg @ 2012-02-06 11:42 UTC (permalink / raw)
To: u-boot
On 02/03/12 15:38, Govindraj.R wrote:
> From: "Govindraj.R" <govindraj.raja@ti.com>
>
> Adding ehci clock enabling mechanism part of clock framework.
> When essential clocks are enabled during init phase usb host
> clocks can also be enabled from clock framework.
>
> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
> ---
> arch/arm/cpu/armv7/omap3/board.c | 4 ++++
> arch/arm/cpu/armv7/omap3/clock.c | 20 ++++++++++++++++++++
> arch/arm/cpu/armv7/omap4/clocks.c | 5 +++++
> arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
> 4 files changed, 30 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
> index 871aa37..054e9c4 100644
> --- a/arch/arm/cpu/armv7/omap3/board.c
> +++ b/arch/arm/cpu/armv7/omap3/board.c
> @@ -228,6 +228,10 @@ void s_init(void)
>
> per_clocks_enable();
>
> +#ifdef CONFIG_USB_EHCI_OMAP
> + ehci_clocks_enable();
> +#endif
Just a question (not blocking):
I would really like to see this being a part of "usb start" call some day...
Can't this be called from omap_ehci_hcd_init()?
> +
> #ifdef CONFIG_SPL_BUILD
> preloader_console_init();
>
> diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
> index e0d65c7..567817e 100644
> --- a/arch/arm/cpu/armv7/omap3/clock.c
> +++ b/arch/arm/cpu/armv7/omap3/clock.c
> @@ -626,6 +626,26 @@ void prcm_init(void)
> sdelay(5000);
> }
>
> +/*
> + * Enable usb ehci uhh, tll clocks
> + */
> +void ehci_clocks_enable(void)
> +{
> + struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
> +
> + /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
> + sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
> + /*
> + * Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
> + * and USBHOST_120M_FCLK (USBHOST_FCLK2)
> + */
> + sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
> + /* Enable USBTTL_ICLK */
> + sr32(&prcm_base->iclken3_core, 2, 1, 1);
> + /* Enable USBTTL_FCLK */
> + sr32(&prcm_base->fclken3_core, 2, 1, 1);
> +}
> +
> /******************************************************************************
> * peripheral_enable() - Enable the clks & power for perifs (GPT2, UART1,...)
> *****************************************************************************/
> diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c
> index 0886f92..12e283a 100644
> --- a/arch/arm/cpu/armv7/omap4/clocks.c
> +++ b/arch/arm/cpu/armv7/omap4/clocks.c
> @@ -342,6 +342,9 @@ void enable_basic_clocks(void)
> &prcm->cm_l4per_gpio4_clkctrl,
> &prcm->cm_l4per_gpio5_clkctrl,
> &prcm->cm_l4per_gpio6_clkctrl,
> + &prcm->cm_l3init_usbphy_clkctrl,
> + &prcm->cm_clksel_usb_60mhz,
> + &prcm->cm_l3init_hsusbtll_clkctrl,
> 0
> };
>
> @@ -352,6 +355,8 @@ void enable_basic_clocks(void)
> &prcm->cm_l4per_gptimer2_clkctrl,
> &prcm->cm_wkup_wdtimer2_clkctrl,
> &prcm->cm_l4per_uart3_clkctrl,
> + &prcm->cm_l3init_fsusb_clkctrl,
> + &prcm->cm_l3init_hsusbhost_clkctrl,
> 0
> };
>
> diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
> index e5031d5..2a89e56 100644
> --- a/arch/arm/include/asm/arch-omap3/sys_proto.h
> +++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
> @@ -34,6 +34,7 @@ struct emu_hal_params {
>
> void prcm_init(void);
> void per_clocks_enable(void);
> +void ehci_clocks_enable(void);
>
> void memif_init(void);
> void sdrc_init(void);
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v3 3/7] OMAP3+: Clock: Adding ehci clock enabling
2012-02-06 11:42 ` Igor Grinberg
@ 2012-02-06 11:57 ` Govindraj
2012-02-06 12:17 ` Igor Grinberg
0 siblings, 1 reply; 20+ messages in thread
From: Govindraj @ 2012-02-06 11:57 UTC (permalink / raw)
To: u-boot
On Mon, Feb 6, 2012 at 5:12 PM, Igor Grinberg <grinberg@compulab.co.il> wrote:
> On 02/03/12 15:38, Govindraj.R wrote:
>> From: "Govindraj.R" <govindraj.raja@ti.com>
>>
>> Adding ehci clock enabling mechanism part of clock framework.
>> When essential clocks are enabled during init phase usb host
>> clocks can also be enabled from clock framework.
>>
>> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
>
> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
>
>> ---
>> ?arch/arm/cpu/armv7/omap3/board.c ? ? ? ? ? ?| ? ?4 ++++
>> ?arch/arm/cpu/armv7/omap3/clock.c ? ? ? ? ? ?| ? 20 ++++++++++++++++++++
>> ?arch/arm/cpu/armv7/omap4/clocks.c ? ? ? ? ? | ? ?5 +++++
>> ?arch/arm/include/asm/arch-omap3/sys_proto.h | ? ?1 +
>> ?4 files changed, 30 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
>> index 871aa37..054e9c4 100644
>> --- a/arch/arm/cpu/armv7/omap3/board.c
>> +++ b/arch/arm/cpu/armv7/omap3/board.c
>> @@ -228,6 +228,10 @@ void s_init(void)
>>
>> ? ? ? per_clocks_enable();
>>
>> +#ifdef CONFIG_USB_EHCI_OMAP
>> + ? ? ehci_clocks_enable();
>> +#endif
>
> Just a question (not blocking):
> I would really like to see this being a part of "usb start" call some day...
> Can't this be called from omap_ehci_hcd_init()?
But its better to have it part of clock framework.
on omap4 I have added this part of enabling essential
clocks done part of clock framework.
"arch/arm/cpu/armv7/omap[4/5]/clocks.c" =>
"arch/arm/cpu/armv7/omap-common/clocks-common.c"
but on omap3 we don't seem to use clocks common.
so I have just used this function.
on omap4/5 clocks.c makes things simpler for us.
(re-use the same rather to complicate with our funcs)
--
Thanks,
Govindraj.R
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 3/7] OMAP3+: Clock: Adding ehci clock enabling
2012-02-06 11:57 ` Govindraj
@ 2012-02-06 12:17 ` Igor Grinberg
0 siblings, 0 replies; 20+ messages in thread
From: Igor Grinberg @ 2012-02-06 12:17 UTC (permalink / raw)
To: u-boot
On 02/06/12 13:57, Govindraj wrote:
> On Mon, Feb 6, 2012 at 5:12 PM, Igor Grinberg <grinberg@compulab.co.il> wrote:
>> On 02/03/12 15:38, Govindraj.R wrote:
>>> From: "Govindraj.R" <govindraj.raja@ti.com>
>>>
>>> Adding ehci clock enabling mechanism part of clock framework.
>>> When essential clocks are enabled during init phase usb host
>>> clocks can also be enabled from clock framework.
>>>
>>> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
>>
>> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
>>
>>> ---
>>> arch/arm/cpu/armv7/omap3/board.c | 4 ++++
>>> arch/arm/cpu/armv7/omap3/clock.c | 20 ++++++++++++++++++++
>>> arch/arm/cpu/armv7/omap4/clocks.c | 5 +++++
>>> arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
>>> 4 files changed, 30 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
>>> index 871aa37..054e9c4 100644
>>> --- a/arch/arm/cpu/armv7/omap3/board.c
>>> +++ b/arch/arm/cpu/armv7/omap3/board.c
>>> @@ -228,6 +228,10 @@ void s_init(void)
>>>
>>> per_clocks_enable();
>>>
>>> +#ifdef CONFIG_USB_EHCI_OMAP
>>> + ehci_clocks_enable();
>>> +#endif
>>
>> Just a question (not blocking):
>> I would really like to see this being a part of "usb start" call some day...
>> Can't this be called from omap_ehci_hcd_init()?
>
> But its better to have it part of clock framework.
>
> on omap4 I have added this part of enabling essential
> clocks done part of clock framework.
>
> "arch/arm/cpu/armv7/omap[4/5]/clocks.c" =>
> "arch/arm/cpu/armv7/omap-common/clocks-common.c"
>
> but on omap3 we don't seem to use clocks common.
> so I have just used this function.
>
> on omap4/5 clocks.c makes things simpler for us.
> (re-use the same rather to complicate with our funcs)
Yes, I understand, it is indeed simpler.
I'm trying also to see this from the final product POV,
where things like power consumption and supermarket principle
(pay only for what you buy) can meter.
Again, this is fine (I already acked the patch), just wanted to know
how difficult would it be to get it fine tuned for "usb start/stop".
Thanks
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 4/7] OMAP4: clock-common: Move the usb dppl configuration to new func
2012-02-03 13:38 [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs Govindraj.R
` (2 preceding siblings ...)
2012-02-03 13:38 ` [U-Boot] [PATCH v3 3/7] OMAP3+: Clock: Adding ehci clock enabling Govindraj.R
@ 2012-02-03 13:38 ` Govindraj.R
2012-02-03 13:38 ` [U-Boot] [PATCH v3 5/7] OMAP3+: ehci-omap: enable usb host ports for beagle/panda Govindraj.R
` (3 subsequent siblings)
7 siblings, 0 replies; 20+ messages in thread
From: Govindraj.R @ 2012-02-03 13:38 UTC (permalink / raw)
To: u-boot
From: "Govindraj.R" <govindraj.raja@ti.com>
usb dpll configuration is done only part of non-essential
dppl configuration however if CONFIG_USB_EHCI_OMAP is defined
we may have to configure usb dpll's for proper functioning
of usb modules. So move the usb dppl configuration to a new func.
and utilise the same during essential dpll configuration.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
arch/arm/cpu/armv7/omap-common/clocks-common.c | 52 ++++++++++++++---------
1 files changed, 32 insertions(+), 20 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index 1da90a4..770ac19 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -251,6 +251,33 @@ void configure_mpu_dpll(void)
debug("MPU DPLL locked\n");
}
+static void setup_usb_dpll(void)
+{
+ const struct dpll_params *params;
+ u32 sys_clk_khz, sd_div, num, den;
+
+ sys_clk_khz = get_sys_clk_freq() / 1000;
+ /*
+ * USB:
+ * USB dpll is J-type. Need to set DPLL_SD_DIV for jitter correction
+ * DPLL_SD_DIV = CEILING ([DPLL_MULT/(DPLL_DIV+1)]* CLKINP / 250)
+ * - where CLKINP is sys_clk in MHz
+ * Use CLKINP in KHz and adjust the denominator accordingly so
+ * that we have enough accuracy and at the same time no overflow
+ */
+ params = get_usb_dpll_params();
+ num = params->m * sys_clk_khz;
+ den = (params->n + 1) * 250 * 1000;
+ num += den - 1;
+ sd_div = num / den;
+ clrsetbits_le32(&prcm->cm_clksel_dpll_usb,
+ CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK,
+ sd_div << CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT);
+
+ /* Now setup the dpll with the regular function */
+ do_setup_dpll(&prcm->cm_clkmode_dpll_usb, params, DPLL_LOCK, "usb");
+}
+
static void setup_dplls(void)
{
u32 temp;
@@ -282,13 +309,16 @@ static void setup_dplls(void)
/* MPU dpll */
configure_mpu_dpll();
+
+#ifdef CONFIG_USB_EHCI_OMAP
+ setup_usb_dpll();
+#endif
}
#ifdef CONFIG_SYS_CLOCKS_ENABLE_ALL
static void setup_non_essential_dplls(void)
{
u32 sys_clk_khz, abe_ref_clk;
- u32 sd_div, num, den;
const struct dpll_params *params;
sys_clk_khz = get_sys_clk_freq() / 1000;
@@ -300,25 +330,7 @@ static void setup_non_essential_dplls(void)
params = get_iva_dpll_params();
do_setup_dpll(&prcm->cm_clkmode_dpll_iva, params, DPLL_LOCK, "iva");
- /*
- * USB:
- * USB dpll is J-type. Need to set DPLL_SD_DIV for jitter correction
- * DPLL_SD_DIV = CEILING ([DPLL_MULT/(DPLL_DIV+1)]* CLKINP / 250)
- * - where CLKINP is sys_clk in MHz
- * Use CLKINP in KHz and adjust the denominator accordingly so
- * that we have enough accuracy and at the same time no overflow
- */
- params = get_usb_dpll_params();
- num = params->m * sys_clk_khz;
- den = (params->n + 1) * 250 * 1000;
- num += den - 1;
- sd_div = num / den;
- clrsetbits_le32(&prcm->cm_clksel_dpll_usb,
- CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK,
- sd_div << CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT);
-
- /* Now setup the dpll with the regular function */
- do_setup_dpll(&prcm->cm_clkmode_dpll_usb, params, DPLL_LOCK, "usb");
+ setup_usb_dpll();
/* Configure ABE dpll */
params = get_abe_dpll_params();
--
1.7.5.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v3 5/7] OMAP3+: ehci-omap: enable usb host ports for beagle/panda
2012-02-03 13:38 [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs Govindraj.R
` (3 preceding siblings ...)
2012-02-03 13:38 ` [U-Boot] [PATCH v3 4/7] OMAP4: clock-common: Move the usb dppl configuration to new func Govindraj.R
@ 2012-02-03 13:38 ` Govindraj.R
2012-02-06 12:03 ` Igor Grinberg
2012-02-03 13:38 ` [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework Govindraj.R
` (2 subsequent siblings)
7 siblings, 1 reply; 20+ messages in thread
From: Govindraj.R @ 2012-02-03 13:38 UTC (permalink / raw)
To: u-boot
From: "Govindraj.R" <govindraj.raja@ti.com>
For beagle and panda enable and use the ehci-omap.c generic
api's added to configure usb host ports based on data passed
from board file to configure in modes as specified from board data.
For panda initialise the mux pins for ehci usage.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
board/ti/beagle/beagle.c | 28 ++++++++++++++++++++++++++
board/ti/panda/panda.c | 41 +++++++++++++++++++++++++++++++++++++++
board/ti/panda/panda_mux_data.h | 16 +++++++-------
include/configs/omap4_panda.h | 23 ++++++++++++++++++++-
4 files changed, 99 insertions(+), 9 deletions(-)
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 98548ab..5031cf2 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -45,6 +45,11 @@
#include "beagle.h"
#include <command.h>
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/ehci-omap.h>
+#endif
+
#define pr_debug(fmt, args...) debug(fmt, ##args)
#define TWL4030_I2C_BUS 0
@@ -442,6 +447,29 @@ void show_boot_progress(int val)
if(val == 15)
usb_stop();
}
+
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+int ehci_hcd_init(void)
+{
+ int ret = 0;
+
+ ret = omap_ehci_hcd_init(&usbhs_bdata);
+ return ret;
+}
+
+int ehci_hcd_stop(void)
+{
+ int ret;
+
+ ret = omap_ehci_hcd_stop();
+ return ret;
+}
+
#endif /* CONFIG_USB_EHCI */
#ifndef CONFIG_SPL_BUILD
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index fc8c0b4..1f8509b 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -26,9 +26,16 @@
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/clocks.h>
#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
#include "panda_mux_data.h"
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/arch/ehci.h>
+#include <asm/ehci-omap.h>
+#endif
+
#define PANDA_ULPI_PHY_TYPE_GPIO 182
DECLARE_GLOBAL_DATA_PTR;
@@ -177,6 +184,40 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#ifdef CONFIG_USB_EHCI
+
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
+};
+
+int ehci_hcd_init(void)
+{
+ int ret;
+ unsigned int utmi_clk;
+
+ /* Now we can enable our port clocks */
+ utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL);
+ utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK;
+ sr32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, 0, 32, utmi_clk);
+
+ ret = omap_ehci_hcd_init(&usbhs_bdata);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+ int ret;
+
+ ret = omap_ehci_hcd_stop();
+ return ret;
+}
+#endif
+
/*
* get_board_rev() - get board revision
*/
diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h
index 2970ccd..5b66a14 100644
--- a/board/ti/panda/panda_mux_data.h
+++ b/board/ti/panda/panda_mux_data.h
@@ -136,14 +136,14 @@ const struct pad_conf_entry core_padconf_array_non_essential[] = {
{CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */
{CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */
{CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */
- {USBB1_ULPITLL_CLK, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_cawake */
- {USBB1_ULPITLL_STP, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_cadata */
- {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_caflag */
- {USBB1_ULPITLL_NXT, (OFF_EN | M1)}, /* hsi1_acready */
- {USBB1_ULPITLL_DAT0, (OFF_EN | M1)}, /* hsi1_acwake */
- {USBB1_ULPITLL_DAT1, (OFF_EN | M1)}, /* hsi1_acdata */
- {USBB1_ULPITLL_DAT2, (OFF_EN | M1)}, /* hsi1_acflag */
- {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_caready */
+ {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */
+ {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */
+ {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */
+ {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */
+ {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */
+ {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */
+ {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */
+ {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */
{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */
{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */
{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index e9ef2a3..23c0230 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -31,9 +31,30 @@
/*
* High Level Configuration Options
*/
-#define CONFIG_PANDA 1 /* working with Panda */
+#define CONFIG_PANDA /* working with Panda */
+
+/* USB UHH support options */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
+#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
+
+/* USB Networking options */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+
+#define CONFIG_UBOOT_ENABLE_PADS_ALL
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
#include <configs/omap4_common.h>
+#define CONFIG_CMD_NET
/* GPIO */
#define CONFIG_CMD_GPIO
--
1.7.5.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v3 5/7] OMAP3+: ehci-omap: enable usb host ports for beagle/panda
2012-02-03 13:38 ` [U-Boot] [PATCH v3 5/7] OMAP3+: ehci-omap: enable usb host ports for beagle/panda Govindraj.R
@ 2012-02-06 12:03 ` Igor Grinberg
0 siblings, 0 replies; 20+ messages in thread
From: Igor Grinberg @ 2012-02-06 12:03 UTC (permalink / raw)
To: u-boot
On 02/03/12 15:38, Govindraj.R wrote:
> From: "Govindraj.R" <govindraj.raja@ti.com>
>
> For beagle and panda enable and use the ehci-omap.c generic
> api's added to configure usb host ports based on data passed
> from board file to configure in modes as specified from board data.
> For panda initialise the mux pins for ehci usage.
>
> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Last neats and
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
> ---
> board/ti/beagle/beagle.c | 28 ++++++++++++++++++++++++++
> board/ti/panda/panda.c | 41 +++++++++++++++++++++++++++++++++++++++
> board/ti/panda/panda_mux_data.h | 16 +++++++-------
> include/configs/omap4_panda.h | 23 ++++++++++++++++++++-
> 4 files changed, 99 insertions(+), 9 deletions(-)
>
> diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
> index 98548ab..5031cf2 100644
> --- a/board/ti/beagle/beagle.c
> +++ b/board/ti/beagle/beagle.c
> @@ -45,6 +45,11 @@
> #include "beagle.h"
> #include <command.h>
>
> +#ifdef CONFIG_USB_EHCI
> +#include <usb.h>
> +#include <asm/ehci-omap.h>
> +#endif
> +
> #define pr_debug(fmt, args...) debug(fmt, ##args)
>
> #define TWL4030_I2C_BUS 0
> @@ -442,6 +447,29 @@ void show_boot_progress(int val)
> if(val == 15)
> usb_stop();
> }
> +
> +static struct omap_usbhs_board_data usbhs_bdata = {
> + .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
> + .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
> + .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
> +};
> +
> +int ehci_hcd_init(void)
> +{
> + int ret = 0;
> +
> + ret = omap_ehci_hcd_init(&usbhs_bdata);
> + return ret;
> +}
just:
return omap_ehci_hcd_init(&usbhs_bdata);
> +
> +int ehci_hcd_stop(void)
> +{
> + int ret;
> +
> + ret = omap_ehci_hcd_stop();
> + return ret;
> +}
same here:
return omap_ehci_hcd_stop();
> +
> #endif /* CONFIG_USB_EHCI */
>
> #ifndef CONFIG_SPL_BUILD
> diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
> index fc8c0b4..1f8509b 100644
> --- a/board/ti/panda/panda.c
> +++ b/board/ti/panda/panda.c
> @@ -26,9 +26,16 @@
> #include <asm/arch/mmc_host_def.h>
> #include <asm/arch/clocks.h>
> #include <asm/arch/gpio.h>
> +#include <asm/gpio.h>
>
> #include "panda_mux_data.h"
>
> +#ifdef CONFIG_USB_EHCI
> +#include <usb.h>
> +#include <asm/arch/ehci.h>
> +#include <asm/ehci-omap.h>
> +#endif
> +
> #define PANDA_ULPI_PHY_TYPE_GPIO 182
>
> DECLARE_GLOBAL_DATA_PTR;
> @@ -177,6 +184,40 @@ int board_mmc_init(bd_t *bis)
> }
> #endif
>
> +#ifdef CONFIG_USB_EHCI
> +
> +static struct omap_usbhs_board_data usbhs_bdata = {
> + .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
> + .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
> + .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
> +};
> +
> +int ehci_hcd_init(void)
> +{
> + int ret;
> + unsigned int utmi_clk;
> +
> + /* Now we can enable our port clocks */
> + utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL);
> + utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK;
> + sr32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, 0, 32, utmi_clk);
> +
> + ret = omap_ehci_hcd_init(&usbhs_bdata);
> + if (ret < 0)
> + return ret;
> +
> + return 0;
return omap_ehci_hcd_init(&usbhs_bdata);
?
> +}
> +
> +int ehci_hcd_stop(void)
> +{
> + int ret;
> +
> + ret = omap_ehci_hcd_stop();
> + return ret;
return omap_ehci_hcd_stop();
> +}
> +#endif
[...]
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework.
2012-02-03 13:38 [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs Govindraj.R
` (4 preceding siblings ...)
2012-02-03 13:38 ` [U-Boot] [PATCH v3 5/7] OMAP3+: ehci-omap: enable usb host ports for beagle/panda Govindraj.R
@ 2012-02-03 13:38 ` Govindraj.R
2012-02-06 8:55 ` Igor Grinberg
2012-02-08 17:42 ` SUBHASHINI MANNE
2012-02-03 13:38 ` [U-Boot] [PATCH v3 7/7] usb: ulpi: Add omap-ulpi-view port support Govindraj.R
2012-02-03 15:25 ` [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs Tom Rini
7 siblings, 2 replies; 20+ messages in thread
From: Govindraj.R @ 2012-02-03 13:38 UTC (permalink / raw)
To: u-boot
From: "Govindraj.R" <govindraj.raja@ti.com>
Extend the existing ulpi viewport framework
to pass the port number information for any ulpi
ops. Fix the usage of ulpi api's accordingly.
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
board/efikamx/efikamx-usb.c | 24 ++++++++++------
drivers/usb/ulpi/ulpi-viewport.c | 30 ++++++++++----------
drivers/usb/ulpi/ulpi.c | 54 +++++++++++++++++++------------------
include/usb/ulpi.h | 36 +++++++++++++++++--------
4 files changed, 82 insertions(+), 62 deletions(-)
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
index 840bd9a..ac2d2e9 100644
--- a/board/efikamx/efikamx-usb.c
+++ b/board/efikamx/efikamx-usb.c
@@ -120,6 +120,7 @@ static void efika_ehci_init(struct usb_ehci *ehci, uint32_t stp_gpio,
{
int ret;
struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
+ struct ulpi_viewport ulpi_vp;
mxc_request_iomux(stp_gpio, alt0);
mxc_iomux_set_pad(stp_gpio, PAD_CTL_DRV_HIGH |
@@ -133,23 +134,26 @@ static void efika_ehci_init(struct usb_ehci *ehci, uint32_t stp_gpio,
mxc_iomux_set_pad(stp_gpio, USB_PAD_CONFIG);
udelay(10000);
- ret = ulpi_init((u32)&ehci->ulpi_viewpoint);
+ ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint;
+ ulpi_vp.port_num = 0;
+
+ ret = ulpi_init(&ulpi_vp);
if (ret) {
printf("Efika USB ULPI initialization failed\n");
return;
}
/* ULPI set flags */
- ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl,
+ ulpi_write(&ulpi_vp, &ulpi->otg_ctrl,
ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN |
ULPI_OTG_EXTVBUSIND);
- ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->function_ctrl,
+ ulpi_write(&ulpi_vp, &ulpi->function_ctrl,
ULPI_FC_FULL_SPEED | ULPI_FC_OPMODE_NORMAL |
ULPI_FC_SUSPENDM);
- ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->iface_ctrl, 0);
+ ulpi_write(&ulpi_vp, &ulpi->iface_ctrl, 0);
/* Set VBus */
- ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl_set,
+ ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set,
ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
/*
@@ -158,8 +162,7 @@ static void efika_ehci_init(struct usb_ehci *ehci, uint32_t stp_gpio,
* NOTE: This violates USB specification, but otherwise, USB on Efika
* doesn't work.
*/
- ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl_set,
- ULPI_OTG_CHRGVBUS);
+ ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set, ULPI_OTG_CHRGVBUS);
}
int board_ehci_hcd_init(int port)
@@ -177,9 +180,12 @@ void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
uint32_t port = OTG_BASE_ADDR + (0x200 * CONFIG_MXC_USB_PORT);
struct usb_ehci *ehci = (struct usb_ehci *)port;
struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
+ struct ulpi_viewport ulpi_vp;
+
+ ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint;
+ ulpi_vp.port_num = 0;
- ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl_set,
- ULPI_OTG_CHRGVBUS);
+ ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set, ULPI_OTG_CHRGVBUS);
wait_ms(50);
diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
index 490fb0e..6f03f08 100644
--- a/drivers/usb/ulpi/ulpi-viewport.c
+++ b/drivers/usb/ulpi/ulpi-viewport.c
@@ -40,13 +40,13 @@
*
* returns 0 on mask match, ULPI_ERROR on time out.
*/
-static int ulpi_wait(u32 ulpi_viewport, u32 mask)
+static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask)
{
int timeout = CONFIG_USB_ULPI_TIMEOUT;
/* Wait for the bits in mask to become zero. */
while (--timeout) {
- if ((readl(ulpi_viewport) & mask) == 0)
+ if ((readl(ulpi_vp->viewport_addr) & mask) == 0)
return 0;
udelay(1);
@@ -60,16 +60,16 @@ static int ulpi_wait(u32 ulpi_viewport, u32 mask)
*
* returns 0 on success.
*/
-static int ulpi_wakeup(u32 ulpi_viewport)
+static int ulpi_wakeup(struct ulpi_viewport *ulpi_vp)
{
int err;
- if (readl(ulpi_viewport) & ULPI_SS)
+ if (readl(ulpi_vp->viewport_addr) & ULPI_SS)
return 0; /* already awake */
- writel(ULPI_WU, ulpi_viewport);
+ writel(ULPI_WU, ulpi_vp->viewport_addr);
- err = ulpi_wait(ulpi_viewport, ULPI_WU);
+ err = ulpi_wait(ulpi_vp, ULPI_WU);
if (err)
printf("ULPI wakeup timed out\n");
@@ -81,38 +81,38 @@ static int ulpi_wakeup(u32 ulpi_viewport)
*
* @value - the ULPI request
*/
-static int ulpi_request(u32 ulpi_viewport, u32 value)
+static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value)
{
int err;
- err = ulpi_wakeup(ulpi_viewport);
+ err = ulpi_wakeup(ulpi_vp);
if (err)
return err;
- writel(value, ulpi_viewport);
+ writel(value, ulpi_vp->viewport_addr);
- err = ulpi_wait(ulpi_viewport, ULPI_RWRUN);
+ err = ulpi_wait(ulpi_vp, ULPI_RWRUN);
if (err)
printf("ULPI request timed out\n");
return err;
}
-int ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value)
+int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
{
u32 val = ULPI_RWRUN | ULPI_RWCTRL | ((u32)reg << 16) | (value & 0xff);
- return ulpi_request(ulpi_viewport, val);
+ return ulpi_request(ulpi_vp, val);
}
-u32 ulpi_read(u32 ulpi_viewport, u8 *reg)
+u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
{
int err;
u32 val = ULPI_RWRUN | ((u32)reg << 16);
- err = ulpi_request(ulpi_viewport, val);
+ err = ulpi_request(ulpi_vp, val);
if (err)
return err;
- return (readl(ulpi_viewport) >> 8) & 0xff;
+ return (readl(ulpi_vp->viewport_addr) >> 8) & 0xff;
}
diff --git a/drivers/usb/ulpi/ulpi.c b/drivers/usb/ulpi/ulpi.c
index 6202227..dde2585 100644
--- a/drivers/usb/ulpi/ulpi.c
+++ b/drivers/usb/ulpi/ulpi.c
@@ -37,18 +37,18 @@
static struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
-static int ulpi_integrity_check(u32 ulpi_viewport)
+static int ulpi_integrity_check(struct ulpi_viewport *ulpi_vp)
{
u32 val, tval = ULPI_TEST_VALUE;
int err, i;
/* Use the 'special' test value to check all bits */
for (i = 0; i < 2; i++, tval <<= 1) {
- err = ulpi_write(ulpi_viewport, &ulpi->scratch, tval);
+ err = ulpi_write(ulpi_vp, &ulpi->scratch, tval);
if (err)
return err;
- val = ulpi_read(ulpi_viewport, &ulpi->scratch);
+ val = ulpi_read(ulpi_vp, &ulpi->scratch);
if (val != tval) {
printf("ULPI integrity check failed\n");
return val;
@@ -58,7 +58,7 @@ static int ulpi_integrity_check(u32 ulpi_viewport)
return 0;
}
-int ulpi_init(u32 ulpi_viewport)
+int ulpi_init(struct ulpi_viewport *ulpi_vp)
{
u32 val, id = 0;
u8 *reg = &ulpi->product_id_high;
@@ -66,7 +66,7 @@ int ulpi_init(u32 ulpi_viewport)
/* Assemble ID from four ULPI ID registers (8 bits each). */
for (i = 0; i < ULPI_ID_REGS_COUNT; i++) {
- val = ulpi_read(ulpi_viewport, reg - i);
+ val = ulpi_read(ulpi_vp, reg - i);
if (val == ULPI_ERROR)
return val;
@@ -76,10 +76,10 @@ int ulpi_init(u32 ulpi_viewport)
/* Split ID into vendor and product ID. */
debug("ULPI transceiver ID 0x%04x:0x%04x\n", id >> 16, id & 0xffff);
- return ulpi_integrity_check(ulpi_viewport);
+ return ulpi_integrity_check(ulpi_vp);
}
-int ulpi_select_transceiver(u32 ulpi_viewport, unsigned speed)
+int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed)
{
u32 tspeed = ULPI_FC_FULL_SPEED;
u32 val;
@@ -96,17 +96,18 @@ int ulpi_select_transceiver(u32 ulpi_viewport, unsigned speed)
"falling back to full speed\n", __func__, speed);
}
- val = ulpi_read(ulpi_viewport, &ulpi->function_ctrl);
+ val = ulpi_read(ulpi_vp, &ulpi->function_ctrl);
if (val == ULPI_ERROR)
return val;
/* clear the previous speed setting */
val = (val & ~ULPI_FC_XCVRSEL_MASK) | tspeed;
- return ulpi_write(ulpi_viewport, &ulpi->function_ctrl, val);
+ return ulpi_write(ulpi_vp, &ulpi->function_ctrl, val);
}
-int ulpi_set_vbus(u32 ulpi_viewport, int on, int ext_power, int ext_ind)
+int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp, int on, int ext_power,
+ int ext_ind)
{
u32 flags = ULPI_OTG_DRVVBUS;
u8 *reg = on ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear;
@@ -116,18 +117,18 @@ int ulpi_set_vbus(u32 ulpi_viewport, int on, int ext_power, int ext_ind)
if (ext_ind)
flags |= ULPI_OTG_EXTVBUSIND;
- return ulpi_write(ulpi_viewport, reg, flags);
+ return ulpi_write(ulpi_vp, reg, flags);
}
-int ulpi_set_pd(u32 ulpi_viewport, int enable)
+int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable)
{
u32 val = ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN;
u8 *reg = enable ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear;
- return ulpi_write(ulpi_viewport, reg, val);
+ return ulpi_write(ulpi_vp, reg, val);
}
-int ulpi_opmode_sel(u32 ulpi_viewport, unsigned opmode)
+int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode)
{
u32 topmode = ULPI_FC_OPMODE_NORMAL;
u32 val;
@@ -144,17 +145,17 @@ int ulpi_opmode_sel(u32 ulpi_viewport, unsigned opmode)
"falling back to OpMode Normal\n", __func__, opmode);
}
- val = ulpi_read(ulpi_viewport, &ulpi->function_ctrl);
+ val = ulpi_read(ulpi_vp, &ulpi->function_ctrl);
if (val == ULPI_ERROR)
return val;
/* clear the previous opmode setting */
val = (val & ~ULPI_FC_OPMODE_MASK) | topmode;
- return ulpi_write(ulpi_viewport, &ulpi->function_ctrl, val);
+ return ulpi_write(ulpi_vp, &ulpi->function_ctrl, val);
}
-int ulpi_serial_mode_enable(u32 ulpi_viewport, unsigned smode)
+int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode)
{
switch (smode) {
case ULPI_IFACE_6_PIN_SERIAL_MODE:
@@ -166,14 +167,14 @@ int ulpi_serial_mode_enable(u32 ulpi_viewport, unsigned smode)
return ULPI_ERROR;
}
- return ulpi_write(ulpi_viewport, &ulpi->iface_ctrl_set, smode);
+ return ulpi_write(ulpi_vp, &ulpi->iface_ctrl_set, smode);
}
-int ulpi_suspend(u32 ulpi_viewport)
+int ulpi_suspend(struct ulpi_viewport *ulpi_vp)
{
int err;
- err = ulpi_write(ulpi_viewport, &ulpi->function_ctrl_clear,
+ err = ulpi_write(ulpi_vp, &ulpi->function_ctrl_clear,
ULPI_FC_SUSPENDM);
if (err)
printf("ULPI: %s: failed writing the suspend bit\n", __func__);
@@ -186,7 +187,7 @@ int ulpi_suspend(u32 ulpi_viewport)
* Actual wait for reset must be done in a view port specific way,
* because it involves checking the DIR line.
*/
-static int __ulpi_reset_wait(u32 ulpi_viewport)
+static int __ulpi_reset_wait(struct ulpi_viewport *ulpi_vp)
{
u32 val;
int timeout = CONFIG_USB_ULPI_TIMEOUT;
@@ -199,7 +200,7 @@ static int __ulpi_reset_wait(u32 ulpi_viewport)
* for the error of ulpi_read(), if there is one, then
* there will be a timeout.
*/
- val = ulpi_read(ulpi_viewport, &ulpi->function_ctrl);
+ val = ulpi_read(ulpi_vp, &ulpi->function_ctrl);
if (!(val & ULPI_FC_RESET))
return 0;
@@ -210,18 +211,19 @@ static int __ulpi_reset_wait(u32 ulpi_viewport)
return ULPI_ERROR;
}
-int ulpi_reset_wait(u32) __attribute__((weak, alias("__ulpi_reset_wait")));
+int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp)
+ __attribute__((weak, alias("__ulpi_reset_wait")));
-int ulpi_reset(u32 ulpi_viewport)
+int ulpi_reset(struct ulpi_viewport *ulpi_vp)
{
int err;
- err = ulpi_write(ulpi_viewport,
+ err = ulpi_write(ulpi_vp,
&ulpi->function_ctrl_set, ULPI_FC_RESET);
if (err) {
printf("ULPI: %s: failed writing reset bit\n", __func__);
return err;
}
- return ulpi_reset_wait(ulpi_viewport);
+ return ulpi_reset_wait(ulpi_vp);
}
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
index 802f077..a036bab 100644
--- a/include/usb/ulpi.h
+++ b/include/usb/ulpi.h
@@ -28,12 +28,23 @@
#endif
/*
+ * ulpi view port address and
+ * Port_number that can be passed.
+ * Any additional data to be passed can
+ * be extended from this structure
+ */
+struct ulpi_viewport {
+ u32 viewport_addr;
+ u8 port_num;
+};
+
+/*
* Initialize the ULPI transciever and check the interface integrity.
- * @ulpi_viewport - the address of the ULPI viewport register.
+ * @ulpi_viewport - structure containing ULPI viewport data
*
* returns 0 on success, ULPI_ERROR on failure.
*/
-int ulpi_init(u32 ulpi_viewport);
+int ulpi_init(struct ulpi_viewport *ulpi_vp);
/*
* Select transceiver speed.
@@ -41,7 +52,7 @@ int ulpi_init(u32 ulpi_viewport);
* ULPI_FC_LOW_SPEED, ULPI_FC_FS4LS
* returns 0 on success, ULPI_ERROR on failure.
*/
-int ulpi_select_transceiver(u32 ulpi_viewport, unsigned speed);
+int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed);
/*
* Enable/disable VBUS.
@@ -50,14 +61,15 @@ int ulpi_select_transceiver(u32 ulpi_viewport, unsigned speed);
*
* returns 0 on success, ULPI_ERROR on failure.
*/
-int ulpi_enable_vbus(u32 ulpi_viewport, int on, int ext_power, int ext_ind);
+int ulpi_enable_vbus(struct ulpi_viewport *ulpi_vp,
+ int on, int ext_power, int ext_ind);
/*
* Enable/disable pull-down resistors on D+ and D- USB lines.
*
* returns 0 on success, ULPI_ERROR on failure.
*/
-int ulpi_set_pd(u32 ulpi_viewport, int enable);
+int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable);
/*
* Select OpMode.
@@ -66,7 +78,7 @@ int ulpi_set_pd(u32 ulpi_viewport, int enable);
*
* returns 0 on success, ULPI_ERROR on failure.
*/
-int ulpi_opmode_sel(u32 ulpi_viewport, unsigned opmode);
+int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode);
/*
* Switch to Serial Mode.
@@ -78,7 +90,7 @@ int ulpi_opmode_sel(u32 ulpi_viewport, unsigned opmode);
* Switches immediately to Serial Mode.
* To return from Serial Mode, STP line needs to be asserted.
*/
-int ulpi_serial_mode_enable(u32 ulpi_viewport, unsigned smode);
+int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode);
/*
* Put PHY into low power mode.
@@ -89,14 +101,14 @@ int ulpi_serial_mode_enable(u32 ulpi_viewport, unsigned smode);
* STP line must be driven low to keep the PHY in suspend.
* To resume the PHY, STP line needs to be asserted.
*/
-int ulpi_suspend(u32 ulpi_viewport);
+int ulpi_suspend(struct ulpi_viewport *ulpi_vp);
/*
* Reset the transceiver. ULPI interface and registers are not affected.
*
* returns 0 on success, ULPI_ERROR on failure.
*/
-int ulpi_reset(u32 ulpi_viewport);
+int ulpi_reset(struct ulpi_viewport *ulpi_vp);
/* ULPI access methods below must be implemented for each ULPI viewport. */
@@ -108,7 +120,7 @@ int ulpi_reset(u32 ulpi_viewport);
*
* returns 0 on success, ULPI_ERROR on failure.
*/
-int ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value);
+int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value);
/*
* Read the ULPI PHY register content via the viewport.
@@ -116,14 +128,14 @@ int ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value);
*
* returns register content on success, ULPI_ERROR on failure.
*/
-u32 ulpi_read(u32 ulpi_viewport, u8 *reg);
+u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg);
/*
* Wait for the reset to complete.
* The Link must not attempt to access the PHY until the reset has
* completed and DIR line is de-asserted.
*/
-int ulpi_reset_wait(u32 ulpi_viewport);
+int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp);
/* Access Extended Register Set (indicator) */
#define ACCESS_EXT_REGS_OFFSET 0x2f /* read-write */
--
1.7.5.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework.
2012-02-03 13:38 ` [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework Govindraj.R
@ 2012-02-06 8:55 ` Igor Grinberg
2012-02-06 9:38 ` Govindraj
2012-02-08 17:42 ` SUBHASHINI MANNE
1 sibling, 1 reply; 20+ messages in thread
From: Igor Grinberg @ 2012-02-06 8:55 UTC (permalink / raw)
To: u-boot
Hi Govindraj,
I was about to ask Tom to reorder the patches while applying, but
there are still several things to fix.
I'm also fine with fixing these by a follow up patch (after merging this).
There are several comments, you missed to fix from previous version [1].
Please, fix those.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/123832
On 02/03/12 15:38, Govindraj.R wrote:
> From: "Govindraj.R" <govindraj.raja@ti.com>
>
> Extend the existing ulpi viewport framework
> to pass the port number information for any ulpi
> ops. Fix the usage of ulpi api's accordingly.
>
> Tested-by: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
After fixing the pointed issues:
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
> ---
> board/efikamx/efikamx-usb.c | 24 ++++++++++------
> drivers/usb/ulpi/ulpi-viewport.c | 30 ++++++++++----------
> drivers/usb/ulpi/ulpi.c | 54 +++++++++++++++++++------------------
> include/usb/ulpi.h | 36 +++++++++++++++++--------
> 4 files changed, 82 insertions(+), 62 deletions(-)
[...]
> diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
> index 490fb0e..6f03f08 100644
> --- a/drivers/usb/ulpi/ulpi-viewport.c
> +++ b/drivers/usb/ulpi/ulpi-viewport.c
[...]
> -int ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value)
> +int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
> {
> u32 val = ULPI_RWRUN | ULPI_RWCTRL | ((u32)reg << 16) | (value & 0xff);
You should utilize the port_num variable here, right?
something like:
val |= (ulpi_vp->port_num & 0x7) << 24;
>
> - return ulpi_request(ulpi_viewport, val);
> + return ulpi_request(ulpi_vp, val);
> }
>
> -u32 ulpi_read(u32 ulpi_viewport, u8 *reg)
> +u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
> {
> int err;
> u32 val = ULPI_RWRUN | ((u32)reg << 16);
same here
>
> - err = ulpi_request(ulpi_viewport, val);
> + err = ulpi_request(ulpi_vp, val);
> if (err)
> return err;
>
> - return (readl(ulpi_viewport) >> 8) & 0xff;
> + return (readl(ulpi_vp->viewport_addr) >> 8) & 0xff;
> }
[...]
> diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
> index 802f077..a036bab 100644
> --- a/include/usb/ulpi.h
> +++ b/include/usb/ulpi.h
> @@ -28,12 +28,23 @@
> #endif
>
> /*
> + * ulpi view port address and
> + * Port_number that can be passed.
> + * Any additional data to be passed can
> + * be extended from this structure
> + */
> +struct ulpi_viewport {
> + u32 viewport_addr;
> + u8 port_num;
> +};
haven't we aggreed, that this will be:
u32 port_num;
?
> +
> +/*
> * Initialize the ULPI transciever and check the interface integrity.
> - * @ulpi_viewport - the address of the ULPI viewport register.
> + * @ulpi_viewport - structure containing ULPI viewport data
This is ulpi_vp now.
[...]
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework.
2012-02-06 8:55 ` Igor Grinberg
@ 2012-02-06 9:38 ` Govindraj
2012-02-06 10:03 ` Igor Grinberg
0 siblings, 1 reply; 20+ messages in thread
From: Govindraj @ 2012-02-06 9:38 UTC (permalink / raw)
To: u-boot
Hi Igor,
On Mon, Feb 6, 2012 at 2:25 PM, Igor Grinberg <grinberg@compulab.co.il> wrote:
> Hi Govindraj,
>
> I was about to ask Tom to reorder the patches while applying, but
> there are still several things to fix.
> I'm also fine with fixing these by a follow up patch (after merging this).
>
[...]
>
> [...]
>
>> diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
>> index 490fb0e..6f03f08 100644
>> --- a/drivers/usb/ulpi/ulpi-viewport.c
>> +++ b/drivers/usb/ulpi/ulpi-viewport.c
>
> [...]
>
>> -int ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value)
>> +int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
>> ?{
>> ? ? ? u32 val = ULPI_RWRUN | ULPI_RWCTRL | ((u32)reg << 16) | (value & 0xff);
>
> You should utilize the port_num variable here, right?
> something like:
> val |= (ulpi_vp->port_num & 0x7) << 24;
>
Yes correct, Shouldn't we add something like this
[...]
#ifndef CONFIG_ULPI_PORT_SHIFT && CONFIG_ULPI_PORT_MASK
#define CONFIG_ULPI_PORT_SHIFT 24
#define CONFIG_ULPI_PORT_MASK 0x7
#endif
[...]
val |= (ulpi_vp->port_num & CONFIG_ULPI_PORT_MASK) <<
CONFIG_ULPI_PORT_SHIFT;
>>
>> - ? ? return ulpi_request(ulpi_viewport, val);
>> + ? ? return ulpi_request(ulpi_vp, val);
>> ?}
>>
>> -u32 ulpi_read(u32 ulpi_viewport, u8 *reg)
>> +u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
>> ?{
>> ? ? ? int err;
>> ? ? ? u32 val = ULPI_RWRUN | ((u32)reg << 16);
>
> same here
>
>>
>> - ? ? err = ulpi_request(ulpi_viewport, val);
>> + ? ? err = ulpi_request(ulpi_vp, val);
>> ? ? ? if (err)
>> ? ? ? ? ? ? ? return err;
>>
>> - ? ? return (readl(ulpi_viewport) >> 8) & 0xff;
>> + ? ? return (readl(ulpi_vp->viewport_addr) >> 8) & 0xff;
>> ?}
>
> [...]
>
>> diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
>> index 802f077..a036bab 100644
>> --- a/include/usb/ulpi.h
>> +++ b/include/usb/ulpi.h
>> @@ -28,12 +28,23 @@
>> ?#endif
>>
>> ?/*
>> + * ulpi view port address and
>> + * Port_number that can be passed.
>> + * Any additional data to be passed can
>> + * be extended from this structure
>> + */
>> +struct ulpi_viewport {
>> + ? ? u32 viewport_addr;
>> + ? ? u8 port_num;
>> +};
>
> haven't we aggreed, that this will be:
> u32 port_num;
My bad I missed this will correct now.
> ?
>
>> +
>> +/*
>> ? * Initialize the ULPI transciever and check the interface integrity.
>> - * @ulpi_viewport - ?the address of the ULPI viewport register.
>> + * @ulpi_viewport - ?structure containing ULPI viewport data
>
> This is ulpi_vp now.
will correct this.
--
Thanks,
Govindraj.R
^ permalink raw reply [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework.
2012-02-06 9:38 ` Govindraj
@ 2012-02-06 10:03 ` Igor Grinberg
0 siblings, 0 replies; 20+ messages in thread
From: Igor Grinberg @ 2012-02-06 10:03 UTC (permalink / raw)
To: u-boot
On 02/06/12 11:38, Govindraj wrote:
> Hi Igor,
>
> On Mon, Feb 6, 2012 at 2:25 PM, Igor Grinberg <grinberg@compulab.co.il> wrote:
>> Hi Govindraj,
>>
>> I was about to ask Tom to reorder the patches while applying, but
>> there are still several things to fix.
>> I'm also fine with fixing these by a follow up patch (after merging this).
>>
>
> [...]
>
>>
>> [...]
>>
>>> diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
>>> index 490fb0e..6f03f08 100644
>>> --- a/drivers/usb/ulpi/ulpi-viewport.c
>>> +++ b/drivers/usb/ulpi/ulpi-viewport.c
>>
>> [...]
>>
>>> -int ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value)
>>> +int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
>>> {
>>> u32 val = ULPI_RWRUN | ULPI_RWCTRL | ((u32)reg << 16) | (value & 0xff);
>>
>> You should utilize the port_num variable here, right?
>> something like:
>> val |= (ulpi_vp->port_num & 0x7) << 24;
>>
>
> Yes correct, Shouldn't we add something like this
>
> [...]
>
> #ifndef CONFIG_ULPI_PORT_SHIFT && CONFIG_ULPI_PORT_MASK
> #define CONFIG_ULPI_PORT_SHIFT 24
> #define CONFIG_ULPI_PORT_MASK 0x7
> #endif
>
> [...]
>
> val |= (ulpi_vp->port_num & CONFIG_ULPI_PORT_MASK) <<
> CONFIG_ULPI_PORT_SHIFT;
We have already discussed this in the previous session [1]
And the conclusion was to use plain values instead,
because otherwise, you should replace all other masks and shifts...
and that will be a mess...
IMO,
(ulpi_vp->port_num & 0x7) << 24;
is really self explanatory and intuitive, so replacing it with defines
just make the code look bad and split into multiple lines.
Also the values are viewport specific and will not change, so
there is no reason to make them a config option.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/124222
>
>
>>>
>>> - return ulpi_request(ulpi_viewport, val);
>>> + return ulpi_request(ulpi_vp, val);
>>> }
>>>
>>> -u32 ulpi_read(u32 ulpi_viewport, u8 *reg)
>>> +u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
>>> {
>>> int err;
>>> u32 val = ULPI_RWRUN | ((u32)reg << 16);
>>
>> same here
>>
>>>
>>> - err = ulpi_request(ulpi_viewport, val);
>>> + err = ulpi_request(ulpi_vp, val);
>>> if (err)
>>> return err;
>>>
>>> - return (readl(ulpi_viewport) >> 8) & 0xff;
>>> + return (readl(ulpi_vp->viewport_addr) >> 8) & 0xff;
>>> }
[...]
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework.
2012-02-03 13:38 ` [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework Govindraj.R
2012-02-06 8:55 ` Igor Grinberg
@ 2012-02-08 17:42 ` SUBHASHINI MANNE
2012-02-09 6:32 ` Govindraj
1 sibling, 1 reply; 20+ messages in thread
From: SUBHASHINI MANNE @ 2012-02-08 17:42 UTC (permalink / raw)
To: u-boot
Govindraj,
I have Gumstix overo board with OM3730 + USB 3326 USB PHY.I want to add EHCI
and ULPI support in u-boot.
Once we port the EHCI_OMAP EHCI driver How to test this driver functionality
under u-boot environment?
Is there any application/commands to test ULPI functionality under u-boot
environment?
Regards,
Subhashini
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework.
2012-02-08 17:42 ` SUBHASHINI MANNE
@ 2012-02-09 6:32 ` Govindraj
0 siblings, 0 replies; 20+ messages in thread
From: Govindraj @ 2012-02-09 6:32 UTC (permalink / raw)
To: u-boot
Hi Subhashini,
On Wed, Feb 8, 2012 at 11:12 PM, SUBHASHINI MANNE <subbusiddu@gmail.com> wrote:
>
> Govindraj,
> ?I have Gumstix overo board with OM3730 + USB 3326 USB PHY.I want to add EHCI
> and ULPI support in u-boot.
You can refer to the v4 patch series posted earlier:
http://www.mail-archive.com/u-boot at lists.denx.de/msg76860.html
This patch series adds support for omap4_panda using the ehci-omap framework,
You can refer to panda board file change on how to do it.
Or you also refer to this patch adding support for OMAP3: TAM3517
http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/124645
Something similar needs to be done for your board file to support ehci.
>
> ?Once we port the EHCI_OMAP ?EHCI driver How to test this driver functionality
> under u-boot environment?
usb start;
usb info;
usb tree;
some commands to check if your downstream device is getting enumerated.
refer to usb help in u-boot for usage.
you can also use fatls and other use case if you have a hub connected
to you root port or you can also check for tftpboot if you have
ethernet controller
over ehci (like in panda or beagle).
care to update your config file for usb ehci enabling
(refer to v4 patch series as done for panda/beagle)
> ?Is there any application/commands to ?test ULPI functionality under u-boot
> environment?
>
what kind of ulpi functionality do you want to test omap-ulpi-viewport
is basically for the ulpi phy access from INSNREG05_ULPI from ehci
reg map to configure and debug phy interface.
(chapter 22.2.2.3 ULPI Interfaces from omap36xx TRM v1.x vW)
You can refer to OMAP TRM chapter 22.2 High-Speed USB Host Subsystem
for reference.
--
Thanks,
Govindraj.R
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 7/7] usb: ulpi: Add omap-ulpi-view port support
2012-02-03 13:38 [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs Govindraj.R
` (5 preceding siblings ...)
2012-02-03 13:38 ` [U-Boot] [PATCH v3 6/7] usb: ulpi: Extend the existing ulpi framework Govindraj.R
@ 2012-02-03 13:38 ` Govindraj.R
2012-02-06 9:10 ` Igor Grinberg
2012-02-03 15:25 ` [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs Tom Rini
7 siblings, 1 reply; 20+ messages in thread
From: Govindraj.R @ 2012-02-03 13:38 UTC (permalink / raw)
To: u-boot
From: "Govindraj.R" <govindraj.raja@ti.com>
Based on discussion from this thread [1].
Adding omap-view port that helps us in using the generic ulpi
framework for any ulpi phy ops using the INSNREG05_ULPI viewport
reg available on omap platform.
Currently ehci ports are available on omap3/4 platforms so enable the same
for beagle and panda, patch is tested on the same boards.
Thanks to Igor Grinberg <grinberg@compulab.co.il> for reviewing the
omap-ehci patches and suggesting this approach.
[1]: http://www.mail-archive.com/u-boot at lists.denx.de/msg76076.html
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
doc/README.omap-ulpi-viewport | 27 +++++++++
drivers/usb/ulpi/Makefile | 1 +
drivers/usb/ulpi/omap-ulpi-viewport.c | 105 +++++++++++++++++++++++++++++++++
include/configs/omap3_beagle.h | 3 +
include/configs/omap4_panda.h | 2 +
5 files changed, 138 insertions(+), 0 deletions(-)
create mode 100644 doc/README.omap-ulpi-viewport
create mode 100644 drivers/usb/ulpi/omap-ulpi-viewport.c
diff --git a/doc/README.omap-ulpi-viewport b/doc/README.omap-ulpi-viewport
new file mode 100644
index 0000000..19feecd
--- /dev/null
+++ b/doc/README.omap-ulpi-viewport
@@ -0,0 +1,27 @@
+Reference code ""drivers/usb/ulpi/omap-ulpi-viewport.c"
+
+Contains the ulpi read write api's to perform
+any ulpi phy port access on omap platform.
+
+On omap ehci reg map contains INSNREG05_ULPI
+register which offers the ulpi phy access so
+any ulpi phy commands can be passsed using this
+register.
+
+omap-ulpi-viewport.c is a low level function
+implementation of "drivers/usb/ulpi/ulpi.c"
+
+To enable and use omap-ulpi-viewport.c
+we requires CONFIG_USB_ULPI_VIEWPORT_OMAP and
+CONFIG_USB_ULPI be enabled from config file.
+
+Any ulpi ops request can be done with ulpi.c
+and soc specific binding and usage is done with
+omap-ulpi-viewport implementation.
+
+Ex: scenario:
+omap-ehci driver code requests for ulpi phy reset if
+ehci is used in phy mode, which will call ulpi phy reset
+the ulpi phy reset does ulpi_read/write from viewport
+implementation which will do ulpi reset using the
+INSNREG05_ULPI register.
diff --git a/drivers/usb/ulpi/Makefile b/drivers/usb/ulpi/Makefile
index d43b229..281eb1c 100644
--- a/drivers/usb/ulpi/Makefile
+++ b/drivers/usb/ulpi/Makefile
@@ -24,6 +24,7 @@ LIB := $(obj)libusb_ulpi.o
COBJS-$(CONFIG_USB_ULPI) += ulpi.o
COBJS-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi-viewport.o
+COBJS-$(CONFIG_USB_ULPI_VIEWPORT_OMAP) += omap-ulpi-viewport.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c b/drivers/usb/ulpi/omap-ulpi-viewport.c
new file mode 100644
index 0000000..66b1795
--- /dev/null
+++ b/drivers/usb/ulpi/omap-ulpi-viewport.c
@@ -0,0 +1,105 @@
+/*
+ * OMAP ulpi viewport support
+ * Based on drivers/usb/ulpi/ulpi-viewport.c
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com
+ * Author: Govindraj R <govindraj.raja@ti.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <usb/ulpi.h>
+
+#define OMAP_ULPI_WR_OPSEL (3 << 21)
+#define OMAP_ULPI_ACCESS (1 << 31)
+
+/*
+ * Wait for the ULPI Access to complete
+ */
+static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask)
+{
+ int timeout = CONFIG_USB_ULPI_TIMEOUT;
+
+ while (--timeout) {
+ if ((readl(ulpi_vp->viewport_addr) & mask))
+ return 0;
+
+ udelay(1);
+ }
+
+ return ULPI_ERROR;
+}
+
+/*
+ * Wake the ULPI PHY up for communication
+ *
+ * returns 0 on success.
+ */
+static int ulpi_wakeup(struct ulpi_viewport *ulpi_vp)
+{
+ int err;
+
+ if (readl(ulpi_vp->viewport_addr) & OMAP_ULPI_ACCESS)
+ return 0; /* already awake */
+
+ writel(OMAP_ULPI_ACCESS, ulpi_vp->viewport_addr);
+
+ err = ulpi_wait(ulpi_vp, OMAP_ULPI_ACCESS);
+ if (err)
+ debug("ULPI wakeup timed out\n");
+
+ return err;
+}
+
+/*
+ * Issue a ULPI read/write request
+ */
+static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value)
+{
+ int err;
+
+ err = ulpi_wakeup(ulpi_vp);
+ if (err)
+ return err;
+
+ writel(value, ulpi_vp->viewport_addr);
+
+ err = ulpi_wait(ulpi_vp, OMAP_ULPI_ACCESS);
+ if (err)
+ debug("ULPI request timed out\n");
+
+ return err;
+}
+
+int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
+{
+ u32 val = ((ulpi_vp->port_num & 0x7) << 24) |
+ OMAP_ULPI_WR_OPSEL | ((u32)reg << 16) | (value & 0xff);
+
+ return ulpi_request(ulpi_vp, val);
+}
+
+u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
+{
+ int err;
+ u32 val = ((ulpi_vp->port_num & 0x7) << 24) |
+ OMAP_ULPI_WR_OPSEL | ((u32)reg << 16);
+
+ err = ulpi_request(ulpi_vp, val);
+ if (err)
+ return err;
+
+ return readl(ulpi_vp->viewport_addr) & 0xff;
+}
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index b4d6443..b3b5651 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -130,6 +130,9 @@
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT_OMAP
+
/*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index 23c0230..0afcdd4 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -38,6 +38,8 @@
#define CONFIG_USB_HOST
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT_OMAP
#define CONFIG_USB_STORAGE
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
--
1.7.5.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH v3 7/7] usb: ulpi: Add omap-ulpi-view port support
2012-02-03 13:38 ` [U-Boot] [PATCH v3 7/7] usb: ulpi: Add omap-ulpi-view port support Govindraj.R
@ 2012-02-06 9:10 ` Igor Grinberg
0 siblings, 0 replies; 20+ messages in thread
From: Igor Grinberg @ 2012-02-06 9:10 UTC (permalink / raw)
To: u-boot
On 02/03/12 15:38, Govindraj.R wrote:
> From: "Govindraj.R" <govindraj.raja@ti.com>
>
> Based on discussion from this thread [1].
> Adding omap-view port that helps us in using the generic ulpi
> framework for any ulpi phy ops using the INSNREG05_ULPI viewport
> reg available on omap platform.
>
> Currently ehci ports are available on omap3/4 platforms so enable the same
> for beagle and panda, patch is tested on the same boards.
>
> Thanks to Igor Grinberg <grinberg@compulab.co.il> for reviewing the
> omap-ehci patches and suggesting this approach.
>
> [1]: http://www.mail-archive.com/u-boot at lists.denx.de/msg76076.html
>
> Tested-by: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
After fixing several neats below,
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
> ---
> doc/README.omap-ulpi-viewport | 27 +++++++++
> drivers/usb/ulpi/Makefile | 1 +
> drivers/usb/ulpi/omap-ulpi-viewport.c | 105 +++++++++++++++++++++++++++++++++
> include/configs/omap3_beagle.h | 3 +
> include/configs/omap4_panda.h | 2 +
> 5 files changed, 138 insertions(+), 0 deletions(-)
> create mode 100644 doc/README.omap-ulpi-viewport
> create mode 100644 drivers/usb/ulpi/omap-ulpi-viewport.c
>
> diff --git a/doc/README.omap-ulpi-viewport b/doc/README.omap-ulpi-viewport
> new file mode 100644
> index 0000000..19feecd
> --- /dev/null
> +++ b/doc/README.omap-ulpi-viewport
> @@ -0,0 +1,27 @@
> +Reference code ""drivers/usb/ulpi/omap-ulpi-viewport.c"
> +
> +Contains the ulpi read write api's to perform
> +any ulpi phy port access on omap platform.
> +
> +On omap ehci reg map contains INSNREG05_ULPI
> +register which offers the ulpi phy access so
> +any ulpi phy commands can be passsed using this
should be passed ^^^
> +register.
> +
> +omap-ulpi-viewport.c is a low level function
> +implementation of "drivers/usb/ulpi/ulpi.c"
> +
> +To enable and use omap-ulpi-viewport.c
> +we requires CONFIG_USB_ULPI_VIEWPORT_OMAP and
s/requires/require/
> +CONFIG_USB_ULPI be enabled from config file.
s/from/in/
> +
> +Any ulpi ops request can be done with ulpi.c
> +and soc specific binding and usage is done with
> +omap-ulpi-viewport implementation.
> +
> +Ex: scenario:
> +omap-ehci driver code requests for ulpi phy reset if
> +ehci is used in phy mode, which will call ulpi phy reset
> +the ulpi phy reset does ulpi_read/write from viewport
> +implementation which will do ulpi reset using the
> +INSNREG05_ULPI register.
[...]
> diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c b/drivers/usb/ulpi/omap-ulpi-viewport.c
> new file mode 100644
> index 0000000..66b1795
> --- /dev/null
> +++ b/drivers/usb/ulpi/omap-ulpi-viewport.c
[...]
> +int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
> +{
> + u32 val = ((ulpi_vp->port_num & 0x7) << 24) |
> + OMAP_ULPI_WR_OPSEL | ((u32)reg << 16) | (value & 0xff);
On OMAP, port_num is 4 bits wide, therefore:
ulpi_vp->port_num & 0xf
> +
> + return ulpi_request(ulpi_vp, val);
> +}
> +
> +u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
> +{
> + int err;
> + u32 val = ((ulpi_vp->port_num & 0x7) << 24) |
> + OMAP_ULPI_WR_OPSEL | ((u32)reg << 16);
same here:
ulpi_vp->port_num & 0xf
> +
> + err = ulpi_request(ulpi_vp, val);
> + if (err)
> + return err;
> +
> + return readl(ulpi_vp->viewport_addr) & 0xff;
> +}
[...]
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs
2012-02-03 13:38 [U-Boot] [PATCH v3 0/7] Clean up ehci-omap and extend support for omap3/4 socs Govindraj.R
` (6 preceding siblings ...)
2012-02-03 13:38 ` [U-Boot] [PATCH v3 7/7] usb: ulpi: Add omap-ulpi-view port support Govindraj.R
@ 2012-02-03 15:25 ` Tom Rini
7 siblings, 0 replies; 20+ messages in thread
From: Tom Rini @ 2012-02-03 15:25 UTC (permalink / raw)
To: u-boot
On Fri, Feb 3, 2012 at 6:38 AM, Govindraj.R <govindraj.raja@ti.com> wrote:
> From: "Govindraj.R" <govindraj.raja@ti.com>
>
> Clean up ehci-omap added and make it generic to extend support for omap4 socs.
> Adds omap-ulpi-viewport for ulpi access from ehci-omap.
> Adds ehci support for omap4-panda.
>
> Based on latest denx master branch commit:
> ? ? ? ?137703b811502dfea364650fb3e17f20b4c21333
This adds warnings for omap4_sdp4430 and omap5_evm, please re-spin
with these not introduced.
Also, the order of the patches is wrong. Please use
https://github.com/dustin/bindir/blob/master/git-test-sequence to make
sure that MAKEALL -s omap4 -s omap5 omap3_beagle still builds at each
step. The ulpi commits are out of order currently and that breaks
things.
Thanks!
--
Tom
^ permalink raw reply [flat|nested] 20+ messages in thread