From mboxrd@z Thu Jan 1 00:00:00 1970 From: Matthias Fuchs Date: Fri, 10 Feb 2012 13:30:14 +0100 Subject: [U-Boot] [PATCH 4/4] Added NAND flash pin configuration In-Reply-To: <1328633555-27538-5-git-send-email-robert@delien.nl> References: <1328633555-27538-1-git-send-email-robert@delien.nl> <1328633555-27538-5-git-send-email-robert@delien.nl> Message-ID: <4F350DD6.8060507@esd.eu> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Do you plan to post a patch to enable NAND on the EVK as well? That shouldn't be a big deal. Matthias On 07.02.2012 17:52, robert at delien.nl wrote: > From: Robert Delien > > > Signed-off-by: Robert Delien > --- > board/freescale/mx28evk/iomux.c | 24 ++++++++++++++++++++++++ > 1 files changed, 24 insertions(+), 0 deletions(-) > > diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c > index d6f9d0a..781f36d 100644 > --- a/board/freescale/mx28evk/iomux.c > +++ b/board/freescale/mx28evk/iomux.c > @@ -29,6 +29,7 @@ > #define MUX_CONFIG_SSP1 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) > #define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) > #define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL) > +#define MUX_CONFIG_NAND (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) > > const iomux_cfg_t iomux_setup[] = { > /* Debug UART (DUART) */ > @@ -77,6 +78,29 @@ const iomux_cfg_t iomux_setup[] = { > MX28_PAD_GPMI_ALE__GPIO_0_26 | MXS_PAD_3V3, > MX28_PAD_GPMI_CE1N__GPIO_0_17 | MXS_PAD_3V3, > MX28_PAD_GPMI_CE0N__GPIO_0_16 | MXS_PAD_3V3, > +#else > + /* On-board NAND flash ZIF-socket */ > + MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_RDN__GPMI_RDN | > + MXS_PAD_1V8 | MXS_PAD_8MA | MXS_PAD_PULLUP, > + MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_RDY1__GPMI_READY1 | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_NAND, > + MX28_PAD_GPMI_CE1N__GPMI_CE1N | MUX_CONFIG_NAND, > + /* NAND Write-protect */ > + MX28_PAD_GPMI_RESETN__GPIO_0_28 | MXS_PAD_3V3, > + /* Not used for NAND flash */ > + MX28_PAD_PWM4__GPIO_3_29 | MXS_PAD_3V3, > #endif /* nCONFIG_CMD_NAND */ > /* FEC0 */ > MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,