[U-Boot] [PATCH] microblaze: avoid interrupt race conditions

[U-Boot] [PATCH] microblaze: avoid interrupt race conditions

[Stephan Linz]

The interrupt acknowledge action have to run after the
registered interrupt handler. So we have a chance to
bear out the corresponding interrupt request in the
corresponding controller hardware.

With this reorderng, we optain a proper interrupt
handling for level triggerd interrupt sources -- for
example the new axi_timer v1.02.a introduced in ISE 13.2

Signed-off-by: Stephan Linz <linz@li-pro.net>
---
 arch/microblaze/cpu/interrupts.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
index 5a13211..e7ca859 100644
--- a/arch/microblaze/cpu/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
@@ -155,8 +155,6 @@ void interrupt_handler (void)
 #endif
 	struct irq_action *act = vecs + irqs;
 
-	intc->iar = mask << irqs;
-
 #ifdef DEBUG_INT
 	printf
 	    ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
@@ -165,6 +163,8 @@ void interrupt_handler (void)
 	act->handler (act->arg);
 	act->count++;
 
+	intc->iar = mask << irqs;
+
 #ifdef DEBUG_INT
 	printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
 		intc->ier, intc->iar, intc->mer);
-- 
1.7.0.4

[U-Boot] [PATCH] microblaze: avoid interrupt race conditions

[Michal Simek]

Stephan Linz wrote:
> The interrupt acknowledge action have to run after the
> registered interrupt handler. So we have a chance to
> bear out the corresponding interrupt request in the
> corresponding controller hardware.
> 
> With this reorderng, we optain a proper interrupt

obtain


> handling for level triggerd interrupt sources -- for

triggered

> example the new axi_timer v1.02.a introduced in ISE 13.2
> 
> Signed-off-by: Stephan Linz <linz@li-pro.net>
> ---
>  arch/microblaze/cpu/interrupts.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
> index 5a13211..e7ca859 100644
> --- a/arch/microblaze/cpu/interrupts.c
> +++ b/arch/microblaze/cpu/interrupts.c
> @@ -155,8 +155,6 @@ void interrupt_handler (void)
>  #endif
>  	struct irq_action *act = vecs + irqs;
>  
> -	intc->iar = mask << irqs;
> -
>  #ifdef DEBUG_INT
>  	printf
>  	    ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
> @@ -165,6 +163,8 @@ void interrupt_handler (void)
>  	act->handler (act->arg);
>  	act->count++;
>  
> +	intc->iar = mask << irqs;
> +
>  #ifdef DEBUG_INT
>  	printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
>  		intc->ier, intc->iar, intc->mer);

Agree. This is good patch.

Please fix that commit message and add my
Acked-by: Michal Simek <monstr@monstr.eu>

Thanks,
Michal



-- 
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian

[U-Boot] [PATCH] microblaze: avoid interrupt race conditions

[Stephan Linz]

The interrupt acknowledge action have to run after the
registered interrupt handler. So we have a chance to
bear out the corresponding interrupt request in the
corresponding controller hardware.

With this reordering, we optain a proper interrupt
handling for level triggered interrupt sources -- for
example the new axi_timer v1.02.a introduced in ISE 13.2.

Signed-off-by: Stephan Linz <linz@li-pro.net>
Acked-by: Michal Simek <monstr@monstr.eu>
---
 arch/microblaze/cpu/interrupts.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
index 5a13211..e7ca859 100644
--- a/arch/microblaze/cpu/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
@@ -155,8 +155,6 @@ void interrupt_handler (void)
 #endif
 	struct irq_action *act = vecs + irqs;
 
-	intc->iar = mask << irqs;
-
 #ifdef DEBUG_INT
 	printf
 	    ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
@@ -165,6 +163,8 @@ void interrupt_handler (void)
 	act->handler (act->arg);
 	act->count++;
 
+	intc->iar = mask << irqs;
+
 #ifdef DEBUG_INT
 	printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
 		intc->ier, intc->iar, intc->mer);
-- 
1.7.0.4

[U-Boot] [PATCH] microblaze: avoid interrupt race conditions

[Michal Simek]

Stephan Linz wrote:
> The interrupt acknowledge action have to run after the
> registered interrupt handler. So we have a chance to
> bear out the corresponding interrupt request in the
> corresponding controller hardware.
> 
> With this reordering, we optain a proper interrupt
> handling for level triggered interrupt sources -- for
> example the new axi_timer v1.02.a introduced in ISE 13.2.
> 
> Signed-off-by: Stephan Linz <linz@li-pro.net>
> Acked-by: Michal Simek <monstr@monstr.eu>
> ---
>  arch/microblaze/cpu/interrupts.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
> index 5a13211..e7ca859 100644
> --- a/arch/microblaze/cpu/interrupts.c
> +++ b/arch/microblaze/cpu/interrupts.c
> @@ -155,8 +155,6 @@ void interrupt_handler (void)
>  #endif
>  	struct irq_action *act = vecs + irqs;
>  
> -	intc->iar = mask << irqs;
> -
>  #ifdef DEBUG_INT
>  	printf
>  	    ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
> @@ -165,6 +163,8 @@ void interrupt_handler (void)
>  	act->handler (act->arg);
>  	act->count++;
>  
> +	intc->iar = mask << irqs;
> +
>  #ifdef DEBUG_INT
>  	printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
>  		intc->ier, intc->iar, intc->mer);

Applied.

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian