* [U-Boot] [PATCH 0/7] Set of various i.MX28 patches
@ 2012-02-26 22:15 Marek Vasut
2012-02-26 22:15 ` [U-Boot] [PATCH 1/7] M28: Fix LCD PINMUX Marek Vasut
` (6 more replies)
0 siblings, 7 replies; 21+ messages in thread
From: Marek Vasut @ 2012-02-26 22:15 UTC (permalink / raw)
To: u-boot
These patches fix random issues on the i.MX28 series.
Marek Vasut (4):
M28: Fix LCD PINMUX
M28: Support for the old M28 SoM v1.0
i.MX28: Reformat the DRAM memory configuration data
i.MX28: Enable additional DRAM address bits
Robert Delien (3):
Renamed mx28_register to mx28_register_32 to prepare for
mx28_register_8
Introducing 8-bit wide register, mx28_register_8
Fix erroneous 32-bit access to hw_clkctrl_frac0 and hw_clkctrl_frac1
registers
arch/arm/cpu/arm926ejs/mx28/clock.c | 74 +++-----
arch/arm/cpu/arm926ejs/mx28/iomux.c | 6 +-
arch/arm/cpu/arm926ejs/mx28/mx28.c | 6 +-
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 112 ++++++-----
arch/arm/include/asm/arch-mx28/regs-apbh.h | 254 ++++++++++++------------
arch/arm/include/asm/arch-mx28/regs-bch.h | 42 ++--
arch/arm/include/asm/arch-mx28/regs-clkctrl.h | 98 ++++------
arch/arm/include/asm/arch-mx28/regs-common.h | 28 ++-
arch/arm/include/asm/arch-mx28/regs-gpmi.h | 26 ++--
arch/arm/include/asm/arch-mx28/regs-i2c.h | 28 ++--
arch/arm/include/asm/arch-mx28/regs-ocotp.h | 86 ++++----
arch/arm/include/asm/arch-mx28/regs-pinctrl.h | 168 ++++++++--------
arch/arm/include/asm/arch-mx28/regs-power.h | 28 ++--
arch/arm/include/asm/arch-mx28/regs-rtc.h | 28 ++--
arch/arm/include/asm/arch-mx28/regs-ssp.h | 40 ++--
arch/arm/include/asm/arch-mx28/regs-timrot.h | 38 ++--
arch/arm/include/asm/arch-mx28/regs-usbphy.h | 20 +-
arch/arm/include/asm/arch-mx28/sys_proto.h | 10 +-
board/denx/m28evk/spl_boot.c | 16 +-
drivers/gpio/mxs_gpio.c | 16 +-
drivers/usb/host/ehci-mxs.c | 8 +-
21 files changed, 562 insertions(+), 570 deletions(-)
--
1.7.9
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 1/7] M28: Fix LCD PINMUX
2012-02-26 22:15 [U-Boot] [PATCH 0/7] Set of various i.MX28 patches Marek Vasut
@ 2012-02-26 22:15 ` Marek Vasut
2012-03-03 9:06 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 2/7] M28: Support for the old M28 SoM v1.0 Marek Vasut
` (5 subsequent siblings)
6 siblings, 1 reply; 21+ messages in thread
From: Marek Vasut @ 2012-02-26 22:15 UTC (permalink / raw)
To: u-boot
The LCD pins configuration was wrong in U-Boot, configure pins properly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
---
board/denx/m28evk/spl_boot.c | 11 ++---------
1 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/board/denx/m28evk/spl_boot.c b/board/denx/m28evk/spl_boot.c
index 86d7d87..91316a7 100644
--- a/board/denx/m28evk/spl_boot.c
+++ b/board/denx/m28evk/spl_boot.c
@@ -31,7 +31,7 @@
#include <asm/arch/sys_proto.h>
#define MUX_CONFIG_LED (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
-#define MUX_CONFIG_LCD (MXS_PAD_3V3 | MXS_PAD_4MA)
+#define MUX_CONFIG_LCD (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
#define MUX_CONFIG_TSC (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
@@ -68,15 +68,8 @@ const iomux_cfg_t iomux_setup[] = {
MX28_PAD_LCD_D21__LCD_D21 | MUX_CONFIG_LCD,
MX28_PAD_LCD_D22__LCD_D22 | MUX_CONFIG_LCD,
MX28_PAD_LCD_D23__LCD_D23 | MUX_CONFIG_LCD,
- MX28_PAD_LCD_RD_E__LCD_VSYNC | MUX_CONFIG_LCD,
- MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MUX_CONFIG_LCD,
- MX28_PAD_LCD_RS__LCD_DOTCLK | MUX_CONFIG_LCD,
- MX28_PAD_LCD_CS__LCD_CS | MUX_CONFIG_LCD,
- MX28_PAD_LCD_VSYNC__LCD_VSYNC | MUX_CONFIG_LCD,
- MX28_PAD_LCD_HSYNC__LCD_HSYNC | MUX_CONFIG_LCD,
MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | MUX_CONFIG_LCD,
- MX28_PAD_LCD_ENABLE__GPIO_1_31 | MUX_CONFIG_LCD,
- MX28_PAD_LCD_RESET__GPIO_3_30 | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_ENABLE__LCD_ENABLE | MUX_CONFIG_LCD,
/* UART1 */
MX28_PAD_PWM0__DUART_RX,
--
1.7.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 2/7] M28: Support for the old M28 SoM v1.0
2012-02-26 22:15 [U-Boot] [PATCH 0/7] Set of various i.MX28 patches Marek Vasut
2012-02-26 22:15 ` [U-Boot] [PATCH 1/7] M28: Fix LCD PINMUX Marek Vasut
@ 2012-02-26 22:15 ` Marek Vasut
2012-03-03 9:07 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 3/7] i.MX28: Reformat the DRAM memory configuration data Marek Vasut
` (4 subsequent siblings)
6 siblings, 1 reply; 21+ messages in thread
From: Marek Vasut @ 2012-02-26 22:15 UTC (permalink / raw)
To: u-boot
This prototype version SoM is unused and not available to public.
Support this only for internal debugging purposes.
Signed-off-by: Marek Vasut <marex@denx.de>
---
board/denx/m28evk/spl_boot.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/board/denx/m28evk/spl_boot.c b/board/denx/m28evk/spl_boot.c
index 91316a7..a04fe18 100644
--- a/board/denx/m28evk/spl_boot.c
+++ b/board/denx/m28evk/spl_boot.c
@@ -72,8 +72,13 @@ const iomux_cfg_t iomux_setup[] = {
MX28_PAD_LCD_ENABLE__LCD_ENABLE | MUX_CONFIG_LCD,
/* UART1 */
+#ifdef CONFIG_DENX_M28_V10
+ MX28_PAD_AUART0_CTS__DUART_RX,
+ MX28_PAD_AUART0_RTS__DUART_TX,
+#else
MX28_PAD_PWM0__DUART_RX,
MX28_PAD_PWM1__DUART_TX,
+#endif
MX28_PAD_AUART0_TX__DUART_RTS,
MX28_PAD_AUART0_RX__DUART_CTS,
--
1.7.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 3/7] i.MX28: Reformat the DRAM memory configuration data
2012-02-26 22:15 [U-Boot] [PATCH 0/7] Set of various i.MX28 patches Marek Vasut
2012-02-26 22:15 ` [U-Boot] [PATCH 1/7] M28: Fix LCD PINMUX Marek Vasut
2012-02-26 22:15 ` [U-Boot] [PATCH 2/7] M28: Support for the old M28 SoM v1.0 Marek Vasut
@ 2012-02-26 22:15 ` Marek Vasut
2012-03-03 9:09 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits Marek Vasut
` (3 subsequent siblings)
6 siblings, 1 reply; 21+ messages in thread
From: Marek Vasut @ 2012-02-26 22:15 UTC (permalink / raw)
To: u-boot
Reformat the data so it's easier to navigate through them.
Signed-off-by: Marek Vasut <marex@denx.de>
---
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 86 +++++++++++++++------------
1 files changed, 48 insertions(+), 38 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index db67011..4af9eb7 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -32,44 +32,54 @@
#include "mx28_init.h"
uint32_t dram_vals[] = {
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000100, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00010101, 0x01010101, 0x000f0f01, 0x0f02020a,
- 0x00000000, 0x00010101, 0x00000100, 0x00000100, 0x00000000,
- 0x00000002, 0x01010000, 0x05060302, 0x06005003, 0x0a0000c8,
- 0x02009c40, 0x0000030c, 0x0036a609, 0x031a0612, 0x02030202,
- 0x00c8001c, 0x00000000, 0x00000000, 0x00012100, 0xffff0303,
- 0x00012100, 0xffff0303, 0x00012100, 0xffff0303, 0x00012100,
- 0xffff0303, 0x00000003, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000612, 0x01000F02, 0x06120612, 0x00000200,
- 0x00020007, 0xf5014b27, 0xf5014b27, 0xf5014b27, 0xf5014b27,
- 0x07000300, 0x07000300, 0x07000300, 0x07000300, 0x00000006,
- 0x00000000, 0x00000000, 0x01000000, 0x01020408, 0x08040201,
- 0x000f1133, 0x00000000, 0x00001f04, 0x00001f04, 0x00001f04,
- 0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00010000, 0x00020304, 0x00000004,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x01010000, 0x01000000, 0x03030000, 0x00010303,
- 0x01020202, 0x00000000, 0x02040303, 0x21002103, 0x00061200,
- 0x06120612, 0x04320432, 0x04320432, 0x00040004, 0x00040004,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010001
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000100, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00010101, 0x01010101,
+ 0x000f0f01, 0x0f02020a, 0x00000000, 0x00010101,
+ 0x00000100, 0x00000100, 0x00000000, 0x00000002,
+ 0x01010000, 0x05060302, 0x06005003, 0x0a0000c8,
+ 0x02009c40, 0x0000030c, 0x0036a609, 0x031a0612,
+ 0x02030202, 0x00c8001c, 0x00000000, 0x00000000,
+ 0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
+ 0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
+ 0x00000003, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000612, 0x01000F02,
+ 0x06120612, 0x00000200, 0x00020007, 0xf5014b27,
+ 0xf5014b27, 0xf5014b27, 0xf5014b27, 0x07000300,
+ 0x07000300, 0x07000300, 0x07000300, 0x00000006,
+ 0x00000000, 0x00000000, 0x01000000, 0x01020408,
+ 0x08040201, 0x000f1133, 0x00000000, 0x00001f04,
+ 0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04,
+ 0x00001f04, 0x00001f04, 0x00001f04, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00010000, 0x00020304,
+ 0x00000004, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x01010000,
+ 0x01000000, 0x03030000, 0x00010303, 0x01020202,
+ 0x00000000, 0x02040303, 0x21002103, 0x00061200,
+ 0x06120612, 0x04320432, 0x04320432, 0x00040004,
+ 0x00040004, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00010001
};
void init_m28_200mhz_ddr2(void)
--
1.7.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits
2012-02-26 22:15 [U-Boot] [PATCH 0/7] Set of various i.MX28 patches Marek Vasut
` (2 preceding siblings ...)
2012-02-26 22:15 ` [U-Boot] [PATCH 3/7] i.MX28: Reformat the DRAM memory configuration data Marek Vasut
@ 2012-02-26 22:15 ` Marek Vasut
2012-03-01 15:22 ` Fabio Estevam
2012-03-09 13:39 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 5/7] Renamed mx28_register to mx28_register_32 to prepare for mx28_register_8 Marek Vasut
` (2 subsequent siblings)
6 siblings, 2 replies; 21+ messages in thread
From: Marek Vasut @ 2012-02-26 22:15 UTC (permalink / raw)
To: u-boot
Signed-off-by: Marek Vasut <marex@denx.de>
---
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index 4af9eb7..fd18f70 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -39,7 +39,7 @@ uint32_t dram_vals[] = {
0x00000000, 0x00000100, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00010101, 0x01010101,
- 0x000f0f01, 0x0f02020a, 0x00000000, 0x00010101,
+ 0x000f0f01, 0x0f02010a, 0x00000000, 0x00010101,
0x00000100, 0x00000100, 0x00000000, 0x00000002,
0x01010000, 0x05060302, 0x06005003, 0x0a0000c8,
0x02009c40, 0x0000030c, 0x0036a609, 0x031a0612,
--
1.7.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 5/7] Renamed mx28_register to mx28_register_32 to prepare for mx28_register_8
2012-02-26 22:15 [U-Boot] [PATCH 0/7] Set of various i.MX28 patches Marek Vasut
` (3 preceding siblings ...)
2012-02-26 22:15 ` [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits Marek Vasut
@ 2012-02-26 22:15 ` Marek Vasut
2012-03-03 9:13 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 6/7] Introducing 8-bit wide register, mx28_register_8 Marek Vasut
2012-02-26 22:15 ` [U-Boot] [PATCH 7/7] Fix erroneous 32-bit access to hw_clkctrl_frac0 and hw_clkctrl_frac1 registers Marek Vasut
6 siblings, 1 reply; 21+ messages in thread
From: Marek Vasut @ 2012-02-26 22:15 UTC (permalink / raw)
To: u-boot
From: Robert Delien <robert@delien.nl>
This patch renames mx28_register to mx28_register_32 in order to
prepare for the introduction of an 8-bit register, mx28_register_8.
Signed-off-by: Robert Delien <robert@delien.nl>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
---
arch/arm/cpu/arm926ejs/mx28/clock.c | 4 +-
arch/arm/cpu/arm926ejs/mx28/iomux.c | 6 +-
arch/arm/cpu/arm926ejs/mx28/mx28.c | 6 +-
arch/arm/include/asm/arch-mx28/regs-apbh.h | 254 ++++++++++++------------
arch/arm/include/asm/arch-mx28/regs-bch.h | 42 ++--
arch/arm/include/asm/arch-mx28/regs-clkctrl.h | 58 +++---
arch/arm/include/asm/arch-mx28/regs-common.h | 12 +-
arch/arm/include/asm/arch-mx28/regs-gpmi.h | 26 ++--
arch/arm/include/asm/arch-mx28/regs-i2c.h | 28 ++--
arch/arm/include/asm/arch-mx28/regs-ocotp.h | 86 ++++----
arch/arm/include/asm/arch-mx28/regs-pinctrl.h | 168 ++++++++--------
arch/arm/include/asm/arch-mx28/regs-power.h | 28 ++--
arch/arm/include/asm/arch-mx28/regs-rtc.h | 28 ++--
arch/arm/include/asm/arch-mx28/regs-ssp.h | 40 ++--
arch/arm/include/asm/arch-mx28/regs-timrot.h | 38 ++--
arch/arm/include/asm/arch-mx28/regs-usbphy.h | 20 +-
arch/arm/include/asm/arch-mx28/sys_proto.h | 10 +-
drivers/gpio/mxs_gpio.c | 16 +-
drivers/usb/host/ehci-mxs.c | 8 +-
19 files changed, 441 insertions(+), 437 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/clock.c b/arch/arm/cpu/arm926ejs/mx28/clock.c
index f698506..9d3a018 100644
--- a/arch/arm/cpu/arm926ejs/mx28/clock.c
+++ b/arch/arm/cpu/arm926ejs/mx28/clock.c
@@ -223,7 +223,7 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
return;
clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
- (ssp * sizeof(struct mx28_register));
+ (ssp * sizeof(struct mx28_register_32));
clrbits_le32(clkreg, CLKCTRL_SSP_CLKGATE);
while (readl(clkreg) & CLKCTRL_SSP_CLKGATE)
@@ -272,7 +272,7 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
return XTAL_FREQ_KHZ;
clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
- (ssp * sizeof(struct mx28_register));
+ (ssp * sizeof(struct mx28_register_32));
tmp = readl(clkreg) & CLKCTRL_SSP_DIV_MASK;
diff --git a/arch/arm/cpu/arm926ejs/mx28/iomux.c b/arch/arm/cpu/arm926ejs/mx28/iomux.c
index 9ea411f..12916b6 100644
--- a/arch/arm/cpu/arm926ejs/mx28/iomux.c
+++ b/arch/arm/cpu/arm926ejs/mx28/iomux.c
@@ -43,7 +43,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
{
u32 reg, ofs, bp, bm;
void *iomux_base = (void *)MXS_PINCTRL_BASE;
- struct mx28_register *mxs_reg;
+ struct mx28_register_32 *mxs_reg;
/* muxsel */
ofs = 0x100;
@@ -70,7 +70,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
/* vol */
if (PAD_VOL_VALID(pad)) {
bp = PAD_PIN(pad) % 8 * 4 + 2;
- mxs_reg = (struct mx28_register *)(iomux_base + ofs);
+ mxs_reg = (struct mx28_register_32 *)(iomux_base + ofs);
if (PAD_VOL(pad))
writel(1 << bp, &mxs_reg->reg_set);
else
@@ -82,7 +82,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
ofs = PULL_OFFSET;
ofs += PAD_BANK(pad) * 0x10;
bp = PAD_PIN(pad);
- mxs_reg = (struct mx28_register *)(iomux_base + ofs);
+ mxs_reg = (struct mx28_register_32 *)(iomux_base + ofs);
if (PAD_PULL(pad))
writel(1 << bp, &mxs_reg->reg_set);
else
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index b235091..9bfd83b 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -63,7 +63,7 @@ void reset_cpu(ulong ignored)
;
}
-int mx28_wait_mask_set(struct mx28_register *reg, uint32_t mask, int timeout)
+int mx28_wait_mask_set(struct mx28_register_32 *reg, uint32_t mask, int timeout)
{
while (--timeout) {
if ((readl(®->reg) & mask) == mask)
@@ -74,7 +74,7 @@ int mx28_wait_mask_set(struct mx28_register *reg, uint32_t mask, int timeout)
return !timeout;
}
-int mx28_wait_mask_clr(struct mx28_register *reg, uint32_t mask, int timeout)
+int mx28_wait_mask_clr(struct mx28_register_32 *reg, uint32_t mask, int timeout)
{
while (--timeout) {
if ((readl(®->reg) & mask) == 0)
@@ -85,7 +85,7 @@ int mx28_wait_mask_clr(struct mx28_register *reg, uint32_t mask, int timeout)
return !timeout;
}
-int mx28_reset_block(struct mx28_register *reg)
+int mx28_reset_block(struct mx28_register_32 *reg)
{
/* Clear SFTRST */
writel(MX28_BLOCK_SFTRST, ®->reg_clr);
diff --git a/arch/arm/include/asm/arch-mx28/regs-apbh.h b/arch/arm/include/asm/arch-mx28/regs-apbh.h
index a7fa1ec..91d7bc8 100644
--- a/arch/arm/include/asm/arch-mx28/regs-apbh.h
+++ b/arch/arm/include/asm/arch-mx28/regs-apbh.h
@@ -30,142 +30,142 @@
#ifndef __ASSEMBLY__
struct mx28_apbh_regs {
- mx28_reg(hw_apbh_ctrl0)
- mx28_reg(hw_apbh_ctrl1)
- mx28_reg(hw_apbh_ctrl2)
- mx28_reg(hw_apbh_channel_ctrl)
- mx28_reg(hw_apbh_devsel)
- mx28_reg(hw_apbh_dma_burst_size)
- mx28_reg(hw_apbh_debug)
+ mx28_reg_32(hw_apbh_ctrl0)
+ mx28_reg_32(hw_apbh_ctrl1)
+ mx28_reg_32(hw_apbh_ctrl2)
+ mx28_reg_32(hw_apbh_channel_ctrl)
+ mx28_reg_32(hw_apbh_devsel)
+ mx28_reg_32(hw_apbh_dma_burst_size)
+ mx28_reg_32(hw_apbh_debug)
uint32_t reserved[36];
union {
struct {
- mx28_reg(hw_apbh_ch_curcmdar)
- mx28_reg(hw_apbh_ch_nxtcmdar)
- mx28_reg(hw_apbh_ch_cmd)
- mx28_reg(hw_apbh_ch_bar)
- mx28_reg(hw_apbh_ch_sema)
- mx28_reg(hw_apbh_ch_debug1)
- mx28_reg(hw_apbh_ch_debug2)
+ mx28_reg_32(hw_apbh_ch_curcmdar)
+ mx28_reg_32(hw_apbh_ch_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch_cmd)
+ mx28_reg_32(hw_apbh_ch_bar)
+ mx28_reg_32(hw_apbh_ch_sema)
+ mx28_reg_32(hw_apbh_ch_debug1)
+ mx28_reg_32(hw_apbh_ch_debug2)
} ch[16];
struct {
- mx28_reg(hw_apbh_ch0_curcmdar)
- mx28_reg(hw_apbh_ch0_nxtcmdar)
- mx28_reg(hw_apbh_ch0_cmd)
- mx28_reg(hw_apbh_ch0_bar)
- mx28_reg(hw_apbh_ch0_sema)
- mx28_reg(hw_apbh_ch0_debug1)
- mx28_reg(hw_apbh_ch0_debug2)
- mx28_reg(hw_apbh_ch1_curcmdar)
- mx28_reg(hw_apbh_ch1_nxtcmdar)
- mx28_reg(hw_apbh_ch1_cmd)
- mx28_reg(hw_apbh_ch1_bar)
- mx28_reg(hw_apbh_ch1_sema)
- mx28_reg(hw_apbh_ch1_debug1)
- mx28_reg(hw_apbh_ch1_debug2)
- mx28_reg(hw_apbh_ch2_curcmdar)
- mx28_reg(hw_apbh_ch2_nxtcmdar)
- mx28_reg(hw_apbh_ch2_cmd)
- mx28_reg(hw_apbh_ch2_bar)
- mx28_reg(hw_apbh_ch2_sema)
- mx28_reg(hw_apbh_ch2_debug1)
- mx28_reg(hw_apbh_ch2_debug2)
- mx28_reg(hw_apbh_ch3_curcmdar)
- mx28_reg(hw_apbh_ch3_nxtcmdar)
- mx28_reg(hw_apbh_ch3_cmd)
- mx28_reg(hw_apbh_ch3_bar)
- mx28_reg(hw_apbh_ch3_sema)
- mx28_reg(hw_apbh_ch3_debug1)
- mx28_reg(hw_apbh_ch3_debug2)
- mx28_reg(hw_apbh_ch4_curcmdar)
- mx28_reg(hw_apbh_ch4_nxtcmdar)
- mx28_reg(hw_apbh_ch4_cmd)
- mx28_reg(hw_apbh_ch4_bar)
- mx28_reg(hw_apbh_ch4_sema)
- mx28_reg(hw_apbh_ch4_debug1)
- mx28_reg(hw_apbh_ch4_debug2)
- mx28_reg(hw_apbh_ch5_curcmdar)
- mx28_reg(hw_apbh_ch5_nxtcmdar)
- mx28_reg(hw_apbh_ch5_cmd)
- mx28_reg(hw_apbh_ch5_bar)
- mx28_reg(hw_apbh_ch5_sema)
- mx28_reg(hw_apbh_ch5_debug1)
- mx28_reg(hw_apbh_ch5_debug2)
- mx28_reg(hw_apbh_ch6_curcmdar)
- mx28_reg(hw_apbh_ch6_nxtcmdar)
- mx28_reg(hw_apbh_ch6_cmd)
- mx28_reg(hw_apbh_ch6_bar)
- mx28_reg(hw_apbh_ch6_sema)
- mx28_reg(hw_apbh_ch6_debug1)
- mx28_reg(hw_apbh_ch6_debug2)
- mx28_reg(hw_apbh_ch7_curcmdar)
- mx28_reg(hw_apbh_ch7_nxtcmdar)
- mx28_reg(hw_apbh_ch7_cmd)
- mx28_reg(hw_apbh_ch7_bar)
- mx28_reg(hw_apbh_ch7_sema)
- mx28_reg(hw_apbh_ch7_debug1)
- mx28_reg(hw_apbh_ch7_debug2)
- mx28_reg(hw_apbh_ch8_curcmdar)
- mx28_reg(hw_apbh_ch8_nxtcmdar)
- mx28_reg(hw_apbh_ch8_cmd)
- mx28_reg(hw_apbh_ch8_bar)
- mx28_reg(hw_apbh_ch8_sema)
- mx28_reg(hw_apbh_ch8_debug1)
- mx28_reg(hw_apbh_ch8_debug2)
- mx28_reg(hw_apbh_ch9_curcmdar)
- mx28_reg(hw_apbh_ch9_nxtcmdar)
- mx28_reg(hw_apbh_ch9_cmd)
- mx28_reg(hw_apbh_ch9_bar)
- mx28_reg(hw_apbh_ch9_sema)
- mx28_reg(hw_apbh_ch9_debug1)
- mx28_reg(hw_apbh_ch9_debug2)
- mx28_reg(hw_apbh_ch10_curcmdar)
- mx28_reg(hw_apbh_ch10_nxtcmdar)
- mx28_reg(hw_apbh_ch10_cmd)
- mx28_reg(hw_apbh_ch10_bar)
- mx28_reg(hw_apbh_ch10_sema)
- mx28_reg(hw_apbh_ch10_debug1)
- mx28_reg(hw_apbh_ch10_debug2)
- mx28_reg(hw_apbh_ch11_curcmdar)
- mx28_reg(hw_apbh_ch11_nxtcmdar)
- mx28_reg(hw_apbh_ch11_cmd)
- mx28_reg(hw_apbh_ch11_bar)
- mx28_reg(hw_apbh_ch11_sema)
- mx28_reg(hw_apbh_ch11_debug1)
- mx28_reg(hw_apbh_ch11_debug2)
- mx28_reg(hw_apbh_ch12_curcmdar)
- mx28_reg(hw_apbh_ch12_nxtcmdar)
- mx28_reg(hw_apbh_ch12_cmd)
- mx28_reg(hw_apbh_ch12_bar)
- mx28_reg(hw_apbh_ch12_sema)
- mx28_reg(hw_apbh_ch12_debug1)
- mx28_reg(hw_apbh_ch12_debug2)
- mx28_reg(hw_apbh_ch13_curcmdar)
- mx28_reg(hw_apbh_ch13_nxtcmdar)
- mx28_reg(hw_apbh_ch13_cmd)
- mx28_reg(hw_apbh_ch13_bar)
- mx28_reg(hw_apbh_ch13_sema)
- mx28_reg(hw_apbh_ch13_debug1)
- mx28_reg(hw_apbh_ch13_debug2)
- mx28_reg(hw_apbh_ch14_curcmdar)
- mx28_reg(hw_apbh_ch14_nxtcmdar)
- mx28_reg(hw_apbh_ch14_cmd)
- mx28_reg(hw_apbh_ch14_bar)
- mx28_reg(hw_apbh_ch14_sema)
- mx28_reg(hw_apbh_ch14_debug1)
- mx28_reg(hw_apbh_ch14_debug2)
- mx28_reg(hw_apbh_ch15_curcmdar)
- mx28_reg(hw_apbh_ch15_nxtcmdar)
- mx28_reg(hw_apbh_ch15_cmd)
- mx28_reg(hw_apbh_ch15_bar)
- mx28_reg(hw_apbh_ch15_sema)
- mx28_reg(hw_apbh_ch15_debug1)
- mx28_reg(hw_apbh_ch15_debug2)
+ mx28_reg_32(hw_apbh_ch0_curcmdar)
+ mx28_reg_32(hw_apbh_ch0_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch0_cmd)
+ mx28_reg_32(hw_apbh_ch0_bar)
+ mx28_reg_32(hw_apbh_ch0_sema)
+ mx28_reg_32(hw_apbh_ch0_debug1)
+ mx28_reg_32(hw_apbh_ch0_debug2)
+ mx28_reg_32(hw_apbh_ch1_curcmdar)
+ mx28_reg_32(hw_apbh_ch1_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch1_cmd)
+ mx28_reg_32(hw_apbh_ch1_bar)
+ mx28_reg_32(hw_apbh_ch1_sema)
+ mx28_reg_32(hw_apbh_ch1_debug1)
+ mx28_reg_32(hw_apbh_ch1_debug2)
+ mx28_reg_32(hw_apbh_ch2_curcmdar)
+ mx28_reg_32(hw_apbh_ch2_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch2_cmd)
+ mx28_reg_32(hw_apbh_ch2_bar)
+ mx28_reg_32(hw_apbh_ch2_sema)
+ mx28_reg_32(hw_apbh_ch2_debug1)
+ mx28_reg_32(hw_apbh_ch2_debug2)
+ mx28_reg_32(hw_apbh_ch3_curcmdar)
+ mx28_reg_32(hw_apbh_ch3_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch3_cmd)
+ mx28_reg_32(hw_apbh_ch3_bar)
+ mx28_reg_32(hw_apbh_ch3_sema)
+ mx28_reg_32(hw_apbh_ch3_debug1)
+ mx28_reg_32(hw_apbh_ch3_debug2)
+ mx28_reg_32(hw_apbh_ch4_curcmdar)
+ mx28_reg_32(hw_apbh_ch4_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch4_cmd)
+ mx28_reg_32(hw_apbh_ch4_bar)
+ mx28_reg_32(hw_apbh_ch4_sema)
+ mx28_reg_32(hw_apbh_ch4_debug1)
+ mx28_reg_32(hw_apbh_ch4_debug2)
+ mx28_reg_32(hw_apbh_ch5_curcmdar)
+ mx28_reg_32(hw_apbh_ch5_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch5_cmd)
+ mx28_reg_32(hw_apbh_ch5_bar)
+ mx28_reg_32(hw_apbh_ch5_sema)
+ mx28_reg_32(hw_apbh_ch5_debug1)
+ mx28_reg_32(hw_apbh_ch5_debug2)
+ mx28_reg_32(hw_apbh_ch6_curcmdar)
+ mx28_reg_32(hw_apbh_ch6_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch6_cmd)
+ mx28_reg_32(hw_apbh_ch6_bar)
+ mx28_reg_32(hw_apbh_ch6_sema)
+ mx28_reg_32(hw_apbh_ch6_debug1)
+ mx28_reg_32(hw_apbh_ch6_debug2)
+ mx28_reg_32(hw_apbh_ch7_curcmdar)
+ mx28_reg_32(hw_apbh_ch7_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch7_cmd)
+ mx28_reg_32(hw_apbh_ch7_bar)
+ mx28_reg_32(hw_apbh_ch7_sema)
+ mx28_reg_32(hw_apbh_ch7_debug1)
+ mx28_reg_32(hw_apbh_ch7_debug2)
+ mx28_reg_32(hw_apbh_ch8_curcmdar)
+ mx28_reg_32(hw_apbh_ch8_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch8_cmd)
+ mx28_reg_32(hw_apbh_ch8_bar)
+ mx28_reg_32(hw_apbh_ch8_sema)
+ mx28_reg_32(hw_apbh_ch8_debug1)
+ mx28_reg_32(hw_apbh_ch8_debug2)
+ mx28_reg_32(hw_apbh_ch9_curcmdar)
+ mx28_reg_32(hw_apbh_ch9_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch9_cmd)
+ mx28_reg_32(hw_apbh_ch9_bar)
+ mx28_reg_32(hw_apbh_ch9_sema)
+ mx28_reg_32(hw_apbh_ch9_debug1)
+ mx28_reg_32(hw_apbh_ch9_debug2)
+ mx28_reg_32(hw_apbh_ch10_curcmdar)
+ mx28_reg_32(hw_apbh_ch10_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch10_cmd)
+ mx28_reg_32(hw_apbh_ch10_bar)
+ mx28_reg_32(hw_apbh_ch10_sema)
+ mx28_reg_32(hw_apbh_ch10_debug1)
+ mx28_reg_32(hw_apbh_ch10_debug2)
+ mx28_reg_32(hw_apbh_ch11_curcmdar)
+ mx28_reg_32(hw_apbh_ch11_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch11_cmd)
+ mx28_reg_32(hw_apbh_ch11_bar)
+ mx28_reg_32(hw_apbh_ch11_sema)
+ mx28_reg_32(hw_apbh_ch11_debug1)
+ mx28_reg_32(hw_apbh_ch11_debug2)
+ mx28_reg_32(hw_apbh_ch12_curcmdar)
+ mx28_reg_32(hw_apbh_ch12_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch12_cmd)
+ mx28_reg_32(hw_apbh_ch12_bar)
+ mx28_reg_32(hw_apbh_ch12_sema)
+ mx28_reg_32(hw_apbh_ch12_debug1)
+ mx28_reg_32(hw_apbh_ch12_debug2)
+ mx28_reg_32(hw_apbh_ch13_curcmdar)
+ mx28_reg_32(hw_apbh_ch13_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch13_cmd)
+ mx28_reg_32(hw_apbh_ch13_bar)
+ mx28_reg_32(hw_apbh_ch13_sema)
+ mx28_reg_32(hw_apbh_ch13_debug1)
+ mx28_reg_32(hw_apbh_ch13_debug2)
+ mx28_reg_32(hw_apbh_ch14_curcmdar)
+ mx28_reg_32(hw_apbh_ch14_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch14_cmd)
+ mx28_reg_32(hw_apbh_ch14_bar)
+ mx28_reg_32(hw_apbh_ch14_sema)
+ mx28_reg_32(hw_apbh_ch14_debug1)
+ mx28_reg_32(hw_apbh_ch14_debug2)
+ mx28_reg_32(hw_apbh_ch15_curcmdar)
+ mx28_reg_32(hw_apbh_ch15_nxtcmdar)
+ mx28_reg_32(hw_apbh_ch15_cmd)
+ mx28_reg_32(hw_apbh_ch15_bar)
+ mx28_reg_32(hw_apbh_ch15_sema)
+ mx28_reg_32(hw_apbh_ch15_debug1)
+ mx28_reg_32(hw_apbh_ch15_debug2)
};
};
- mx28_reg(hw_apbh_version)
+ mx28_reg_32(hw_apbh_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-bch.h b/arch/arm/include/asm/arch-mx28/regs-bch.h
index cac0470..9243bdd 100644
--- a/arch/arm/include/asm/arch-mx28/regs-bch.h
+++ b/arch/arm/include/asm/arch-mx28/regs-bch.h
@@ -30,30 +30,30 @@
#ifndef __ASSEMBLY__
struct mx28_bch_regs {
- mx28_reg(hw_bch_ctrl)
- mx28_reg(hw_bch_status0)
- mx28_reg(hw_bch_mode)
- mx28_reg(hw_bch_encodeptr)
- mx28_reg(hw_bch_dataptr)
- mx28_reg(hw_bch_metaptr)
+ mx28_reg_32(hw_bch_ctrl)
+ mx28_reg_32(hw_bch_status0)
+ mx28_reg_32(hw_bch_mode)
+ mx28_reg_32(hw_bch_encodeptr)
+ mx28_reg_32(hw_bch_dataptr)
+ mx28_reg_32(hw_bch_metaptr)
uint32_t reserved[4];
- mx28_reg(hw_bch_layoutselect)
- mx28_reg(hw_bch_flash0layout0)
- mx28_reg(hw_bch_flash0layout1)
- mx28_reg(hw_bch_flash1layout0)
- mx28_reg(hw_bch_flash1layout1)
- mx28_reg(hw_bch_flash2layout0)
- mx28_reg(hw_bch_flash2layout1)
- mx28_reg(hw_bch_flash3layout0)
- mx28_reg(hw_bch_flash3layout1)
- mx28_reg(hw_bch_dbgkesread)
- mx28_reg(hw_bch_dbgcsferead)
- mx28_reg(hw_bch_dbgsyndegread)
- mx28_reg(hw_bch_dbgahbmread)
- mx28_reg(hw_bch_blockname)
- mx28_reg(hw_bch_version)
+ mx28_reg_32(hw_bch_layoutselect)
+ mx28_reg_32(hw_bch_flash0layout0)
+ mx28_reg_32(hw_bch_flash0layout1)
+ mx28_reg_32(hw_bch_flash1layout0)
+ mx28_reg_32(hw_bch_flash1layout1)
+ mx28_reg_32(hw_bch_flash2layout0)
+ mx28_reg_32(hw_bch_flash2layout1)
+ mx28_reg_32(hw_bch_flash3layout0)
+ mx28_reg_32(hw_bch_flash3layout1)
+ mx28_reg_32(hw_bch_dbgkesread)
+ mx28_reg_32(hw_bch_dbgcsferead)
+ mx28_reg_32(hw_bch_dbgsyndegread)
+ mx28_reg_32(hw_bch_dbgahbmread)
+ mx28_reg_32(hw_bch_blockname)
+ mx28_reg_32(hw_bch_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-clkctrl.h b/arch/arm/include/asm/arch-mx28/regs-clkctrl.h
index 93d0397..8e666ee 100644
--- a/arch/arm/include/asm/arch-mx28/regs-clkctrl.h
+++ b/arch/arm/include/asm/arch-mx28/regs-clkctrl.h
@@ -30,38 +30,38 @@
#ifndef __ASSEMBLY__
struct mx28_clkctrl_regs {
- mx28_reg(hw_clkctrl_pll0ctrl0) /* 0x00 */
- mx28_reg(hw_clkctrl_pll0ctrl1) /* 0x10 */
- mx28_reg(hw_clkctrl_pll1ctrl0) /* 0x20 */
- mx28_reg(hw_clkctrl_pll1ctrl1) /* 0x30 */
- mx28_reg(hw_clkctrl_pll2ctrl0) /* 0x40 */
- mx28_reg(hw_clkctrl_cpu) /* 0x50 */
- mx28_reg(hw_clkctrl_hbus) /* 0x60 */
- mx28_reg(hw_clkctrl_xbus) /* 0x70 */
- mx28_reg(hw_clkctrl_xtal) /* 0x80 */
- mx28_reg(hw_clkctrl_ssp0) /* 0x90 */
- mx28_reg(hw_clkctrl_ssp1) /* 0xa0 */
- mx28_reg(hw_clkctrl_ssp2) /* 0xb0 */
- mx28_reg(hw_clkctrl_ssp3) /* 0xc0 */
- mx28_reg(hw_clkctrl_gpmi) /* 0xd0 */
- mx28_reg(hw_clkctrl_spdif) /* 0xe0 */
- mx28_reg(hw_clkctrl_emi) /* 0xf0 */
- mx28_reg(hw_clkctrl_saif0) /* 0x100 */
- mx28_reg(hw_clkctrl_saif1) /* 0x110 */
- mx28_reg(hw_clkctrl_lcdif) /* 0x120 */
- mx28_reg(hw_clkctrl_etm) /* 0x130 */
- mx28_reg(hw_clkctrl_enet) /* 0x140 */
- mx28_reg(hw_clkctrl_hsadc) /* 0x150 */
- mx28_reg(hw_clkctrl_flexcan) /* 0x160 */
+ mx28_reg_32(hw_clkctrl_pll0ctrl0) /* 0x00 */
+ mx28_reg_32(hw_clkctrl_pll0ctrl1) /* 0x10 */
+ mx28_reg_32(hw_clkctrl_pll1ctrl0) /* 0x20 */
+ mx28_reg_32(hw_clkctrl_pll1ctrl1) /* 0x30 */
+ mx28_reg_32(hw_clkctrl_pll2ctrl0) /* 0x40 */
+ mx28_reg_32(hw_clkctrl_cpu) /* 0x50 */
+ mx28_reg_32(hw_clkctrl_hbus) /* 0x60 */
+ mx28_reg_32(hw_clkctrl_xbus) /* 0x70 */
+ mx28_reg_32(hw_clkctrl_xtal) /* 0x80 */
+ mx28_reg_32(hw_clkctrl_ssp0) /* 0x90 */
+ mx28_reg_32(hw_clkctrl_ssp1) /* 0xa0 */
+ mx28_reg_32(hw_clkctrl_ssp2) /* 0xb0 */
+ mx28_reg_32(hw_clkctrl_ssp3) /* 0xc0 */
+ mx28_reg_32(hw_clkctrl_gpmi) /* 0xd0 */
+ mx28_reg_32(hw_clkctrl_spdif) /* 0xe0 */
+ mx28_reg_32(hw_clkctrl_emi) /* 0xf0 */
+ mx28_reg_32(hw_clkctrl_saif0) /* 0x100 */
+ mx28_reg_32(hw_clkctrl_saif1) /* 0x110 */
+ mx28_reg_32(hw_clkctrl_lcdif) /* 0x120 */
+ mx28_reg_32(hw_clkctrl_etm) /* 0x130 */
+ mx28_reg_32(hw_clkctrl_enet) /* 0x140 */
+ mx28_reg_32(hw_clkctrl_hsadc) /* 0x150 */
+ mx28_reg_32(hw_clkctrl_flexcan) /* 0x160 */
uint32_t reserved[16];
- mx28_reg(hw_clkctrl_frac0) /* 0x1b0 */
- mx28_reg(hw_clkctrl_frac1) /* 0x1c0 */
- mx28_reg(hw_clkctrl_clkseq) /* 0x1d0 */
- mx28_reg(hw_clkctrl_reset) /* 0x1e0 */
- mx28_reg(hw_clkctrl_status) /* 0x1f0 */
- mx28_reg(hw_clkctrl_version) /* 0x200 */
+ mx28_reg_32(hw_clkctrl_frac0) /* 0x1b0 */
+ mx28_reg_32(hw_clkctrl_frac1) /* 0x1c0 */
+ mx28_reg_32(hw_clkctrl_clkseq) /* 0x1d0 */
+ mx28_reg_32(hw_clkctrl_reset) /* 0x1e0 */
+ mx28_reg_32(hw_clkctrl_status) /* 0x1f0 */
+ mx28_reg_32(hw_clkctrl_version) /* 0x200 */
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-common.h b/arch/arm/include/asm/arch-mx28/regs-common.h
index efe975b..75cc9a6 100644
--- a/arch/arm/include/asm/arch-mx28/regs-common.h
+++ b/arch/arm/include/asm/arch-mx28/regs-common.h
@@ -47,20 +47,20 @@
*
*/
-#define __mx28_reg(name) \
+#define __mx28_reg_32(name) \
uint32_t name; \
uint32_t name##_set; \
uint32_t name##_clr; \
uint32_t name##_tog;
-struct mx28_register {
- __mx28_reg(reg)
+struct mx28_register_32 {
+ __mx28_reg_32(reg)
};
-#define mx28_reg(name) \
+#define mx28_reg_32(name) \
union { \
- struct { __mx28_reg(name) }; \
- struct mx28_register name##_reg; \
+ struct { __mx28_reg_32(name) }; \
+ struct mx28_register_32 name##_reg; \
};
#endif /* __MX28_REGS_COMMON_H__ */
diff --git a/arch/arm/include/asm/arch-mx28/regs-gpmi.h b/arch/arm/include/asm/arch-mx28/regs-gpmi.h
index 0096793..1b487f4 100644
--- a/arch/arm/include/asm/arch-mx28/regs-gpmi.h
+++ b/arch/arm/include/asm/arch-mx28/regs-gpmi.h
@@ -30,22 +30,22 @@
#ifndef __ASSEMBLY__
struct mx28_gpmi_regs {
- mx28_reg(hw_gpmi_ctrl0)
- mx28_reg(hw_gpmi_compare)
- mx28_reg(hw_gpmi_eccctrl)
- mx28_reg(hw_gpmi_ecccount)
- mx28_reg(hw_gpmi_payload)
- mx28_reg(hw_gpmi_auxiliary)
- mx28_reg(hw_gpmi_ctrl1)
- mx28_reg(hw_gpmi_timing0)
- mx28_reg(hw_gpmi_timing1)
+ mx28_reg_32(hw_gpmi_ctrl0)
+ mx28_reg_32(hw_gpmi_compare)
+ mx28_reg_32(hw_gpmi_eccctrl)
+ mx28_reg_32(hw_gpmi_ecccount)
+ mx28_reg_32(hw_gpmi_payload)
+ mx28_reg_32(hw_gpmi_auxiliary)
+ mx28_reg_32(hw_gpmi_ctrl1)
+ mx28_reg_32(hw_gpmi_timing0)
+ mx28_reg_32(hw_gpmi_timing1)
uint32_t reserved[4];
- mx28_reg(hw_gpmi_data)
- mx28_reg(hw_gpmi_stat)
- mx28_reg(hw_gpmi_debug)
- mx28_reg(hw_gpmi_version)
+ mx28_reg_32(hw_gpmi_data)
+ mx28_reg_32(hw_gpmi_stat)
+ mx28_reg_32(hw_gpmi_debug)
+ mx28_reg_32(hw_gpmi_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-i2c.h b/arch/arm/include/asm/arch-mx28/regs-i2c.h
index 30e0ed7..2e2e814 100644
--- a/arch/arm/include/asm/arch-mx28/regs-i2c.h
+++ b/arch/arm/include/asm/arch-mx28/regs-i2c.h
@@ -27,20 +27,20 @@
#ifndef __ASSEMBLY__
struct mx28_i2c_regs {
- mx28_reg(hw_i2c_ctrl0)
- mx28_reg(hw_i2c_timing0)
- mx28_reg(hw_i2c_timing1)
- mx28_reg(hw_i2c_timing2)
- mx28_reg(hw_i2c_ctrl1)
- mx28_reg(hw_i2c_stat)
- mx28_reg(hw_i2c_queuectrl)
- mx28_reg(hw_i2c_queuestat)
- mx28_reg(hw_i2c_queuecmd)
- mx28_reg(hw_i2c_queuedata)
- mx28_reg(hw_i2c_data)
- mx28_reg(hw_i2c_debug0)
- mx28_reg(hw_i2c_debug1)
- mx28_reg(hw_i2c_version)
+ mx28_reg_32(hw_i2c_ctrl0)
+ mx28_reg_32(hw_i2c_timing0)
+ mx28_reg_32(hw_i2c_timing1)
+ mx28_reg_32(hw_i2c_timing2)
+ mx28_reg_32(hw_i2c_ctrl1)
+ mx28_reg_32(hw_i2c_stat)
+ mx28_reg_32(hw_i2c_queuectrl)
+ mx28_reg_32(hw_i2c_queuestat)
+ mx28_reg_32(hw_i2c_queuecmd)
+ mx28_reg_32(hw_i2c_queuedata)
+ mx28_reg_32(hw_i2c_data)
+ mx28_reg_32(hw_i2c_debug0)
+ mx28_reg_32(hw_i2c_debug1)
+ mx28_reg_32(hw_i2c_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-ocotp.h b/arch/arm/include/asm/arch-mx28/regs-ocotp.h
index ea2fd7b..2738035 100644
--- a/arch/arm/include/asm/arch-mx28/regs-ocotp.h
+++ b/arch/arm/include/asm/arch-mx28/regs-ocotp.h
@@ -30,49 +30,49 @@
#ifndef __ASSEMBLY__
struct mx28_ocotp_regs {
- mx28_reg(hw_ocotp_ctrl) /* 0x0 */
- mx28_reg(hw_ocotp_data) /* 0x10 */
- mx28_reg(hw_ocotp_cust0) /* 0x20 */
- mx28_reg(hw_ocotp_cust1) /* 0x30 */
- mx28_reg(hw_ocotp_cust2) /* 0x40 */
- mx28_reg(hw_ocotp_cust3) /* 0x50 */
- mx28_reg(hw_ocotp_crypto0) /* 0x60 */
- mx28_reg(hw_ocotp_crypto1) /* 0x70 */
- mx28_reg(hw_ocotp_crypto2) /* 0x80 */
- mx28_reg(hw_ocotp_crypto3) /* 0x90 */
- mx28_reg(hw_ocotp_hwcap0) /* 0xa0 */
- mx28_reg(hw_ocotp_hwcap1) /* 0xb0 */
- mx28_reg(hw_ocotp_hwcap2) /* 0xc0 */
- mx28_reg(hw_ocotp_hwcap3) /* 0xd0 */
- mx28_reg(hw_ocotp_hwcap4) /* 0xe0 */
- mx28_reg(hw_ocotp_hwcap5) /* 0xf0 */
- mx28_reg(hw_ocotp_swcap) /* 0x100 */
- mx28_reg(hw_ocotp_custcap) /* 0x110 */
- mx28_reg(hw_ocotp_lock) /* 0x120 */
- mx28_reg(hw_ocotp_ops0) /* 0x130 */
- mx28_reg(hw_ocotp_ops1) /* 0x140 */
- mx28_reg(hw_ocotp_ops2) /* 0x150 */
- mx28_reg(hw_ocotp_ops3) /* 0x160 */
- mx28_reg(hw_ocotp_un0) /* 0x170 */
- mx28_reg(hw_ocotp_un1) /* 0x180 */
- mx28_reg(hw_ocotp_un2) /* 0x190 */
- mx28_reg(hw_ocotp_rom0) /* 0x1a0 */
- mx28_reg(hw_ocotp_rom1) /* 0x1b0 */
- mx28_reg(hw_ocotp_rom2) /* 0x1c0 */
- mx28_reg(hw_ocotp_rom3) /* 0x1d0 */
- mx28_reg(hw_ocotp_rom4) /* 0x1e0 */
- mx28_reg(hw_ocotp_rom5) /* 0x1f0 */
- mx28_reg(hw_ocotp_rom6) /* 0x200 */
- mx28_reg(hw_ocotp_rom7) /* 0x210 */
- mx28_reg(hw_ocotp_srk0) /* 0x220 */
- mx28_reg(hw_ocotp_srk1) /* 0x230 */
- mx28_reg(hw_ocotp_srk2) /* 0x240 */
- mx28_reg(hw_ocotp_srk3) /* 0x250 */
- mx28_reg(hw_ocotp_srk4) /* 0x260 */
- mx28_reg(hw_ocotp_srk5) /* 0x270 */
- mx28_reg(hw_ocotp_srk6) /* 0x280 */
- mx28_reg(hw_ocotp_srk7) /* 0x290 */
- mx28_reg(hw_ocotp_version) /* 0x2a0 */
+ mx28_reg_32(hw_ocotp_ctrl) /* 0x0 */
+ mx28_reg_32(hw_ocotp_data) /* 0x10 */
+ mx28_reg_32(hw_ocotp_cust0) /* 0x20 */
+ mx28_reg_32(hw_ocotp_cust1) /* 0x30 */
+ mx28_reg_32(hw_ocotp_cust2) /* 0x40 */
+ mx28_reg_32(hw_ocotp_cust3) /* 0x50 */
+ mx28_reg_32(hw_ocotp_crypto0) /* 0x60 */
+ mx28_reg_32(hw_ocotp_crypto1) /* 0x70 */
+ mx28_reg_32(hw_ocotp_crypto2) /* 0x80 */
+ mx28_reg_32(hw_ocotp_crypto3) /* 0x90 */
+ mx28_reg_32(hw_ocotp_hwcap0) /* 0xa0 */
+ mx28_reg_32(hw_ocotp_hwcap1) /* 0xb0 */
+ mx28_reg_32(hw_ocotp_hwcap2) /* 0xc0 */
+ mx28_reg_32(hw_ocotp_hwcap3) /* 0xd0 */
+ mx28_reg_32(hw_ocotp_hwcap4) /* 0xe0 */
+ mx28_reg_32(hw_ocotp_hwcap5) /* 0xf0 */
+ mx28_reg_32(hw_ocotp_swcap) /* 0x100 */
+ mx28_reg_32(hw_ocotp_custcap) /* 0x110 */
+ mx28_reg_32(hw_ocotp_lock) /* 0x120 */
+ mx28_reg_32(hw_ocotp_ops0) /* 0x130 */
+ mx28_reg_32(hw_ocotp_ops1) /* 0x140 */
+ mx28_reg_32(hw_ocotp_ops2) /* 0x150 */
+ mx28_reg_32(hw_ocotp_ops3) /* 0x160 */
+ mx28_reg_32(hw_ocotp_un0) /* 0x170 */
+ mx28_reg_32(hw_ocotp_un1) /* 0x180 */
+ mx28_reg_32(hw_ocotp_un2) /* 0x190 */
+ mx28_reg_32(hw_ocotp_rom0) /* 0x1a0 */
+ mx28_reg_32(hw_ocotp_rom1) /* 0x1b0 */
+ mx28_reg_32(hw_ocotp_rom2) /* 0x1c0 */
+ mx28_reg_32(hw_ocotp_rom3) /* 0x1d0 */
+ mx28_reg_32(hw_ocotp_rom4) /* 0x1e0 */
+ mx28_reg_32(hw_ocotp_rom5) /* 0x1f0 */
+ mx28_reg_32(hw_ocotp_rom6) /* 0x200 */
+ mx28_reg_32(hw_ocotp_rom7) /* 0x210 */
+ mx28_reg_32(hw_ocotp_srk0) /* 0x220 */
+ mx28_reg_32(hw_ocotp_srk1) /* 0x230 */
+ mx28_reg_32(hw_ocotp_srk2) /* 0x240 */
+ mx28_reg_32(hw_ocotp_srk3) /* 0x250 */
+ mx28_reg_32(hw_ocotp_srk4) /* 0x260 */
+ mx28_reg_32(hw_ocotp_srk5) /* 0x270 */
+ mx28_reg_32(hw_ocotp_srk6) /* 0x280 */
+ mx28_reg_32(hw_ocotp_srk7) /* 0x290 */
+ mx28_reg_32(hw_ocotp_version) /* 0x2a0 */
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-pinctrl.h b/arch/arm/include/asm/arch-mx28/regs-pinctrl.h
index 73739ca..80dcdf6 100644
--- a/arch/arm/include/asm/arch-mx28/regs-pinctrl.h
+++ b/arch/arm/include/asm/arch-mx28/regs-pinctrl.h
@@ -30,129 +30,129 @@
#ifndef __ASSEMBLY__
struct mx28_pinctrl_regs {
- mx28_reg(hw_pinctrl_ctrl) /* 0x0 */
+ mx28_reg_32(hw_pinctrl_ctrl) /* 0x0 */
uint32_t reserved1[60];
- mx28_reg(hw_pinctrl_muxsel0) /* 0x100 */
- mx28_reg(hw_pinctrl_muxsel1) /* 0x110 */
- mx28_reg(hw_pinctrl_muxsel2) /* 0x120 */
- mx28_reg(hw_pinctrl_muxsel3) /* 0x130 */
- mx28_reg(hw_pinctrl_muxsel4) /* 0x140 */
- mx28_reg(hw_pinctrl_muxsel5) /* 0x150 */
- mx28_reg(hw_pinctrl_muxsel6) /* 0x160 */
- mx28_reg(hw_pinctrl_muxsel7) /* 0x170 */
- mx28_reg(hw_pinctrl_muxsel8) /* 0x180 */
- mx28_reg(hw_pinctrl_muxsel9) /* 0x190 */
- mx28_reg(hw_pinctrl_muxsel10) /* 0x1a0 */
- mx28_reg(hw_pinctrl_muxsel11) /* 0x1b0 */
- mx28_reg(hw_pinctrl_muxsel12) /* 0x1c0 */
- mx28_reg(hw_pinctrl_muxsel13) /* 0x1d0 */
+ mx28_reg_32(hw_pinctrl_muxsel0) /* 0x100 */
+ mx28_reg_32(hw_pinctrl_muxsel1) /* 0x110 */
+ mx28_reg_32(hw_pinctrl_muxsel2) /* 0x120 */
+ mx28_reg_32(hw_pinctrl_muxsel3) /* 0x130 */
+ mx28_reg_32(hw_pinctrl_muxsel4) /* 0x140 */
+ mx28_reg_32(hw_pinctrl_muxsel5) /* 0x150 */
+ mx28_reg_32(hw_pinctrl_muxsel6) /* 0x160 */
+ mx28_reg_32(hw_pinctrl_muxsel7) /* 0x170 */
+ mx28_reg_32(hw_pinctrl_muxsel8) /* 0x180 */
+ mx28_reg_32(hw_pinctrl_muxsel9) /* 0x190 */
+ mx28_reg_32(hw_pinctrl_muxsel10) /* 0x1a0 */
+ mx28_reg_32(hw_pinctrl_muxsel11) /* 0x1b0 */
+ mx28_reg_32(hw_pinctrl_muxsel12) /* 0x1c0 */
+ mx28_reg_32(hw_pinctrl_muxsel13) /* 0x1d0 */
uint32_t reserved2[72];
- mx28_reg(hw_pinctrl_drive0) /* 0x300 */
- mx28_reg(hw_pinctrl_drive1) /* 0x310 */
- mx28_reg(hw_pinctrl_drive2) /* 0x320 */
- mx28_reg(hw_pinctrl_drive3) /* 0x330 */
- mx28_reg(hw_pinctrl_drive4) /* 0x340 */
- mx28_reg(hw_pinctrl_drive5) /* 0x350 */
- mx28_reg(hw_pinctrl_drive6) /* 0x360 */
- mx28_reg(hw_pinctrl_drive7) /* 0x370 */
- mx28_reg(hw_pinctrl_drive8) /* 0x380 */
- mx28_reg(hw_pinctrl_drive9) /* 0x390 */
- mx28_reg(hw_pinctrl_drive10) /* 0x3a0 */
- mx28_reg(hw_pinctrl_drive11) /* 0x3b0 */
- mx28_reg(hw_pinctrl_drive12) /* 0x3c0 */
- mx28_reg(hw_pinctrl_drive13) /* 0x3d0 */
- mx28_reg(hw_pinctrl_drive14) /* 0x3e0 */
- mx28_reg(hw_pinctrl_drive15) /* 0x3f0 */
- mx28_reg(hw_pinctrl_drive16) /* 0x400 */
- mx28_reg(hw_pinctrl_drive17) /* 0x410 */
- mx28_reg(hw_pinctrl_drive18) /* 0x420 */
- mx28_reg(hw_pinctrl_drive19) /* 0x430 */
+ mx28_reg_32(hw_pinctrl_drive0) /* 0x300 */
+ mx28_reg_32(hw_pinctrl_drive1) /* 0x310 */
+ mx28_reg_32(hw_pinctrl_drive2) /* 0x320 */
+ mx28_reg_32(hw_pinctrl_drive3) /* 0x330 */
+ mx28_reg_32(hw_pinctrl_drive4) /* 0x340 */
+ mx28_reg_32(hw_pinctrl_drive5) /* 0x350 */
+ mx28_reg_32(hw_pinctrl_drive6) /* 0x360 */
+ mx28_reg_32(hw_pinctrl_drive7) /* 0x370 */
+ mx28_reg_32(hw_pinctrl_drive8) /* 0x380 */
+ mx28_reg_32(hw_pinctrl_drive9) /* 0x390 */
+ mx28_reg_32(hw_pinctrl_drive10) /* 0x3a0 */
+ mx28_reg_32(hw_pinctrl_drive11) /* 0x3b0 */
+ mx28_reg_32(hw_pinctrl_drive12) /* 0x3c0 */
+ mx28_reg_32(hw_pinctrl_drive13) /* 0x3d0 */
+ mx28_reg_32(hw_pinctrl_drive14) /* 0x3e0 */
+ mx28_reg_32(hw_pinctrl_drive15) /* 0x3f0 */
+ mx28_reg_32(hw_pinctrl_drive16) /* 0x400 */
+ mx28_reg_32(hw_pinctrl_drive17) /* 0x410 */
+ mx28_reg_32(hw_pinctrl_drive18) /* 0x420 */
+ mx28_reg_32(hw_pinctrl_drive19) /* 0x430 */
uint32_t reserved3[112];
- mx28_reg(hw_pinctrl_pull0) /* 0x600 */
- mx28_reg(hw_pinctrl_pull1) /* 0x610 */
- mx28_reg(hw_pinctrl_pull2) /* 0x620 */
- mx28_reg(hw_pinctrl_pull3) /* 0x630 */
- mx28_reg(hw_pinctrl_pull4) /* 0x640 */
- mx28_reg(hw_pinctrl_pull5) /* 0x650 */
- mx28_reg(hw_pinctrl_pull6) /* 0x660 */
+ mx28_reg_32(hw_pinctrl_pull0) /* 0x600 */
+ mx28_reg_32(hw_pinctrl_pull1) /* 0x610 */
+ mx28_reg_32(hw_pinctrl_pull2) /* 0x620 */
+ mx28_reg_32(hw_pinctrl_pull3) /* 0x630 */
+ mx28_reg_32(hw_pinctrl_pull4) /* 0x640 */
+ mx28_reg_32(hw_pinctrl_pull5) /* 0x650 */
+ mx28_reg_32(hw_pinctrl_pull6) /* 0x660 */
uint32_t reserved4[36];
- mx28_reg(hw_pinctrl_dout0) /* 0x700 */
- mx28_reg(hw_pinctrl_dout1) /* 0x710 */
- mx28_reg(hw_pinctrl_dout2) /* 0x720 */
- mx28_reg(hw_pinctrl_dout3) /* 0x730 */
- mx28_reg(hw_pinctrl_dout4) /* 0x740 */
+ mx28_reg_32(hw_pinctrl_dout0) /* 0x700 */
+ mx28_reg_32(hw_pinctrl_dout1) /* 0x710 */
+ mx28_reg_32(hw_pinctrl_dout2) /* 0x720 */
+ mx28_reg_32(hw_pinctrl_dout3) /* 0x730 */
+ mx28_reg_32(hw_pinctrl_dout4) /* 0x740 */
uint32_t reserved5[108];
- mx28_reg(hw_pinctrl_din0) /* 0x900 */
- mx28_reg(hw_pinctrl_din1) /* 0x910 */
- mx28_reg(hw_pinctrl_din2) /* 0x920 */
- mx28_reg(hw_pinctrl_din3) /* 0x930 */
- mx28_reg(hw_pinctrl_din4) /* 0x940 */
+ mx28_reg_32(hw_pinctrl_din0) /* 0x900 */
+ mx28_reg_32(hw_pinctrl_din1) /* 0x910 */
+ mx28_reg_32(hw_pinctrl_din2) /* 0x920 */
+ mx28_reg_32(hw_pinctrl_din3) /* 0x930 */
+ mx28_reg_32(hw_pinctrl_din4) /* 0x940 */
uint32_t reserved6[108];
- mx28_reg(hw_pinctrl_doe0) /* 0xb00 */
- mx28_reg(hw_pinctrl_doe1) /* 0xb10 */
- mx28_reg(hw_pinctrl_doe2) /* 0xb20 */
- mx28_reg(hw_pinctrl_doe3) /* 0xb30 */
- mx28_reg(hw_pinctrl_doe4) /* 0xb40 */
+ mx28_reg_32(hw_pinctrl_doe0) /* 0xb00 */
+ mx28_reg_32(hw_pinctrl_doe1) /* 0xb10 */
+ mx28_reg_32(hw_pinctrl_doe2) /* 0xb20 */
+ mx28_reg_32(hw_pinctrl_doe3) /* 0xb30 */
+ mx28_reg_32(hw_pinctrl_doe4) /* 0xb40 */
uint32_t reserved7[300];
- mx28_reg(hw_pinctrl_pin2irq0) /* 0x1000 */
- mx28_reg(hw_pinctrl_pin2irq1) /* 0x1010 */
- mx28_reg(hw_pinctrl_pin2irq2) /* 0x1020 */
- mx28_reg(hw_pinctrl_pin2irq3) /* 0x1030 */
- mx28_reg(hw_pinctrl_pin2irq4) /* 0x1040 */
+ mx28_reg_32(hw_pinctrl_pin2irq0) /* 0x1000 */
+ mx28_reg_32(hw_pinctrl_pin2irq1) /* 0x1010 */
+ mx28_reg_32(hw_pinctrl_pin2irq2) /* 0x1020 */
+ mx28_reg_32(hw_pinctrl_pin2irq3) /* 0x1030 */
+ mx28_reg_32(hw_pinctrl_pin2irq4) /* 0x1040 */
uint32_t reserved8[44];
- mx28_reg(hw_pinctrl_irqen0) /* 0x1100 */
- mx28_reg(hw_pinctrl_irqen1) /* 0x1110 */
- mx28_reg(hw_pinctrl_irqen2) /* 0x1120 */
- mx28_reg(hw_pinctrl_irqen3) /* 0x1130 */
- mx28_reg(hw_pinctrl_irqen4) /* 0x1140 */
+ mx28_reg_32(hw_pinctrl_irqen0) /* 0x1100 */
+ mx28_reg_32(hw_pinctrl_irqen1) /* 0x1110 */
+ mx28_reg_32(hw_pinctrl_irqen2) /* 0x1120 */
+ mx28_reg_32(hw_pinctrl_irqen3) /* 0x1130 */
+ mx28_reg_32(hw_pinctrl_irqen4) /* 0x1140 */
uint32_t reserved9[44];
- mx28_reg(hw_pinctrl_irqlevel0) /* 0x1200 */
- mx28_reg(hw_pinctrl_irqlevel1) /* 0x1210 */
- mx28_reg(hw_pinctrl_irqlevel2) /* 0x1220 */
- mx28_reg(hw_pinctrl_irqlevel3) /* 0x1230 */
- mx28_reg(hw_pinctrl_irqlevel4) /* 0x1240 */
+ mx28_reg_32(hw_pinctrl_irqlevel0) /* 0x1200 */
+ mx28_reg_32(hw_pinctrl_irqlevel1) /* 0x1210 */
+ mx28_reg_32(hw_pinctrl_irqlevel2) /* 0x1220 */
+ mx28_reg_32(hw_pinctrl_irqlevel3) /* 0x1230 */
+ mx28_reg_32(hw_pinctrl_irqlevel4) /* 0x1240 */
uint32_t reserved10[44];
- mx28_reg(hw_pinctrl_irqpol0) /* 0x1300 */
- mx28_reg(hw_pinctrl_irqpol1) /* 0x1310 */
- mx28_reg(hw_pinctrl_irqpol2) /* 0x1320 */
- mx28_reg(hw_pinctrl_irqpol3) /* 0x1330 */
- mx28_reg(hw_pinctrl_irqpol4) /* 0x1340 */
+ mx28_reg_32(hw_pinctrl_irqpol0) /* 0x1300 */
+ mx28_reg_32(hw_pinctrl_irqpol1) /* 0x1310 */
+ mx28_reg_32(hw_pinctrl_irqpol2) /* 0x1320 */
+ mx28_reg_32(hw_pinctrl_irqpol3) /* 0x1330 */
+ mx28_reg_32(hw_pinctrl_irqpol4) /* 0x1340 */
uint32_t reserved11[44];
- mx28_reg(hw_pinctrl_irqstat0) /* 0x1400 */
- mx28_reg(hw_pinctrl_irqstat1) /* 0x1410 */
- mx28_reg(hw_pinctrl_irqstat2) /* 0x1420 */
- mx28_reg(hw_pinctrl_irqstat3) /* 0x1430 */
- mx28_reg(hw_pinctrl_irqstat4) /* 0x1440 */
+ mx28_reg_32(hw_pinctrl_irqstat0) /* 0x1400 */
+ mx28_reg_32(hw_pinctrl_irqstat1) /* 0x1410 */
+ mx28_reg_32(hw_pinctrl_irqstat2) /* 0x1420 */
+ mx28_reg_32(hw_pinctrl_irqstat3) /* 0x1430 */
+ mx28_reg_32(hw_pinctrl_irqstat4) /* 0x1440 */
uint32_t reserved12[380];
- mx28_reg(hw_pinctrl_emi_odt_ctrl) /* 0x1a40 */
+ mx28_reg_32(hw_pinctrl_emi_odt_ctrl) /* 0x1a40 */
uint32_t reserved13[76];
- mx28_reg(hw_pinctrl_emi_ds_ctrl) /* 0x1b80 */
+ mx28_reg_32(hw_pinctrl_emi_ds_ctrl) /* 0x1b80 */
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-power.h b/arch/arm/include/asm/arch-mx28/regs-power.h
index 9da63ad..8eadc6d 100644
--- a/arch/arm/include/asm/arch-mx28/regs-power.h
+++ b/arch/arm/include/asm/arch-mx28/regs-power.h
@@ -26,10 +26,10 @@
#ifndef __ASSEMBLY__
struct mx28_power_regs {
- mx28_reg(hw_power_ctrl)
- mx28_reg(hw_power_5vctrl)
- mx28_reg(hw_power_minpwr)
- mx28_reg(hw_power_charge)
+ mx28_reg_32(hw_power_ctrl)
+ mx28_reg_32(hw_power_5vctrl)
+ mx28_reg_32(hw_power_minpwr)
+ mx28_reg_32(hw_power_charge)
uint32_t hw_power_vdddctrl;
uint32_t reserved_vddd[3];
uint32_t hw_power_vddactrl;
@@ -44,23 +44,23 @@ struct mx28_power_regs {
uint32_t reserved_misc[3];
uint32_t hw_power_dclimits;
uint32_t reserved_dclimits[3];
- mx28_reg(hw_power_loopctrl)
+ mx28_reg_32(hw_power_loopctrl)
uint32_t hw_power_sts;
uint32_t reserved_sts[3];
- mx28_reg(hw_power_speed)
+ mx28_reg_32(hw_power_speed)
uint32_t hw_power_battmonitor;
uint32_t reserved_battmonitor[3];
uint32_t reserved[4];
- mx28_reg(hw_power_reset)
- mx28_reg(hw_power_debug)
- mx28_reg(hw_power_thermal)
- mx28_reg(hw_power_usb1ctrl)
- mx28_reg(hw_power_special)
- mx28_reg(hw_power_version)
- mx28_reg(hw_power_anaclkctrl)
- mx28_reg(hw_power_refctrl)
+ mx28_reg_32(hw_power_reset)
+ mx28_reg_32(hw_power_debug)
+ mx28_reg_32(hw_power_thermal)
+ mx28_reg_32(hw_power_usb1ctrl)
+ mx28_reg_32(hw_power_special)
+ mx28_reg_32(hw_power_version)
+ mx28_reg_32(hw_power_anaclkctrl)
+ mx28_reg_32(hw_power_refctrl)
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-rtc.h b/arch/arm/include/asm/arch-mx28/regs-rtc.h
index fe2fda9..e605a03 100644
--- a/arch/arm/include/asm/arch-mx28/regs-rtc.h
+++ b/arch/arm/include/asm/arch-mx28/regs-rtc.h
@@ -27,20 +27,20 @@
#ifndef __ASSEMBLY__
struct mx28_rtc_regs {
- mx28_reg(hw_rtc_ctrl)
- mx28_reg(hw_rtc_stat)
- mx28_reg(hw_rtc_milliseconds)
- mx28_reg(hw_rtc_seconds)
- mx28_reg(hw_rtc_rtc_alarm)
- mx28_reg(hw_rtc_watchdog)
- mx28_reg(hw_rtc_persistent0)
- mx28_reg(hw_rtc_persistent1)
- mx28_reg(hw_rtc_persistent2)
- mx28_reg(hw_rtc_persistent3)
- mx28_reg(hw_rtc_persistent4)
- mx28_reg(hw_rtc_persistent5)
- mx28_reg(hw_rtc_debug)
- mx28_reg(hw_rtc_version)
+ mx28_reg_32(hw_rtc_ctrl)
+ mx28_reg_32(hw_rtc_stat)
+ mx28_reg_32(hw_rtc_milliseconds)
+ mx28_reg_32(hw_rtc_seconds)
+ mx28_reg_32(hw_rtc_rtc_alarm)
+ mx28_reg_32(hw_rtc_watchdog)
+ mx28_reg_32(hw_rtc_persistent0)
+ mx28_reg_32(hw_rtc_persistent1)
+ mx28_reg_32(hw_rtc_persistent2)
+ mx28_reg_32(hw_rtc_persistent3)
+ mx28_reg_32(hw_rtc_persistent4)
+ mx28_reg_32(hw_rtc_persistent5)
+ mx28_reg_32(hw_rtc_debug)
+ mx28_reg_32(hw_rtc_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-ssp.h b/arch/arm/include/asm/arch-mx28/regs-ssp.h
index ab3870c..be71d48 100644
--- a/arch/arm/include/asm/arch-mx28/regs-ssp.h
+++ b/arch/arm/include/asm/arch-mx28/regs-ssp.h
@@ -29,26 +29,26 @@
#ifndef __ASSEMBLY__
struct mx28_ssp_regs {
- mx28_reg(hw_ssp_ctrl0)
- mx28_reg(hw_ssp_cmd0)
- mx28_reg(hw_ssp_cmd1)
- mx28_reg(hw_ssp_xfer_size)
- mx28_reg(hw_ssp_block_size)
- mx28_reg(hw_ssp_compref)
- mx28_reg(hw_ssp_compmask)
- mx28_reg(hw_ssp_timing)
- mx28_reg(hw_ssp_ctrl1)
- mx28_reg(hw_ssp_data)
- mx28_reg(hw_ssp_sdresp0)
- mx28_reg(hw_ssp_sdresp1)
- mx28_reg(hw_ssp_sdresp2)
- mx28_reg(hw_ssp_sdresp3)
- mx28_reg(hw_ssp_ddr_ctrl)
- mx28_reg(hw_ssp_dll_ctrl)
- mx28_reg(hw_ssp_status)
- mx28_reg(hw_ssp_dll_sts)
- mx28_reg(hw_ssp_debug)
- mx28_reg(hw_ssp_version)
+ mx28_reg_32(hw_ssp_ctrl0)
+ mx28_reg_32(hw_ssp_cmd0)
+ mx28_reg_32(hw_ssp_cmd1)
+ mx28_reg_32(hw_ssp_xfer_size)
+ mx28_reg_32(hw_ssp_block_size)
+ mx28_reg_32(hw_ssp_compref)
+ mx28_reg_32(hw_ssp_compmask)
+ mx28_reg_32(hw_ssp_timing)
+ mx28_reg_32(hw_ssp_ctrl1)
+ mx28_reg_32(hw_ssp_data)
+ mx28_reg_32(hw_ssp_sdresp0)
+ mx28_reg_32(hw_ssp_sdresp1)
+ mx28_reg_32(hw_ssp_sdresp2)
+ mx28_reg_32(hw_ssp_sdresp3)
+ mx28_reg_32(hw_ssp_ddr_ctrl)
+ mx28_reg_32(hw_ssp_dll_ctrl)
+ mx28_reg_32(hw_ssp_status)
+ mx28_reg_32(hw_ssp_dll_sts)
+ mx28_reg_32(hw_ssp_debug)
+ mx28_reg_32(hw_ssp_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-timrot.h b/arch/arm/include/asm/arch-mx28/regs-timrot.h
index 1b941cf..3e8dfe7 100644
--- a/arch/arm/include/asm/arch-mx28/regs-timrot.h
+++ b/arch/arm/include/asm/arch-mx28/regs-timrot.h
@@ -29,25 +29,25 @@
#ifndef __ASSEMBLY__
struct mx28_timrot_regs {
- mx28_reg(hw_timrot_rotctrl)
- mx28_reg(hw_timrot_rotcount)
- mx28_reg(hw_timrot_timctrl0)
- mx28_reg(hw_timrot_running_count0)
- mx28_reg(hw_timrot_fixed_count0)
- mx28_reg(hw_timrot_match_count0)
- mx28_reg(hw_timrot_timctrl1)
- mx28_reg(hw_timrot_running_count1)
- mx28_reg(hw_timrot_fixed_count1)
- mx28_reg(hw_timrot_match_count1)
- mx28_reg(hw_timrot_timctrl2)
- mx28_reg(hw_timrot_running_count2)
- mx28_reg(hw_timrot_fixed_count2)
- mx28_reg(hw_timrot_match_count2)
- mx28_reg(hw_timrot_timctrl3)
- mx28_reg(hw_timrot_running_count3)
- mx28_reg(hw_timrot_fixed_count3)
- mx28_reg(hw_timrot_match_count3)
- mx28_reg(hw_timrot_version)
+ mx28_reg_32(hw_timrot_rotctrl)
+ mx28_reg_32(hw_timrot_rotcount)
+ mx28_reg_32(hw_timrot_timctrl0)
+ mx28_reg_32(hw_timrot_running_count0)
+ mx28_reg_32(hw_timrot_fixed_count0)
+ mx28_reg_32(hw_timrot_match_count0)
+ mx28_reg_32(hw_timrot_timctrl1)
+ mx28_reg_32(hw_timrot_running_count1)
+ mx28_reg_32(hw_timrot_fixed_count1)
+ mx28_reg_32(hw_timrot_match_count1)
+ mx28_reg_32(hw_timrot_timctrl2)
+ mx28_reg_32(hw_timrot_running_count2)
+ mx28_reg_32(hw_timrot_fixed_count2)
+ mx28_reg_32(hw_timrot_match_count2)
+ mx28_reg_32(hw_timrot_timctrl3)
+ mx28_reg_32(hw_timrot_running_count3)
+ mx28_reg_32(hw_timrot_fixed_count3)
+ mx28_reg_32(hw_timrot_match_count3)
+ mx28_reg_32(hw_timrot_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mx28/regs-usbphy.h b/arch/arm/include/asm/arch-mx28/regs-usbphy.h
index e823e19..0291d81 100644
--- a/arch/arm/include/asm/arch-mx28/regs-usbphy.h
+++ b/arch/arm/include/asm/arch-mx28/regs-usbphy.h
@@ -24,16 +24,16 @@
#define __REGS_USBPHY_H__
struct mx28_usbphy_regs {
- mx28_reg(hw_usbphy_pwd)
- mx28_reg(hw_usbphy_tx)
- mx28_reg(hw_usbphy_rx)
- mx28_reg(hw_usbphy_ctrl)
- mx28_reg(hw_usbphy_status)
- mx28_reg(hw_usbphy_debug)
- mx28_reg(hw_usbphy_debug0_status)
- mx28_reg(hw_usbphy_debug1)
- mx28_reg(hw_usbphy_version)
- mx28_reg(hw_usbphy_ip)
+ mx28_reg_32(hw_usbphy_pwd)
+ mx28_reg_32(hw_usbphy_tx)
+ mx28_reg_32(hw_usbphy_rx)
+ mx28_reg_32(hw_usbphy_ctrl)
+ mx28_reg_32(hw_usbphy_status)
+ mx28_reg_32(hw_usbphy_debug)
+ mx28_reg_32(hw_usbphy_debug0_status)
+ mx28_reg_32(hw_usbphy_debug1)
+ mx28_reg_32(hw_usbphy_version)
+ mx28_reg_32(hw_usbphy_ip)
};
#define USBPHY_PWD_RXPWDRX (1 << 20)
diff --git a/arch/arm/include/asm/arch-mx28/sys_proto.h b/arch/arm/include/asm/arch-mx28/sys_proto.h
index f101494..15d8de3 100644
--- a/arch/arm/include/asm/arch-mx28/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx28/sys_proto.h
@@ -23,9 +23,13 @@
#ifndef __MX28_H__
#define __MX28_H__
-int mx28_reset_block(struct mx28_register *reg);
-int mx28_wait_mask_set(struct mx28_register *reg, uint32_t mask, int timeout);
-int mx28_wait_mask_clr(struct mx28_register *reg, uint32_t mask, int timeout);
+int mx28_reset_block(struct mx28_register_32 *reg);
+int mx28_wait_mask_set(struct mx28_register_32 *reg,
+ uint32_t mask,
+ int timeout);
+int mx28_wait_mask_clr(struct mx28_register_32 *reg,
+ uint32_t mask,
+ int timeout);
int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int));
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index 0365812..38dbc81 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -73,8 +73,8 @@ int gpio_get_value(unsigned gpio)
{
uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DIN(bank);
- struct mx28_register *reg =
- (struct mx28_register *)(MXS_PINCTRL_BASE + offset);
+ struct mx28_register_32 *reg =
+ (struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
return (readl(®->reg) >> PAD_PIN(gpio)) & 1;
}
@@ -83,8 +83,8 @@ void gpio_set_value(unsigned gpio, int value)
{
uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOUT(bank);
- struct mx28_register *reg =
- (struct mx28_register *)(MXS_PINCTRL_BASE + offset);
+ struct mx28_register_32 *reg =
+ (struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
if (value)
writel(1 << PAD_PIN(gpio), ®->reg_set);
@@ -96,8 +96,8 @@ int gpio_direction_input(unsigned gpio)
{
uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOE(bank);
- struct mx28_register *reg =
- (struct mx28_register *)(MXS_PINCTRL_BASE + offset);
+ struct mx28_register_32 *reg =
+ (struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
writel(1 << PAD_PIN(gpio), ®->reg_clr);
@@ -108,8 +108,8 @@ int gpio_direction_output(unsigned gpio, int value)
{
uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOE(bank);
- struct mx28_register *reg =
- (struct mx28_register *)(MXS_PINCTRL_BASE + offset);
+ struct mx28_register_32 *reg =
+ (struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
writel(1 << PAD_PIN(gpio), ®->reg_set);
diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index c795f23..e1bd37e 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -75,8 +75,8 @@ int ehci_hcd_init(void)
int ret;
uint32_t usb_base, cap_base;
- struct mx28_register *digctl_ctrl =
- (struct mx28_register *)HW_DIGCTL_CTRL;
+ struct mx28_register_32 *digctl_ctrl =
+ (struct mx28_register_32 *)HW_DIGCTL_CTRL;
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -119,8 +119,8 @@ int ehci_hcd_stop(void)
{
int ret;
uint32_t tmp;
- struct mx28_register *digctl_ctrl =
- (struct mx28_register *)HW_DIGCTL_CTRL;
+ struct mx28_register_32 *digctl_ctrl =
+ (struct mx28_register_32 *)HW_DIGCTL_CTRL;
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
--
1.7.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 6/7] Introducing 8-bit wide register, mx28_register_8
2012-02-26 22:15 [U-Boot] [PATCH 0/7] Set of various i.MX28 patches Marek Vasut
` (4 preceding siblings ...)
2012-02-26 22:15 ` [U-Boot] [PATCH 5/7] Renamed mx28_register to mx28_register_32 to prepare for mx28_register_8 Marek Vasut
@ 2012-02-26 22:15 ` Marek Vasut
2012-03-03 9:14 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 7/7] Fix erroneous 32-bit access to hw_clkctrl_frac0 and hw_clkctrl_frac1 registers Marek Vasut
6 siblings, 1 reply; 21+ messages in thread
From: Marek Vasut @ 2012-02-26 22:15 UTC (permalink / raw)
To: u-boot
From: Robert Delien <robert@delien.nl>
This patch introduces an 8-bit register, mx28_register_8, in order to
prepare for fixing erroneous 32-bit wide access of registers
hw_clkctrl_frac0 and hw_clkctrl_frac1.
Signed-off-by: Robert Delien <robert@delien.nl>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
---
arch/arm/include/asm/arch-mx28/regs-common.h | 16 ++++++++++++++++
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx28/regs-common.h b/arch/arm/include/asm/arch-mx28/regs-common.h
index 75cc9a6..94b512d 100644
--- a/arch/arm/include/asm/arch-mx28/regs-common.h
+++ b/arch/arm/include/asm/arch-mx28/regs-common.h
@@ -47,16 +47,32 @@
*
*/
+#define __mx28_reg_8(name) \
+ uint8_t name[4]; \
+ uint8_t name##_set[4]; \
+ uint8_t name##_clr[4]; \
+ uint8_t name##_tog[4]; \
+
#define __mx28_reg_32(name) \
uint32_t name; \
uint32_t name##_set; \
uint32_t name##_clr; \
uint32_t name##_tog;
+struct mx28_register_8 {
+ __mx28_reg_8(reg)
+};
+
struct mx28_register_32 {
__mx28_reg_32(reg)
};
+#define mx28_reg_8(name) \
+ union { \
+ struct { __mx28_reg_8(name) }; \
+ struct mx28_register_32 name##_reg; \
+ };
+
#define mx28_reg_32(name) \
union { \
struct { __mx28_reg_32(name) }; \
--
1.7.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 7/7] Fix erroneous 32-bit access to hw_clkctrl_frac0 and hw_clkctrl_frac1 registers
2012-02-26 22:15 [U-Boot] [PATCH 0/7] Set of various i.MX28 patches Marek Vasut
` (5 preceding siblings ...)
2012-02-26 22:15 ` [U-Boot] [PATCH 6/7] Introducing 8-bit wide register, mx28_register_8 Marek Vasut
@ 2012-02-26 22:15 ` Marek Vasut
2012-03-03 9:16 ` Stefano Babic
6 siblings, 1 reply; 21+ messages in thread
From: Marek Vasut @ 2012-02-26 22:15 UTC (permalink / raw)
To: u-boot
From: Robert Delien <robert@delien.nl>
This patch fixes erroneous 32-bit access to registers
hw_clkctrl_frac0 and hw_clkctrl_frac1.
Signed-off-by: Robert Delien <robert@delien.nl>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
---
arch/arm/cpu/arm926ejs/mx28/clock.c | 70 ++++++++++---------------
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 26 ++++-----
arch/arm/include/asm/arch-mx28/regs-clkctrl.h | 44 +++++-----------
3 files changed, 52 insertions(+), 88 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/clock.c b/arch/arm/cpu/arm926ejs/mx28/clock.c
index 9d3a018..0439f9c 100644
--- a/arch/arm/cpu/arm926ejs/mx28/clock.c
+++ b/arch/arm/cpu/arm926ejs/mx28/clock.c
@@ -46,8 +46,8 @@ static uint32_t mx28_get_pclk(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- uint32_t clkctrl, clkseq, clkfrac;
- uint32_t frac, div;
+ uint32_t clkctrl, clkseq, div;
+ uint8_t clkfrac, frac;
clkctrl = readl(&clkctrl_regs->hw_clkctrl_cpu);
@@ -67,8 +67,8 @@ static uint32_t mx28_get_pclk(void)
}
/* REF Path */
- clkfrac = readl(&clkctrl_regs->hw_clkctrl_frac0);
- frac = clkfrac & CLKCTRL_FRAC0_CPUFRAC_MASK;
+ clkfrac = readb(&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU]);
+ frac = clkfrac & CLKCTRL_FRAC_FRAC_MASK;
div = clkctrl & CLKCTRL_CPU_DIV_CPU_MASK;
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
}
@@ -96,8 +96,8 @@ static uint32_t mx28_get_emiclk(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- uint32_t frac, div;
- uint32_t clkctrl, clkseq, clkfrac;
+ uint32_t clkctrl, clkseq, div;
+ uint8_t clkfrac, frac;
clkseq = readl(&clkctrl_regs->hw_clkctrl_clkseq);
clkctrl = readl(&clkctrl_regs->hw_clkctrl_emi);
@@ -109,11 +109,9 @@ static uint32_t mx28_get_emiclk(void)
return XTAL_FREQ_MHZ / div;
}
- clkfrac = readl(&clkctrl_regs->hw_clkctrl_frac0);
-
/* REF Path */
- frac = (clkfrac & CLKCTRL_FRAC0_EMIFRAC_MASK) >>
- CLKCTRL_FRAC0_EMIFRAC_OFFSET;
+ clkfrac = readb(&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]);
+ frac = clkfrac & CLKCTRL_FRAC_FRAC_MASK;
div = clkctrl & CLKCTRL_EMI_DIV_EMI_MASK;
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
}
@@ -123,8 +121,8 @@ static uint32_t mx28_get_gpmiclk(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- uint32_t frac, div;
- uint32_t clkctrl, clkseq, clkfrac;
+ uint32_t clkctrl, clkseq, div;
+ uint8_t clkfrac, frac;
clkseq = readl(&clkctrl_regs->hw_clkctrl_clkseq);
clkctrl = readl(&clkctrl_regs->hw_clkctrl_gpmi);
@@ -135,11 +133,9 @@ static uint32_t mx28_get_gpmiclk(void)
return XTAL_FREQ_MHZ / div;
}
- clkfrac = readl(&clkctrl_regs->hw_clkctrl_frac1);
-
/* REF Path */
- frac = (clkfrac & CLKCTRL_FRAC1_GPMIFRAC_MASK) >>
- CLKCTRL_FRAC1_GPMIFRAC_OFFSET;
+ clkfrac = readb(&clkctrl_regs->hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI]);
+ frac = clkfrac & CLKCTRL_FRAC_FRAC_MASK;
div = clkctrl & CLKCTRL_GPMI_DIV_MASK;
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
}
@@ -152,11 +148,12 @@ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t div;
+ int io_reg;
if (freq == 0)
return;
- if (io > MXC_IOCLK1)
+ if ((io < MXC_IOCLK0) || (io > MXC_IOCLK1))
return;
div = (PLL_FREQ_KHZ * PLL_FREQ_COEF) / freq;
@@ -167,23 +164,13 @@ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq)
if (div > 35)
div = 35;
- if (io == MXC_IOCLK0) {
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- &clkctrl_regs->hw_clkctrl_frac0_set);
- clrsetbits_le32(&clkctrl_regs->hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO0FRAC_MASK,
- div << CLKCTRL_FRAC0_IO0FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO0,
- &clkctrl_regs->hw_clkctrl_frac0_clr);
- } else {
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- &clkctrl_regs->hw_clkctrl_frac0_set);
- clrsetbits_le32(&clkctrl_regs->hw_clkctrl_frac0,
- CLKCTRL_FRAC0_IO1FRAC_MASK,
- div << CLKCTRL_FRAC0_IO1FRAC_OFFSET);
- writel(CLKCTRL_FRAC0_CLKGATEIO1,
- &clkctrl_regs->hw_clkctrl_frac0_clr);
- }
+ io_reg = CLKCTRL_FRAC0_IO0 - io; /* Register order is reversed */
+ writeb(CLKCTRL_FRAC_CLKGATE,
+ &clkctrl_regs->hw_clkctrl_frac0_set[io_reg]);
+ writeb(CLKCTRL_FRAC_CLKGATE | (div & CLKCTRL_FRAC_FRAC_MASK),
+ &clkctrl_regs->hw_clkctrl_frac0[io_reg]);
+ writeb(CLKCTRL_FRAC_CLKGATE,
+ &clkctrl_regs->hw_clkctrl_frac0_clr[io_reg]);
}
/*
@@ -193,19 +180,16 @@ static uint32_t mx28_get_ioclk(enum mxs_ioclock io)
{
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- uint32_t tmp, ret;
+ uint8_t ret;
+ int io_reg;
- if (io > MXC_IOCLK1)
+ if ((io < MXC_IOCLK0) || (io > MXC_IOCLK1))
return 0;
- tmp = readl(&clkctrl_regs->hw_clkctrl_frac0);
+ io_reg = CLKCTRL_FRAC0_IO0 - io; /* Register order is reversed */
- if (io == MXC_IOCLK0)
- ret = (tmp & CLKCTRL_FRAC0_IO0FRAC_MASK) >>
- CLKCTRL_FRAC0_IO0FRAC_OFFSET;
- else
- ret = (tmp & CLKCTRL_FRAC0_IO1FRAC_MASK) >>
- CLKCTRL_FRAC0_IO1FRAC_OFFSET;
+ ret = readb(&clkctrl_regs->hw_clkctrl_frac0[io_reg]) &
+ CLKCTRL_FRAC_FRAC_MASK;
return (PLL_FREQ_KHZ * PLL_FREQ_COEF) / ret;
}
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index fd18f70..43a90ff 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -96,22 +96,20 @@ void mx28_mem_init_clock(void)
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
/* Gate EMI clock */
- writel(CLKCTRL_FRAC0_CLKGATEEMI,
- &clkctrl_regs->hw_clkctrl_frac0_set);
+ writeb(CLKCTRL_FRAC_CLKGATE,
+ &clkctrl_regs->hw_clkctrl_frac0_set[CLKCTRL_FRAC0_EMI]);
- /* EMI = 205MHz */
- writel(CLKCTRL_FRAC0_EMIFRAC_MASK,
- &clkctrl_regs->hw_clkctrl_frac0_set);
- writel((0x2a << CLKCTRL_FRAC0_EMIFRAC_OFFSET) &
- CLKCTRL_FRAC0_EMIFRAC_MASK,
- &clkctrl_regs->hw_clkctrl_frac0_clr);
+ /* Set fractional divider for ref_emi to 480 * 18 / 21 = 411MHz */
+ writeb(CLKCTRL_FRAC_CLKGATE | (21 & CLKCTRL_FRAC_FRAC_MASK),
+ &clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]);
/* Ungate EMI clock */
- writel(CLKCTRL_FRAC0_CLKGATEEMI,
- &clkctrl_regs->hw_clkctrl_frac0_clr);
+ writeb(CLKCTRL_FRAC_CLKGATE,
+ &clkctrl_regs->hw_clkctrl_frac0_clr[CLKCTRL_FRAC0_EMI]);
early_delay(11000);
+ /* Set EMI clock divider for EMI clock to 411 / 2 = 205MHz */
writel((2 << CLKCTRL_EMI_DIV_EMI_OFFSET) |
(1 << CLKCTRL_EMI_DIV_XTAL_OFFSET),
&clkctrl_regs->hw_clkctrl_emi);
@@ -128,10 +126,10 @@ void mx28_mem_setup_cpu_and_hbus(void)
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- /* CPU = 454MHz and ungate CPU clock */
- clrsetbits_le32(&clkctrl_regs->hw_clkctrl_frac0,
- CLKCTRL_FRAC0_CPUFRAC_MASK | CLKCTRL_FRAC0_CLKGATECPU,
- 19 << CLKCTRL_FRAC0_CPUFRAC_OFFSET);
+ /* Set fractional divider for ref_cpu to 480 * 18 / 19 = 454MHz
+ * and ungate CPU clock */
+ writeb(19 & CLKCTRL_FRAC_FRAC_MASK,
+ (uint8_t *)&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU]);
/* Set CPU bypass */
writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
diff --git a/arch/arm/include/asm/arch-mx28/regs-clkctrl.h b/arch/arm/include/asm/arch-mx28/regs-clkctrl.h
index 8e666ee..3c4947d 100644
--- a/arch/arm/include/asm/arch-mx28/regs-clkctrl.h
+++ b/arch/arm/include/asm/arch-mx28/regs-clkctrl.h
@@ -56,8 +56,8 @@ struct mx28_clkctrl_regs {
uint32_t reserved[16];
- mx28_reg_32(hw_clkctrl_frac0) /* 0x1b0 */
- mx28_reg_32(hw_clkctrl_frac1) /* 0x1c0 */
+ mx28_reg_8(hw_clkctrl_frac0) /* 0x1b0 */
+ mx28_reg_8(hw_clkctrl_frac1) /* 0x1c0 */
mx28_reg_32(hw_clkctrl_clkseq) /* 0x1d0 */
mx28_reg_32(hw_clkctrl_reset) /* 0x1e0 */
mx28_reg_32(hw_clkctrl_status) /* 0x1f0 */
@@ -248,35 +248,17 @@ struct mx28_clkctrl_regs {
#define CLKCTRL_FLEXCAN_STOP_CAN1 (1 << 28)
#define CLKCTRL_FLEXCAN_CAN1_STATUS (1 << 27)
-#define CLKCTRL_FRAC0_CLKGATEIO0 (1 << 31)
-#define CLKCTRL_FRAC0_IO0_STABLE (1 << 30)
-#define CLKCTRL_FRAC0_IO0FRAC_MASK (0x3f << 24)
-#define CLKCTRL_FRAC0_IO0FRAC_OFFSET 24
-#define CLKCTRL_FRAC0_CLKGATEIO1 (1 << 23)
-#define CLKCTRL_FRAC0_IO1_STABLE (1 << 22)
-#define CLKCTRL_FRAC0_IO1FRAC_MASK (0x3f << 16)
-#define CLKCTRL_FRAC0_IO1FRAC_OFFSET 16
-#define CLKCTRL_FRAC0_CLKGATEEMI (1 << 15)
-#define CLKCTRL_FRAC0_EMI_STABLE (1 << 14)
-#define CLKCTRL_FRAC0_EMIFRAC_MASK (0x3f << 8)
-#define CLKCTRL_FRAC0_EMIFRAC_OFFSET 8
-#define CLKCTRL_FRAC0_CLKGATECPU (1 << 7)
-#define CLKCTRL_FRAC0_CPU_STABLE (1 << 6)
-#define CLKCTRL_FRAC0_CPUFRAC_MASK 0x3f
-#define CLKCTRL_FRAC0_CPUFRAC_OFFSET 0
-
-#define CLKCTRL_FRAC1_CLKGATEGPMI (1 << 23)
-#define CLKCTRL_FRAC1_GPMI_STABLE (1 << 22)
-#define CLKCTRL_FRAC1_GPMIFRAC_MASK (0x3f << 16)
-#define CLKCTRL_FRAC1_GPMIFRAC_OFFSET 16
-#define CLKCTRL_FRAC1_CLKGATEHSADC (1 << 15)
-#define CLKCTRL_FRAC1_HSADC_STABLE (1 << 14)
-#define CLKCTRL_FRAC1_HSADCFRAC_MASK (0x3f << 8)
-#define CLKCTRL_FRAC1_HSADCFRAC_OFFSET 8
-#define CLKCTRL_FRAC1_CLKGATEPIX (1 << 7)
-#define CLKCTRL_FRAC1_PIX_STABLE (1 << 6)
-#define CLKCTRL_FRAC1_PIXFRAC_MASK 0x3f
-#define CLKCTRL_FRAC1_PIXFRAC_OFFSET 0
+#define CLKCTRL_FRAC_CLKGATE (1 << 7)
+#define CLKCTRL_FRAC_STABLE (1 << 6)
+#define CLKCTRL_FRAC_FRAC_MASK 0x3f
+#define CLKCTRL_FRAC_FRAC_OFFSET 0
+#define CLKCTRL_FRAC0_CPU 0
+#define CLKCTRL_FRAC0_EMI 1
+#define CLKCTRL_FRAC0_IO1 2
+#define CLKCTRL_FRAC0_IO0 3
+#define CLKCTRL_FRAC1_PIX 0
+#define CLKCTRL_FRAC1_HSADC 1
+#define CLKCTRL_FRAC1_GPMI 2
#define CLKCTRL_CLKSEQ_BYPASS_CPU (1 << 18)
#define CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF (1 << 14)
--
1.7.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits
2012-02-26 22:15 ` [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits Marek Vasut
@ 2012-03-01 15:22 ` Fabio Estevam
2012-03-01 18:34 ` Marek Vasut
2012-03-09 13:39 ` Stefano Babic
1 sibling, 1 reply; 21+ messages in thread
From: Fabio Estevam @ 2012-03-01 15:22 UTC (permalink / raw)
To: u-boot
On Sun, Feb 26, 2012 at 7:15 PM, Marek Vasut <marex@denx.de> wrote:
> Signed-off-by: Marek Vasut <marex@denx.de>
> ---
> ?arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | ? ?2 +-
> ?1 files changed, 1 insertions(+), 1 deletions(-)
Could you please elaborate a commit message for this?
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits
2012-03-01 15:22 ` Fabio Estevam
@ 2012-03-01 18:34 ` Marek Vasut
2012-03-01 18:39 ` Fabio Estevam
0 siblings, 1 reply; 21+ messages in thread
From: Marek Vasut @ 2012-03-01 18:34 UTC (permalink / raw)
To: u-boot
> On Sun, Feb 26, 2012 at 7:15 PM, Marek Vasut <marex@denx.de> wrote:
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > ---
> > arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 2 +-
> > 1 files changed, 1 insertions(+), 1 deletions(-)
>
> Could you please elaborate a commit message for this?
>
> From what I could see this is changing from 0x0f02020a to 0x0f02010a,
> and it would be nice to have in the commit message an explanation of
> what this register is, what you are changing and why.
If I could get my hands on Office 2010 to open that stupid memory thing supplied
by freescale, I would. But since I can't ... basically, this is magic which
enables all fourteen address lines. From what I remember, the piece at 0xf << 8
says how many address bits are to be disabled and 0 is prohibited.
Since all of them should be enabled now, I don't consider it necessary to poke
into this anymore. Or does it break anything for you?
M
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits
2012-03-01 18:34 ` Marek Vasut
@ 2012-03-01 18:39 ` Fabio Estevam
2012-03-01 18:52 ` Marek Vasut
0 siblings, 1 reply; 21+ messages in thread
From: Fabio Estevam @ 2012-03-01 18:39 UTC (permalink / raw)
To: u-boot
On Thu, Mar 1, 2012 at 3:34 PM, Marek Vasut <marex@denx.de> wrote:
> If I could get my hands on Office 2010 to open that stupid memory thing supplied
> by freescale, I would. But since I can't ... basically, this is magic which
> enables all fourteen address lines. From what I remember, the piece at 0xf << 8
> says how many address bits are to be disabled and 0 is prohibited.
>
> Since all of them should be enabled now, I don't consider it necessary to poke
> into this anymore. Or does it break anything for you?
I haven't had a chance to test it yet. My comment was more towards
putting a brief explanation in the commit log.
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits
2012-03-01 18:39 ` Fabio Estevam
@ 2012-03-01 18:52 ` Marek Vasut
2012-03-03 10:21 ` Stefano Babic
0 siblings, 1 reply; 21+ messages in thread
From: Marek Vasut @ 2012-03-01 18:52 UTC (permalink / raw)
To: u-boot
> On Thu, Mar 1, 2012 at 3:34 PM, Marek Vasut <marex@denx.de> wrote:
> > If I could get my hands on Office 2010 to open that stupid memory thing
> > supplied by freescale, I would. But since I can't ... basically, this is
> > magic which enables all fourteen address lines. From what I remember,
> > the piece at 0xf << 8 says how many address bits are to be disabled and
> > 0 is prohibited.
> >
> > Since all of them should be enabled now, I don't consider it necessary to
> > poke into this anymore. Or does it break anything for you?
>
> I haven't had a chance to test it yet. My comment was more towards
> putting a brief explanation in the commit log.
Well ... it was more verbose than FSL docs ;-) I got your point though, but I'll
not be resending it unless completely necessary, I don't see this very
important. I'd eventually love this transformed properly to a structure or
something.
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 1/7] M28: Fix LCD PINMUX
2012-02-26 22:15 ` [U-Boot] [PATCH 1/7] M28: Fix LCD PINMUX Marek Vasut
@ 2012-03-03 9:06 ` Stefano Babic
0 siblings, 0 replies; 21+ messages in thread
From: Stefano Babic @ 2012-03-03 9:06 UTC (permalink / raw)
To: u-boot
On 26/02/2012 23:15, Marek Vasut wrote:
> The LCD pins configuration was wrong in U-Boot, configure pins properly.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Detlev Zundel <dzu@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Fabio Estevam <festevam@gmail.com>
> ---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 2/7] M28: Support for the old M28 SoM v1.0
2012-02-26 22:15 ` [U-Boot] [PATCH 2/7] M28: Support for the old M28 SoM v1.0 Marek Vasut
@ 2012-03-03 9:07 ` Stefano Babic
0 siblings, 0 replies; 21+ messages in thread
From: Stefano Babic @ 2012-03-03 9:07 UTC (permalink / raw)
To: u-boot
On 26/02/2012 23:15, Marek Vasut wrote:
> This prototype version SoM is unused and not available to public.
> Support this only for internal debugging purposes.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> ---
Applied to u-boot-imx, thanks
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 3/7] i.MX28: Reformat the DRAM memory configuration data
2012-02-26 22:15 ` [U-Boot] [PATCH 3/7] i.MX28: Reformat the DRAM memory configuration data Marek Vasut
@ 2012-03-03 9:09 ` Stefano Babic
0 siblings, 0 replies; 21+ messages in thread
From: Stefano Babic @ 2012-03-03 9:09 UTC (permalink / raw)
To: u-boot
On 26/02/2012 23:15, Marek Vasut wrote:
> Reformat the data so it's easier to navigate through them.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> ---
> arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 86 +++++++++++++++------------
> 1 files changed, 48 insertions(+), 38 deletions(-)
>
Applied to u-boot-imx, thanks
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 5/7] Renamed mx28_register to mx28_register_32 to prepare for mx28_register_8
2012-02-26 22:15 ` [U-Boot] [PATCH 5/7] Renamed mx28_register to mx28_register_32 to prepare for mx28_register_8 Marek Vasut
@ 2012-03-03 9:13 ` Stefano Babic
0 siblings, 0 replies; 21+ messages in thread
From: Stefano Babic @ 2012-03-03 9:13 UTC (permalink / raw)
To: u-boot
On 26/02/2012 23:15, Marek Vasut wrote:
> From: Robert Delien <robert@delien.nl>
>
> This patch renames mx28_register to mx28_register_32 in order to
> prepare for the introduction of an 8-bit register, mx28_register_8.
>
> Signed-off-by: Robert Delien <robert@delien.nl>
> Acked-by: Marek Vasut <marex@denx.de>
> Tested-by: Marek Vasut <marex@denx.de>
> ---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 6/7] Introducing 8-bit wide register, mx28_register_8
2012-02-26 22:15 ` [U-Boot] [PATCH 6/7] Introducing 8-bit wide register, mx28_register_8 Marek Vasut
@ 2012-03-03 9:14 ` Stefano Babic
0 siblings, 0 replies; 21+ messages in thread
From: Stefano Babic @ 2012-03-03 9:14 UTC (permalink / raw)
To: u-boot
On 26/02/2012 23:15, Marek Vasut wrote:
> From: Robert Delien <robert@delien.nl>
>
> This patch introduces an 8-bit register, mx28_register_8, in order to
> prepare for fixing erroneous 32-bit wide access of registers
> hw_clkctrl_frac0 and hw_clkctrl_frac1.
>
> Signed-off-by: Robert Delien <robert@delien.nl>
> Acked-by: Marek Vasut <marex@denx.de>
> Tested-by: Marek Vasut <marex@denx.de>
> ---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 7/7] Fix erroneous 32-bit access to hw_clkctrl_frac0 and hw_clkctrl_frac1 registers
2012-02-26 22:15 ` [U-Boot] [PATCH 7/7] Fix erroneous 32-bit access to hw_clkctrl_frac0 and hw_clkctrl_frac1 registers Marek Vasut
@ 2012-03-03 9:16 ` Stefano Babic
0 siblings, 0 replies; 21+ messages in thread
From: Stefano Babic @ 2012-03-03 9:16 UTC (permalink / raw)
To: u-boot
On 26/02/2012 23:15, Marek Vasut wrote:
> From: Robert Delien <robert@delien.nl>
>
> This patch fixes erroneous 32-bit access to registers
> hw_clkctrl_frac0 and hw_clkctrl_frac1.
>
> Signed-off-by: Robert Delien <robert@delien.nl>
> Acked-by: Marek Vasut <marex@denx.de>
> Tested-by: Marek Vasut <marex@denx.de>
> ---
Applied to u-boot-imx, thanks
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits
2012-03-01 18:52 ` Marek Vasut
@ 2012-03-03 10:21 ` Stefano Babic
2012-03-03 12:02 ` Marek Vasut
0 siblings, 1 reply; 21+ messages in thread
From: Stefano Babic @ 2012-03-03 10:21 UTC (permalink / raw)
To: u-boot
On 01/03/2012 19:52, Marek Vasut wrote:
> Well ... it was more verbose than FSL docs ;-)
Well, you are only saying that it is only a little more of nothing... ;-)
> I got your point though, but I'll
> not be resending it unless completely necessary, I don't see this very
> important. I'd eventually love this transformed properly to a structure or
> something.
Ok - what about if I merge the patch adding in the commit message
"enables all fourteen address lines for DRAM" ?
Stefano
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits
2012-03-03 10:21 ` Stefano Babic
@ 2012-03-03 12:02 ` Marek Vasut
0 siblings, 0 replies; 21+ messages in thread
From: Marek Vasut @ 2012-03-03 12:02 UTC (permalink / raw)
To: u-boot
> On 01/03/2012 19:52, Marek Vasut wrote:
> > Well ... it was more verbose than FSL docs ;-)
>
> Well, you are only saying that it is only a little more of nothing... ;-)
>
> > I got your point though, but I'll
> > not be resending it unless completely necessary, I don't see this very
> > important. I'd eventually love this transformed properly to a structure
> > or something.
>
> Ok - what about if I merge the patch adding in the commit message
> "enables all fourteen address lines for DRAM" ?
>
> Stefano
Acked-by: Marek Vasut <marek.vasut@gmail.com>
and ...
Tested-by: Marek Vasut <marek.vasut@gmail.com>
^--- I'm definitelly making enough brownie points with this "Tested-by" to make
it to the first place in that category in 2012.03 release :D
M
^ permalink raw reply [flat|nested] 21+ messages in thread
* [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits
2012-02-26 22:15 ` [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits Marek Vasut
2012-03-01 15:22 ` Fabio Estevam
@ 2012-03-09 13:39 ` Stefano Babic
1 sibling, 0 replies; 21+ messages in thread
From: Stefano Babic @ 2012-03-09 13:39 UTC (permalink / raw)
To: u-boot
On 26/02/2012 23:15, Marek Vasut wrote:
> Signed-off-by: Marek Vasut <marex@denx.de>
> ---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2012-03-09 13:39 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-02-26 22:15 [U-Boot] [PATCH 0/7] Set of various i.MX28 patches Marek Vasut
2012-02-26 22:15 ` [U-Boot] [PATCH 1/7] M28: Fix LCD PINMUX Marek Vasut
2012-03-03 9:06 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 2/7] M28: Support for the old M28 SoM v1.0 Marek Vasut
2012-03-03 9:07 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 3/7] i.MX28: Reformat the DRAM memory configuration data Marek Vasut
2012-03-03 9:09 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits Marek Vasut
2012-03-01 15:22 ` Fabio Estevam
2012-03-01 18:34 ` Marek Vasut
2012-03-01 18:39 ` Fabio Estevam
2012-03-01 18:52 ` Marek Vasut
2012-03-03 10:21 ` Stefano Babic
2012-03-03 12:02 ` Marek Vasut
2012-03-09 13:39 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 5/7] Renamed mx28_register to mx28_register_32 to prepare for mx28_register_8 Marek Vasut
2012-03-03 9:13 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 6/7] Introducing 8-bit wide register, mx28_register_8 Marek Vasut
2012-03-03 9:14 ` Stefano Babic
2012-02-26 22:15 ` [U-Boot] [PATCH 7/7] Fix erroneous 32-bit access to hw_clkctrl_frac0 and hw_clkctrl_frac1 registers Marek Vasut
2012-03-03 9:16 ` Stefano Babic
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox