[U-Boot] [PATCH 4/7] i.MX28: Enable additional DRAM address bits

Marek Vasut
2012-03-01T18:34:54Z

> On Sun, Feb 26, 2012 at 7:15 PM, Marek Vasut <marex@denx.de> wrote:
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > ---
> > arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 2 +-
> > 1 files changed, 1 insertions(+), 1 deletions(-)
>
> Could you please elaborate a commit message for this?
>
> From what I could see this is changing from 0x0f02020a to 0x0f02010a,
> and it would be nice to have in the commit message an explanation of
> what this register is, what you are changing and why.

If I could get my hands on Office 2010 to open that stupid memory thing supplied
by freescale, I would. But since I can't ... basically, this is magic which
enables all fourteen address lines. From what I remember, the piece at 0xf << 8
says how many address bits are to be disabled and 0 is prohibited.

Since all of them should be enabled now, I don't consider it necessary to poke
into this anymore. Or does it break anything for you?

M