From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Tue, 13 Mar 2012 09:20:03 +0100 Subject: [U-Boot] [PATCH V2 1/3] i.MX6: define CACHELINE_SIZE In-Reply-To: <4F5E9E18.1040909@boundarydevices.com> References: <1330897659-9049-1-git-send-email-eric.nelson@boundarydevices.com> <1330897659-9049-2-git-send-email-eric.nelson@boundarydevices.com> <4F5E9E18.1040909@boundarydevices.com> Message-ID: <4F5F0333.7010801@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 13/03/2012 02:08, Eric Nelson wrote: > On 03/04/2012 02:47 PM, Eric Nelson wrote: >> Signed-off-by: Eric Nelson >> Acked-by: Marek Vasut >> >> --- >> arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ >> 1 files changed, 2 insertions(+), 0 deletions(-) >> >> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h >> b/arch/arm/include/asm/arch-mx6/imx-regs.h >> index 6a200bb..3e5c4c2 100644 >> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h >> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h >> @@ -19,6 +19,8 @@ >> #ifndef __ASM_ARCH_MX6_IMX_REGS_H__ >> #define __ASM_ARCH_MX6_IMX_REGS_H__ >> >> +#define CONFIG_SYS_CACHELINE_SIZE 32 >> + >> #define ROMCP_ARB_BASE_ADDR 0x00000000 >> #define ROMCP_ARB_END_ADDR 0x000FFFFF >> #define CAAM_ARB_BASE_ADDR 0x00100000 > > Hi Stefano, > > Any word on this patch? No, but the patch is at the moment not useful until the FEC driver works with enabled cache. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================