From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dirk Behme Date: Tue, 13 Mar 2012 15:37:45 +0100 Subject: [U-Boot] [PATCH v2] mx6: Read silicon revision from register In-Reply-To: <1331648310-13064-1-git-send-email-fabio.estevam@freescale.com> References: <1331648310-13064-1-git-send-email-fabio.estevam@freescale.com> Message-ID: <4F5F5BB9.2090104@de.bosch.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 13.03.2012 15:18, Fabio Estevam wrote: > Instead of hardcoding the mx6 silicon revision, read it from the proper register. > > Signed-off-by: Fabio Estevam > --- > Changes since v1: > - Fix typo on Subject > arch/arm/cpu/armv7/mx6/soc.c | 3 ++- > 1 files changed, 2 insertions(+), 1 deletions(-) > > diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c > index 2ac74b5..639bf30 100644 > --- a/arch/arm/cpu/armv7/mx6/soc.c > +++ b/arch/arm/cpu/armv7/mx6/soc.c > @@ -32,7 +32,8 @@ > > u32 get_cpu_rev(void) > { > - int system_rev = 0x61000 | CHIP_REV_1_0; > + int reg = readl(ANATOP_BASE_ADDR + 0x260) & 0xFF; Can we get a register overlay instead of the 'ANATOP_BASE_ADDR + 0x260'? Like in the rest of the file, e.g. readl(&fuse->mac_addr_high); writel(0x00000000, &aips1->opacr0); Best regards Dirk