From mboxrd@z Thu Jan  1 00:00:00 1970
From: stefano babic <sbabic@denx.de>
Date: Sat, 24 Mar 2012 09:19:23 +0100
Subject: [U-Boot] [PATCH V2] i.MX6: mx6q_sabrelite: add SATA bindings
In-Reply-To: <4F6D7319.5050204@googlemail.com>
References: <http://lists.denx.de/pipermail/u-boot/2012-March/#119234>
	<1331657978-19270-1-git-send-email-eric.nelson@boundarydevices.com>
	<4F6D7319.5050204@googlemail.com>
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Am 24/03/2012 08:09, schrieb Dirk Behme:
> Hi Stefano,

Hi Dirk,

> 
> On 13.03.2012 17:59, Eric Nelson wrote:
>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
> 
> Should this patch go into your u-boot-imx.git -next?

mmhh...in patchworks this is marked as "Changes requested" - I do not
remember now why, but I have a couple of open questions rereading the
patch...

>> diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
>> b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
>> index 1d09a72..5915159 100644
>> --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
>> +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
>> @@ -23,6 +23,7 @@
>>   #include<common.h>
>>   #include<asm/io.h>
>>   #include<asm/arch/imx-regs.h>
>> +#include<asm/arch/ccm_regs.h>
>>   #include<asm/arch/mx6x_pins.h>
>>   #include<asm/arch/iomux-v3.h>
>>   #include<asm/errno.h>
>> @@ -267,6 +268,60 @@ int board_eth_init(bd_t *bis)
>>       return 0;
>>   }
>>
>> +#ifdef CONFIG_CMD_SATA
>> +
>> +int setup_sata(void)
>> +{
>> +    u32 reg = 0;
>> +    s32 timeout = 100000;
>> +    struct imx_ccm_reg *const imx_ccm
>> +        = (struct imx_ccm_reg *) CCM_BASE_ADDR;
>> +    struct iomuxc_base_regs *const iomuxc_regs
>> +        = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
>> +
>> +    /* Enable sata clock */
>> +    reg = readl(&imx_ccm->CCGR5); /* CCGR5 */
>> +    reg |= MXC_CCM_CCGR5_CG2_MASK;
>> +    writel(reg,&imx_ccm->CCGR5);
>> +
>> +    /* Enable PLLs */
>> +    reg = readl(&imx_ccm->analog_pll_enet);
>> +    reg&= ~BM_ANADIG_PLL_SYS_POWERDOWN;
>> +    writel(reg,&imx_ccm->analog_pll_enet);
>> +    reg |= BM_ANADIG_PLL_SYS_ENABLE;
>> +    while (timeout--) {
>> +        if (readl(&imx_ccm->analog_pll_enet)&  BM_ANADIG_PLL_SYS_LOCK)
>> +            break;
>> +    }
>> +    if (timeout<= 0)
>> +        return -1;
>> +    reg&= ~BM_ANADIG_PLL_SYS_BYPASS;
>> +    writel(reg,&imx_ccm->analog_pll_enet);
>> +    reg |= BM_ANADIG_PLL_ENET_ENABLE_SATA;
>> +    writel(reg,&imx_ccm->analog_pll_enet);

Is it all this part really board specific or mx6 specific ? I would like
to split this part into a common and a board specific parts, and making
the common part available for other boards.

>> +
>> +    /* Enable sata phy */
>> +    reg = readl(&iomuxc_regs->gpr[13])
>> +        &  (IOMUXC_GPR13_SDMA_STOP_REQ
>> +           |IOMUXC_GPR13_CAN2_STOP_REQ
>> +           |IOMUXC_GPR13_CAN1_STOP_REQ
>> +           |IOMUXC_GPR13_ENET_STOP_REQ);

Why do you need to touch CAN bits ?

Best regards,
Stefano

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