From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS
Date: Wed, 28 Mar 2012 15:43:21 +0200 [thread overview]
Message-ID: <4F731579.50402@denx.de> (raw)
In-Reply-To: <CAOMZO5B8vJ-ZvnH4BYVW9QHJhWW_9WATRh2izhzJMWgT5c6XRQ@mail.gmail.com>
On 28/03/2012 15:31, Fabio Estevam wrote:
> On 3/28/12, Stefano Babic <sbabic@denx.de> wrote:
>> On 22/03/2012 23:00, Troy Kisky wrote:
>>> Currently, board files are setting this field to 0x01
>>> which the manual says is a reserved value. Change to
>>> use the default of 0x04 - 128 cycles.
>>>
>>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
>>> ---
>>
>> Thanks everybody to fix / explain this issue.
>>
>> Applied to u-boot-imx(fix), thanks.
>
> Just noticed in this thread that Troy reported a typo in his commit
> log: it should have said
> "default of 0x02 - 128 cycles"
Right - I have fixed it myself on the tree, thanks.
Stefano
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prev parent reply other threads:[~2012-03-28 13:43 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-22 22:00 [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS Troy Kisky
2012-03-23 1:47 ` Troy Kisky
2012-03-23 3:25 ` Troy Kisky
2012-03-23 9:34 ` Stefano Babic
2012-03-23 16:50 ` Fabio Estevam
2012-03-28 13:10 ` Fabio Estevam
2012-03-28 13:26 ` Stefano Babic
2012-03-28 13:31 ` Fabio Estevam
2012-03-28 13:43 ` Stefano Babic [this message]
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