From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Wed, 28 Mar 2012 15:43:21 +0200 Subject: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS In-Reply-To: References: <1332453631-18653-1-git-send-email-troy.kisky@boundarydevices.com> <4F731182.9030702@denx.de> Message-ID: <4F731579.50402@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 28/03/2012 15:31, Fabio Estevam wrote: > On 3/28/12, Stefano Babic wrote: >> On 22/03/2012 23:00, Troy Kisky wrote: >>> Currently, board files are setting this field to 0x01 >>> which the manual says is a reserved value. Change to >>> use the default of 0x04 - 128 cycles. >>> >>> Signed-off-by: Troy Kisky >>> --- >> >> Thanks everybody to fix / explain this issue. >> >> Applied to u-boot-imx(fix), thanks. > > Just noticed in this thread that Troy reported a typo in his commit > log: it should have said > "default of 0x02 - 128 cycles" Right - I have fixed it myself on the tree, thanks. Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================