* [U-Boot] BDI2000 config file for mx35pdk
2012-03-30 9:12 [U-Boot] BDI2000 config file for mx35pdk Gabriel Tisan
@ 2012-03-30 9:31 ` Stefano Babic
0 siblings, 0 replies; 2+ messages in thread
From: Stefano Babic @ 2012-03-30 9:31 UTC (permalink / raw)
To: u-boot
On 30/03/2012 11:12, Gabriel Tisan wrote:
> Hi !
>
> Does someone has a working BDI2000 configuration file for Freescale's mx35pdk ?
>
Hi Gabriel,
we are OT here. Anyway, the following configuration worked for me:
[INIT]
WCP15 0x0001 0x00050078 ; CP15 control register
WCP15 0x0707 0x00000000 ; CP15 invalidate I&D
WCP15 0x0708 0x00000000 ; CP15 invalidate TLB
WCP15 0x4A07 0x00000000 ; CP15 clean write buf.
; RAM Initialization
;WEIM config CS5
;WM32 0xB8002050 0x0000d843
;WM32 0xB8002054 0x22252521
;WM32 0xB8002058 0x22220a00
; DDR2 init
;WM32 0xB8001010 0x00000304
;WM32 0xB8001010 0x0000030C
;WM32 0xB8001004 0x007ffc3f
;WM32 0xB8001000 0x92220000
;WM32 0x80000400 0x12345678
;WM32 0xB8001000 0xA2220000
;WM32 0x80000000 0x87654321
;WM32 0x80000000 0x87654321
;WM32 0xB8001000 0xB2220000
;WM8 0x80000233 0xda
;WM8 0x82000780 0xda
;WM8 0x82000400 0xda
;WM32 0xB8001000 0x82226080
;WM32 0xB8001004 0x007ffc3f
;WM32 0xB800100C 0x007ffc3f
;WM32 0xB8001010 0x00000304
;WM32 0xB8001008 0x00002000
[TARGET]
CPUTYPE ARM1136
;CLOCK 1 ;JTAG clock (0=Adaptive,1=16MHz,2=8MHz,3=4MHz)
;;;CLOCK 0 10 ;JTAG clock : start with 10 kHz then use adaptive
CLOCK 3 10 ;JTAG clock : start with 10 kHz then use 4MHz
POWERUP 3000 ;start delay after power-up detected in ms
RESET HARD 100 ;assert reset for 100 ms
;WAKEUP 100 ;wait after reset released
;STARTUP STOP 2000 ;let boot ROM setup the system
ENDIAN LITTLE ;memory model (LITTLE | BIG)
;VECTOR CATCH 0x1f ;catch D_Abort, P_Abort, SWI, Undef and
Reset
VECTOR CATCH 0x00 ;do not catch any vector
BREAKMODE HARD ;SOFT or HARD
;BREAKMODE SOFT ;SOFT or HARD
;
SCANPRED 2 9 ;
SCANSUCC 1 4 ; the ETMBUF after the ARM1136 core
;
;
; !!! Enable to following SCANINIT lines for BDI2000 firmware V1.04
; !!! Not needed for V1.03 and for upcomming firmware updates.
;
SCANINIT r1:t1:w1000:t0:w1000: ;assert reset and toggle TRST
SCANINIT r0:w10000: ;release reset and wait
SCANINIT ch5:w100 ;clock TCK with TMS high and wait
;
[HOST]
PROMPT mx35pdk>
FORMAT BIN
FILE mx35pdk/u-boot.bin
[FLASH]
WORKSPACE 0x1fffc000 ;workspace in internal SRAM
CHIPTYPE S29M32X16 ;Flash type is S29WS256N
CHIPSIZE 0x2000000 ;The size of one flash chip in bytes
BUSWIDTH 16 ;The width of the flash memory bus
FILE mx35pdk/u-boot.bin
FORMAT BIN 0xa0000000
ERASE 0xa0000000 UNLOCK
ERASE 0xa0020000 UNLOCK
ERASE 0xa0040000 UNLOCK
ERASE 0xa0060000 UNLOCK
[REGS]
FILE BDI2000/abatron/bdigdb/config/arm11/regIMX31.def
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 2+ messages in thread