From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Fri, 13 Apr 2012 12:19:11 -0500 Subject: [U-Boot] [PATCH 4/9] imx: nand: Place BBT patterns into free OOB region In-Reply-To: <1334316061-26019-5-git-send-email-timo@exertus.fi> References: <1334223234-23383-1-git-send-email-timo@exertus.fi> <1334316061-26019-1-git-send-email-timo@exertus.fi> <1334316061-26019-5-git-send-email-timo@exertus.fi> Message-ID: <4F88600F.90507@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 04/13/2012 06:20 AM, Timo Ketola wrote: > First two bytes of the first OOB of erase block are reserved for factory > bad block marking, usually. > > Signed-off-by: Timo Ketola > --- > drivers/mtd/nand/mxc_nand.c | 35 +++++++++++++++++++++++++++++++++++ > 1 files changed, 35 insertions(+), 0 deletions(-) So what happened before? The default is at offset 8, which doesn't conflict with the bad block marker. It seems the actual issue is a conflict with ECC? And NAND_USE_FLASH_BBT wasn't defined before, so a better subject line for this patch would be "nand/mxc: support flash-based BBT". > diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c > index 35e89a0..73813a2 100644 > --- a/drivers/mtd/nand/mxc_nand.c > +++ b/drivers/mtd/nand/mxc_nand.c > @@ -1302,12 +1302,47 @@ static void mxc_setup_config1(void) > #define mxc_setup_config1() > #endif > > +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT > + > +static u8 bbt_pattern[] = {'B', 'b', 't', '0' }; > +static u8 mirror_pattern[] = {'1', 't', 'b', 'B' }; > + > +static struct nand_bbt_descr bbt_main_descr = { > + .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | > + NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, > + .offs = 2, > + .len = 4, > + .veroffs = 6, > + .maxblocks = 4, > + .pattern = bbt_pattern, > +}; > + > +static struct nand_bbt_descr bbt_mirror_descr = { > + .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | > + NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, > + .offs = 2, > + .len = 4, > + .veroffs = 6, > + .maxblocks = 4, > + .pattern = mirror_pattern, > +}; > + > +#endif > + Won't veroffs = 6 conflict with ECC in the MXC_NFC_V1 case? What about 8-bit small page support, in which case the bad block marker is at offset 5? > int board_nand_init(struct nand_chip *this) > { > struct mtd_info *mtd; > uint16_t tmp; > int err = 0; > > +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT > + > + this->options = NAND_USE_FLASH_BBT; > + this->bbt_td = &bbt_main_descr; > + this->bbt_md = &bbt_mirror_descr; > + > +#endif Please remove those blank lines inside the ifdef. -Scott