[U-Boot] [PATCH 4/9] imx: nand: Place BBT patterns into free OOB region

[Scott Wood <scottwood@freescale.com>]

On 04/13/2012 01:12 PM, Timo Ketola wrote:
> On 13.04.2012 20:19, Scott Wood wrote:
>> On 04/13/2012 06:20 AM, Timo Ketola wrote:
>>> First two bytes of the first OOB of erase block are reserved for factory
>>> bad block marking, usually.
>>>
>>> Signed-off-by: Timo Ketola<timo@exertus.fi>
>>> ---
>>>   drivers/mtd/nand/mxc_nand.c |   35 +++++++++++++++++++++++++++++++++++
>>>   1 files changed, 35 insertions(+), 0 deletions(-)
>>
>> So what happened before?  The default is at offset 8, which doesn't
>> conflict with the bad block marker.  It seems the actual issue is a
>> conflict with ECC?
> 
> You seem to be right. I think I was badly confused with the kernel
> behaviour.

It looks like Linux wants the BBT to be at offset zero.  Is there any
plan to fix that?  The two really should match...

>> What about 8-bit small page support, in which case the bad block marker
>> is at offset 5?
> 
> What about putting into the block
> 
> #if defined(MXC_NFC_V1)
> #ifndef CONFIG_SYS_NAND_LARGEPAGE
> 
> defines for pattern and version offsets and use them in bbt_*_descr
> initializations?

Sure.

> Or should they be in board configuration file?

I don't think it belongs in the board config file (unless there's
existing behavior that has to be matched for compatibility on a specific
board).

-Scott