From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dirk Behme Date: Wed, 18 Apr 2012 12:41:18 +0200 Subject: [U-Boot] [PATCH] i.MX6: Add ANATOP regulator init In-Reply-To: <1334304028-25575-1-git-send-email-dirk.behme@de.bosch.com> References: <1334304028-25575-1-git-send-email-dirk.behme@de.bosch.com> Message-ID: <4F8E9A4E.8000208@de.bosch.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 13.04.2012 10:00, Dirk Behme wrote: > Init the core regulator voltage to 1.2V. This is required for the correct > functioning of the GPU and when the ARM LDO is set to 1.225V. This is a > workaround to fix some memory clock jitter. > > Note: This should be but can't be done in the DCD. The bootloader > prevents access to the ANATOP registers. > > Signed-off-by: Dirk Behme > CC: Jason Chen > CC: Jason Liu > CC: Ranjani Vaidyanathan > CC: Stefano Babic > CC: Fabio Estevam > --- > arch/arm/cpu/armv7/mx6/soc.c | 16 ++++++++++++++++ > 1 files changed, 16 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c > index 543b2cc..957ea34 100644 > --- a/arch/arm/cpu/armv7/mx6/soc.c > +++ b/arch/arm/cpu/armv7/mx6/soc.c > @@ -77,10 +77,26 @@ void init_aips(void) > writel(0x00000000, &aips2->opacr4); > } > > +static void init_anatop_reg(void) > +{ > + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; > + int reg = readl(&anatop->reg_core); > + > + /* > + * Increase the VDDSOC to 1.2V > + * Mask out the REG_CORE[22:18] bits (REG2_TRIG) > + * and set them to 1.2V (0.7V + 0x14 * 0.025V) > + */ > + reg = (reg & ~(0x1F << 18)) | (0x14 << 18); > + writel(reg, &anatop->reg_core); > +} > + > int arch_cpu_init(void) > { > init_aips(); > > + init_anatop_reg(); > + > return 0; > } > #endif Any comments on this? Many thanks Dirk