From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dirk Behme Date: Sat, 21 Apr 2012 07:56:06 +0200 Subject: [U-Boot] [PATCH] i.MX: fsl_esdhc: allow use with cache enabled. In-Reply-To: <4F6EF450.90308@denx.de> References: <1330814276-2425-1-git-send-email-eric.nelson@boundarydevices.com> <4F646C92.3060000@denx.de> <4F6E4C5E.4030007@boundarydevices.com> <4F6EF450.90308@denx.de> Message-ID: <4F924BF6.2000908@googlemail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Eric, On 25.03.2012 12:32, Stefano Babic wrote: > On 24/03/2012 23:36, Eric Nelson wrote: >> Hi Stefano, >> > > Hi Eric, > >> Sorry I let this linger. >> >> On 03/17/2012 03:50 AM, Stefano Babic wrote: >>> On 03/03/2012 23:37, Eric Nelson wrote: >>>> Signed-off-by: Eric Nelson >>>> --- >>> >>> Hi Eric, >>> >>> I have added Andy in CC as MMC Maintainer >>> >>>> drivers/mmc/fsl_esdhc.c | 12 +++++++++++- >>>> 1 files changed, 11 insertions(+), 1 deletions(-) >>>> >>>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c >>>> index a2f35e3..8e4bcef 100644 >>>> --- a/drivers/mmc/fsl_esdhc.c >>>> +++ b/drivers/mmc/fsl_esdhc.c >>>> @@ -190,6 +190,8 @@ static int esdhc_setup_data(struct mmc *mmc, >>>> struct mmc_data *data) >>>> esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); >>>> esdhc_write32(®s->dsaddr, (u32)data->dest); >>>> } else { >>>> + >>>> flush_dcache_range((ulong)data->src,(ulong)data->src+data->blocks*data->blocksize); >>>> >>> >>> This breaks PowerPC boards. >>> >> >> Can you tell me how? > > > ./MAKEALL MPC8536DS > Configuring for MPC8536DS board... > fsl_esdhc.c: In function 'check_and_invalidate_dcache_range': > fsl_esdhc.c:255:19: warning: initialization makes integer from pointer I get this building it for SabreLite, too. So any plans to update this patch? Many thanks and best regards Dirk > without a cast [enabled by default] > drivers/mmc/libmmc.o: In function `esdhc_setup_data': > /home/stefano/Projects/imx/u-boot-imx/drivers/mmc/fsl_esdhc.c:193: > undefined reference to `flush_dcache_range' > drivers/mmc/libmmc.o: In function `check_and_invalidate_dcache_range': > /home/stefano/Projects/imx/u-boot-imx/drivers/mmc/fsl_esdhc.c:258: > undefined reference to `invalidate_dcache_range' > make: *** [u-boot] Fehler 1 > > Main reason is that PowerPC (this is a PowerQuickIII) has a "snooping" > mechanism, and it is enough to set a bit in the SOC to make things working. > > Maybe can we add these functions as empty in 85xx ? Or we can add an > intermediate layer in fsl_eshc.h that manage this, such as > fsl_esdhc_flush_dcache_range. This was already done to solve the > endianess problem (PowerPC is big endian). > > Andy, what do you think about ? > >> >> AFAIK, blocksize needs to be a multiple of 512 so this should be >> cache-safe with >> any cacheline size. > > Yes, I think your changes are correct in the i.MX case. > > Best regards, > Stefano >