[U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()

[U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()

[Eric Nelson]

This patch requires Stefano's driver for MX5/MX6 to be useful. 
	http://lists.denx.de/pipermail/u-boot/2012-February/118530.html

This is the first and board-independent part of what's needed to enable
SATA on an i.MX6 board as discussed in this thread:
	http://lists.denx.de/pipermail/u-boot/2012-March/120919.html

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>

---
V2 updated to return -EIO instead of -1.

 arch/arm/cpu/armv7/mx6/clock.c           |   31 ++++++++
 arch/arm/include/asm/arch-mx6/clock.h    |    1 +
 arch/arm/include/asm/arch-mx6/imx-regs.h |    9 +++
 arch/arm/include/asm/arch-mx6/iomux-v3.h |  111 ++++++++++++++++++++++++++++++
 4 files changed, 152 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index ef98563..de91cac 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -303,6 +303,37 @@ u32 imx_get_fecclk(void)
 	return decode_pll(PLL_ENET, CONFIG_SYS_MX6_HCLK);
 }
 
+int enable_sata_clock(void)
+{
+	u32 reg = 0;
+	s32 timeout = 100000;
+	struct imx_ccm_reg *const imx_ccm
+		= (struct imx_ccm_reg *) CCM_BASE_ADDR;
+
+	/* Enable sata clock */
+	reg = readl(&imx_ccm->CCGR5); /* CCGR5 */
+	reg |= MXC_CCM_CCGR5_CG2_MASK;
+	writel(reg, &imx_ccm->CCGR5);
+
+	/* Enable PLLs */
+	reg = readl(&imx_ccm->analog_pll_enet);
+	reg &= ~BM_ANADIG_PLL_SYS_POWERDOWN;
+	writel(reg, &imx_ccm->analog_pll_enet);
+	reg |= BM_ANADIG_PLL_SYS_ENABLE;
+	while (timeout--) {
+		if (readl(&imx_ccm->analog_pll_enet) & BM_ANADIG_PLL_SYS_LOCK)
+			break;
+	}
+	if (timeout <= 0)
+		return -EIO;
+	reg &= ~BM_ANADIG_PLL_SYS_BYPASS;
+	writel(reg, &imx_ccm->analog_pll_enet);
+	reg |= BM_ANADIG_PLL_ENET_ENABLE_SATA;
+	writel(reg, &imx_ccm->analog_pll_enet);
+
+	return 0 ;
+}
+
 unsigned int mxc_get_clock(enum mxc_clock clk)
 {
 	switch (clk) {
diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h
index 613809b..b91d8bf 100644
--- a/arch/arm/include/asm/arch-mx6/clock.h
+++ b/arch/arm/include/asm/arch-mx6/clock.h
@@ -47,5 +47,6 @@ u32 imx_get_uartclk(void);
 u32 imx_get_fecclk(void);
 unsigned int mxc_get_clock(enum mxc_clock clk);
 void enable_usboh3_clk(unsigned char enable);
+int enable_sata_clock(void);
 
 #endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 6d25c8d..e165810 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -436,5 +436,14 @@ struct anatop_regs {
 	u32	digprog;		/* 0x260 */
 };
 
+struct iomuxc_base_regs {
+	u32     gpr[14];        /* 0x000 */
+	u32     obsrv[5];       /* 0x038 */
+	u32     swmux_ctl[197]; /* 0x04c */
+	u32     swpad_ctl[250]; /* 0x360 */
+	u32     swgrp[26];      /* 0x748 */
+	u32     daisy[104];     /* 0x7b0..94c */
+};
+
 #endif /* __ASSEMBLER__*/
 #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-mx6/iomux-v3.h b/arch/arm/include/asm/arch-mx6/iomux-v3.h
index 4558f4f..788b413 100644
--- a/arch/arm/include/asm/arch-mx6/iomux-v3.h
+++ b/arch/arm/include/asm/arch-mx6/iomux-v3.h
@@ -100,4 +100,115 @@ typedef u64 iomux_v3_cfg_t;
 int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
 int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count);
 
+/*
+ * IOMUXC_GPR13 bit fields
+ */
+#define IOMUXC_GPR13_SDMA_STOP_REQ	(1<<30)
+#define IOMUXC_GPR13_CAN2_STOP_REQ	(1<<29)
+#define IOMUXC_GPR13_CAN1_STOP_REQ	(1<<28)
+#define IOMUXC_GPR13_ENET_STOP_REQ	(1<<27)
+#define IOMUXC_GPR13_SATA_PHY_8_MASK	(7<<24)
+#define IOMUXC_GPR13_SATA_PHY_7_MASK	(0x1f<<19)
+#define IOMUXC_GPR13_SATA_PHY_6_SHIFT	16
+#define IOMUXC_GPR13_SATA_PHY_6_MASK	(7<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+#define IOMUXC_GPR13_SATA_SPEED_MASK	(1<<15)
+#define IOMUXC_GPR13_SATA_PHY_5_MASK	(1<<14)
+#define IOMUXC_GPR13_SATA_PHY_4_MASK	(7<<11)
+#define IOMUXC_GPR13_SATA_PHY_3_MASK	(0x1f<<7)
+#define IOMUXC_GPR13_SATA_PHY_2_MASK	(0x1f<<2)
+#define IOMUXC_GPR13_SATA_PHY_1_MASK	(3<<0)
+
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_0P5DB	(0b000<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P0DB	(0b001<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P5DB	(0b010<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P0DB	(0b011<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P5DB	(0b100<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB	(0b101<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P5DB	(0b110<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_4P0DB	(0b111<<24)
+
+#define IOMUXC_GPR13_SATA_PHY_7_SATA1I	(0b10000<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA1M	(0b10000<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA1X	(0b11010<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA2I	(0b10010<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA2M	(0b10010<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA2X	(0b11010<<19)
+
+#define IOMUXC_GPR13_SATA_SPEED_1P5G	(0<<15)
+#define IOMUXC_GPR13_SATA_SPEED_3G	(1<<15)
+
+#define IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED	(0<<14)
+#define IOMUXC_GPR13_SATA_SATA_PHY_5_SS_ENABLED		(1<<14)
+
+#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_16_16	(0<<11)
+#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_14_16	(1<<11)
+#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_12_16	(2<<11)
+#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_10_16	(3<<11)
+#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16		(4<<11)
+#define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_8_16		(5<<11)
+
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB	(0b0000<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P37_DB	(0b0001<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P74_DB	(0b0010<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P11_DB	(0b0011<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P48_DB	(0b0100<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P85_DB	(0b0101<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P22_DB	(0b0110<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P59_DB	(0b0111<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P96_DB	(0b1000<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P33_DB	(0b1001<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P70_DB	(0b1010<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P07_DB	(0b1011<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P44_DB	(0b1100<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P81_DB	(0b1101<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P28_DB	(0b1110<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P75_DB	(0b1111<<7)
+
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P937V	(0b00000<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P947V	(0b00001<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P957V	(0b00010<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P966V	(0b00011<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P976V	(0b00100<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P986V	(0b00101<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P996V	(0b00110<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P005V	(0b00111<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P015V	(0b01000<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P025V	(0b01001<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P035V	(0b01010<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P045V	(0b01011<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P054V	(0b01100<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P064V	(0b01101<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P074V	(0b01110<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P084V	(0b01111<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P094V	(0b10000<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P104V	(0b10001<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P113V	(0b10010<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P123V	(0b10011<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P133V	(0b10100<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P143V	(0b10101<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P152V	(0b10110<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P162V	(0b10111<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P172V	(0b11000<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P182V	(0b11001<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P191V	(0b11010<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P201V	(0b11011<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P211V	(0b11100<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P221V	(0b11101<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P230V	(0b11110<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P240V	(0b11111<<2)
+
+#define IOMUXC_GPR13_SATA_PHY_1_FAST	0
+#define IOMUXC_GPR13_SATA_PHY_1_MEDIUM	1
+#define IOMUXC_GPR13_SATA_PHY_1_SLOW	2
+
+#define IOMUXC_GPR13_SATA_MASK (IOMUXC_GPR13_SATA_PHY_8_MASK \
+				|IOMUXC_GPR13_SATA_PHY_7_MASK \
+				|IOMUXC_GPR13_SATA_PHY_6_MASK \
+				|IOMUXC_GPR13_SATA_SPEED_MASK \
+				|IOMUXC_GPR13_SATA_PHY_5_MASK \
+				|IOMUXC_GPR13_SATA_PHY_4_MASK \
+				|IOMUXC_GPR13_SATA_PHY_3_MASK \
+				|IOMUXC_GPR13_SATA_PHY_2_MASK \
+				|IOMUXC_GPR13_SATA_PHY_1_MASK)
+
 #endif	/* __MACH_IOMUX_V3_H__*/
-- 
1.7.9

[U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()

[Dirk Behme]

Hi Eric,

first, do you really want the "Resend" in the subject?

On 26.04.2012 01:48, Eric Nelson wrote:
> This patch requires Stefano's driver for MX5/MX6 to be useful.
> 	http://lists.denx.de/pipermail/u-boot/2012-February/118530.html
>
> This is the first and board-independent part of what's needed to enable
> SATA on an i.MX6 board as discussed in this thread:
> 	http://lists.denx.de/pipermail/u-boot/2012-March/120919.html
>
> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>
> ---
> V2 updated to return -EIO instead of -1.
>
>   arch/arm/cpu/armv7/mx6/clock.c           |   31 ++++++++
>   arch/arm/include/asm/arch-mx6/clock.h    |    1 +
>   arch/arm/include/asm/arch-mx6/imx-regs.h |    9 +++
>   arch/arm/include/asm/arch-mx6/iomux-v3.h |  111 ++++++++++++++++++++++++++++++
>   4 files changed, 152 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index ef98563..de91cac 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -303,6 +303,37 @@ u32 imx_get_fecclk(void)
>   	return decode_pll(PLL_ENET, CONFIG_SYS_MX6_HCLK);
>   }
>
> +int enable_sata_clock(void)
> +{
> +	u32 reg = 0;
> +	s32 timeout = 100000;
> +	struct imx_ccm_reg *const imx_ccm
> +		= (struct imx_ccm_reg *) CCM_BASE_ADDR;

Could you check if the file clock.c has already a global

struct imx_ccm_reg *imx_ccm = (struct imx_ccm_reg *)CCM_BASE_ADDR;

definition, so this redefinition of "struct imx_ccm_reg *const 
imx_ccm" should (must?) be removed here? See

http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/mx6/clock.c;h=ef98563ff7639a3895e5dc00acd9cc30bb3c6772;hb=HEAD#l37

Trying to compile this I had to remove this on my test branch [1].

Best regards

Dirk

[1] 
https://github.com/dirkbehme/u-boot-imx6/commit/543964ad861b8143c142df3bb0f914ef2aee7558#L0R309

[U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()

[Eric Nelson]

On 04/28/2012 07:42 AM, Dirk Behme wrote:
> Hi Eric,
>
> first, do you really want the "Resend" in the subject?
>
> On 26.04.2012 01:48, Eric Nelson wrote:
>> This patch requires Stefano's driver for MX5/MX6 to be useful.
>> http://lists.denx.de/pipermail/u-boot/2012-February/118530.html
>>
>> This is the first and board-independent part of what's needed to enable
>> SATA on an i.MX6 board as discussed in this thread:
>> http://lists.denx.de/pipermail/u-boot/2012-March/120919.html
>>
>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>>
>> ---
>> V2 updated to return -EIO instead of -1.
>>
>> arch/arm/cpu/armv7/mx6/clock.c | 31 ++++++++
>> arch/arm/include/asm/arch-mx6/clock.h | 1 +
>> arch/arm/include/asm/arch-mx6/imx-regs.h | 9 +++
>> arch/arm/include/asm/arch-mx6/iomux-v3.h | 111 ++++++++++++++++++++++++++++++
>> 4 files changed, 152 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
>> index ef98563..de91cac 100644
>> --- a/arch/arm/cpu/armv7/mx6/clock.c
>> +++ b/arch/arm/cpu/armv7/mx6/clock.c
>> @@ -303,6 +303,37 @@ u32 imx_get_fecclk(void)
>> return decode_pll(PLL_ENET, CONFIG_SYS_MX6_HCLK);
>> }
>>
>> +int enable_sata_clock(void)
>> +{
>> + u32 reg = 0;
>> + s32 timeout = 100000;
>> + struct imx_ccm_reg *const imx_ccm
>> + = (struct imx_ccm_reg *) CCM_BASE_ADDR;
>
> Could you check if the file clock.c has already a global
>
> struct imx_ccm_reg *imx_ccm = (struct imx_ccm_reg *)CCM_BASE_ADDR;
>
> definition, so this redefinition of "struct imx_ccm_reg *const imx_ccm" should
> (must?) be removed here? See
>
> http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/mx6/clock.c;h=ef98563ff7639a3895e5dc00acd9cc30bb3c6772;hb=HEAD#l37
>
> Trying to compile this I had to remove this on my test branch [1].
>

Hi Dirk,

I tried to address this global/non-const by making it explicitly public,
but Stefano nacked the patch:
	http://patchwork.ozlabs.org/patch/144712/

As it stands, the compiler won't generate an external reference for the
local above, so it should be good.

The global/writable/not published variable imx_ccm should be fixed though.
At least it should be static if it's not exposed through a header and
const so it isn't placed in the BSS segment.

I'll generate a patch later today.

Regards,


Eric

[U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()

[Stefano Babic]

On 28/04/2012 17:29, Eric Nelson wrote:

> Hi Dirk,
> 
> I tried to address this global/non-const by making it explicitly public,
> but Stefano nacked the patch:
>     http://patchwork.ozlabs.org/patch/144712/
> 
> As it stands, the compiler won't generate an external reference for the
> local above, so it should be good.

It seems ok. However, this conflicts with

	imx-common: Factor out get_ahb_clk()

sent by Fabio Estevam.

Reason is only the modified structure name : I made these changes to
your patch:

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 3255771..52d5dc4 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -296,8 +296,8 @@ int enable_sata_clock(void)
 {
        u32 reg = 0;
        s32 timeout = 100000;
-       struct imx_ccm_reg *const imx_ccm
-               = (struct imx_ccm_reg *) CCM_BASE_ADDR;
+       struct mxc_ccm_reg *const imx_ccm
+               = (struct mxc_ccm_reg *) CCM_BASE_ADDR;

        /* Enable sata clock */

Change is trivial, but please take a look.

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

-- 
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Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()

[Eric Nelson]

Hi Stefano,

On 05/06/2012 10:04 AM, Stefano Babic wrote:
> On 28/04/2012 17:29, Eric Nelson wrote:
>
>> Hi Dirk,
>>
>> I tried to address this global/non-const by making it explicitly public,
>> but Stefano nacked the patch:
>>      http://patchwork.ozlabs.org/patch/144712/
>>
>> As it stands, the compiler won't generate an external reference for the
>> local above, so it should be good.
>
> It seems ok. However, this conflicts with
>
> 	imx-common: Factor out get_ahb_clk()
>
> sent by Fabio Estevam.
>
> Reason is only the modified structure name : I made these changes to
> your patch:
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index 3255771..52d5dc4 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -296,8 +296,8 @@ int enable_sata_clock(void)
>   {
>          u32 reg = 0;
>          s32 timeout = 100000;
> -       struct imx_ccm_reg *const imx_ccm
> -               = (struct imx_ccm_reg *) CCM_BASE_ADDR;
> +       struct mxc_ccm_reg *const imx_ccm
> +               = (struct mxc_ccm_reg *) CCM_BASE_ADDR;
>
>          /* Enable sata clock */
>
> Change is trivial, but please take a look.
>

This is clearly fine, but it has me laughing because I never
remember what 'mxc' stands for.

Regards,


Eric

[U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()

[Fabio Estevam]

Hi Eric,

On Sun, May 6, 2012 at 2:42 PM, Eric Nelson
<eric.nelson@boundarydevices.com> wrote:

> This is clearly fine, but it has me laughing because I never
> remember what 'mxc' stands for.

Yes, this can cause confunsion. The 'mxc' term is frequently used in
the kernel/u-boot  and has the same meaning as 'imx'.

Regards,

Fabio Estevam

[U-Boot] [PATCH, V2] Resend: i.MX6: add enable_sata_clock()

[Eric Nelson]

On 05/06/2012 11:08 AM, Fabio Estevam wrote:
> Hi Eric,
>
> On Sun, May 6, 2012 at 2:42 PM, Eric Nelson
> <eric.nelson@boundarydevices.com>  wrote:
>
>> This is clearly fine, but it has me laughing because I never
>> remember what 'mxc' stands for.
>
> Yes, this can cause confunsion. The 'mxc' term is frequently used in
> the kernel/u-boot  and has the same meaning as 'imx'.
>

Mobile Extreme Confusion? :)