From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stefano Babic <sbabic@denx.de>
Date: Sun, 06 May 2012 18:15:18 +0200
Subject: [U-Boot] [resent] New chapter in i.MX51 datasheet an issue?
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References: <20120504120845.4f0e59ea@archvile>
Message-ID: <4FA6A396.6010201@denx.de>
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On 04/05/2012 12:08, David Jander wrote:
> 
> Hi all,
> 

Hi David,

> I discovered a bug in u-boot, that got evident after Freescale updated the
> i.MX51 datasheets to revision 5 in March this year. I don't know if it is a
> serious problem or not, but if I believe the wording of the datasheet many of
> the boards that use a i.MX51 processor and running u-boot as of latest git,
> can potentially suffer "permanent damage", whatever that means.
> 
> I am referring to the new paragraphs at the end of chapter 4.3.4 of the
> datasheet, and the wrong interpretation of the meaning of the HVE bit in the
> iomuxc.h header file of u-boot here:
> 
> arch/arm/include/asm/arch-mx5/iomux.h:
> 
> ...
>   69         PAD_CTL_DRV_VOT_LOW = 0x0 << 13, /* Low voltage mode */
>   70         PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,/* High voltage mode */
> ...
> 

Agree. The header defines the bit wrongly.

It seems to me that the Reference Manual is correct. It is from
24/2/2010 and it was not updated.

After a reset, value is set to 1, and this means low-voltage for the
most pins.

> According to the reference manual, the correct meaning of this bit is negated:
> 
> "Bit 13:
> High / Low Output Voltage Range. This bit selects the output voltage mode for
> SD2_CMD. 0 High output voltage mode
> 1 Low output voltage mode"
> 
> Added to the new paragraph in the datasheet:
> 
> "The UHVIO type of I/O cells have to be configured properly according to their
> supply voltage level, in order to prevent permanent damage to them and in
> order to not degrade their timing performance."
> 
> Seems like we may have a problem here!
> 
> I would like to know if anyone is aware of this? Does anyone know of a board
> that is actually destroyed this way?

At the moment, we have no problems and I can explain why. The only
boards setting these pins (for SD card) are mx51evk and vision2. Both
are setting PAD_CTL_DRV_VOT_HIGH, and because the define is wrong, they
are really setting the pin to low output voltage mode.

For other boards and other pins, voltage is not explicitely set : this
means they work in low voltage mode after a reset.

To fix arch/arm/include/asm/arch-mx5/iomux.h and synchronize it with the
documentation, we need also to change mx51evk / vision2, setting the
pins to PAD_CTL_DRV_VOT_LOW, and they will work as now.

We can also drop completely PAD_CTL_DRV_VOT_HIGH from these two boards
and use the reset value.

Best regards,
Stefano Babic

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