[U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings

[U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings

[Eric Nelson]

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
---
V2 has been stripped of the board-independent changes and
uses clrsetbits_le32() instead of twiddling bits by hand.

V3 returns immediately from setup_sata() if enable_sata_clock()
returns an error.

V4 removes extra #include and addresses a style issue as discussed
on the ML.

 board/freescale/mx6qsabrelite/mx6qsabrelite.c |   31 +++++++++++++++++++++++++
 include/configs/mx6qsabrelite.h               |   13 ++++++++++
 2 files changed, 44 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 1d09a72..cdd2f15 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -25,6 +25,7 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx6x_pins.h>
 #include <asm/arch/iomux-v3.h>
+#include <asm/arch/clock.h>
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <mmc.h>
@@ -267,6 +268,32 @@ int board_eth_init(bd_t *bis)
 	return 0;
 }
 
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+	struct iomuxc_base_regs *const iomuxc_regs
+		= (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
+	int ret = enable_sata_clock();
+	if (ret)
+		return ret;
+
+	clrsetbits_le32(&iomuxc_regs->gpr[13],
+			IOMUXC_GPR13_SATA_MASK,
+			IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+			|IOMUXC_GPR13_SATA_PHY_7_SATA2M
+			|IOMUXC_GPR13_SATA_SPEED_3G
+			|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+			|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+			|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+			|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+			|IOMUXC_GPR13_SATA_PHY_1_SLOW);
+
+	return 0 ;
+}
+#endif
+
 int board_early_init_f(void)
 {
        setup_iomux_uart();
@@ -283,6 +310,10 @@ int board_init(void)
 	setup_spi();
 #endif
 
+#ifdef CONFIG_CMD_SATA
+	setup_sata();
+#endif
+
        return 0;
 }
 
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index f52c3c7..1d92dd0 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -71,6 +71,19 @@
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 
+#define CONFIG_CMD_SATA
+/*
+ * SATA Configs
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE	1
+#define CONFIG_DWC_AHSATA_PORT_ID	0
+#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII
-- 
1.7.9

[U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings

[Marek Vasut]

Dear Eric Nelson,

> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
> ---
> V2 has been stripped of the board-independent changes and
> uses clrsetbits_le32() instead of twiddling bits by hand.
> 
> V3 returns immediately from setup_sata() if enable_sata_clock()
> returns an error.
> 
> V4 removes extra #include and addresses a style issue as discussed
> on the ML.

It's still there ;-)
> 
>  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   31
> +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h               | 
>  13 ++++++++++
>  2 files changed, 44 insertions(+), 0 deletions(-)
> 
> diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 1d09a72..cdd2f15
> 100644
> --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> @@ -25,6 +25,7 @@
>  #include <asm/arch/imx-regs.h>
>  #include <asm/arch/mx6x_pins.h>
>  #include <asm/arch/iomux-v3.h>
> +#include <asm/arch/clock.h>
>  #include <asm/errno.h>
>  #include <asm/gpio.h>
>  #include <mmc.h>
> @@ -267,6 +268,32 @@ int board_eth_init(bd_t *bis)
>  	return 0;
>  }
> 
> +#ifdef CONFIG_CMD_SATA
> +
> +int setup_sata(void)
> +{
> +	struct iomuxc_base_regs *const iomuxc_regs
> +		= (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
> +	int ret = enable_sata_clock();
> +	if (ret)
> +		return ret;
> +
> +	clrsetbits_le32(&iomuxc_regs->gpr[13],
> +			IOMUXC_GPR13_SATA_MASK,
> +			IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
> +			|IOMUXC_GPR13_SATA_PHY_7_SATA2M
> +			|IOMUXC_GPR13_SATA_SPEED_3G
> +			|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
> +			|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
> +			|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
> +			|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
> +			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
> +			|IOMUXC_GPR13_SATA_PHY_1_SLOW);
> +



> +	return 0 ; <---- here :-)



> +}
> +#endif
> +
>  int board_early_init_f(void)
>  {
>         setup_iomux_uart();
> @@ -283,6 +310,10 @@ int board_init(void)
>  	setup_spi();
>  #endif
> 
> +#ifdef CONFIG_CMD_SATA
> +	setup_sata();
> +#endif
> +
>         return 0;
>  }
> 
> diff --git a/include/configs/mx6qsabrelite.h
> b/include/configs/mx6qsabrelite.h index f52c3c7..1d92dd0 100644
> --- a/include/configs/mx6qsabrelite.h
> +++ b/include/configs/mx6qsabrelite.h
> @@ -71,6 +71,19 @@
>  #define CONFIG_CMD_FAT
>  #define CONFIG_DOS_PARTITION
> 
> +#define CONFIG_CMD_SATA
> +/*
> + * SATA Configs
> + */
> +#ifdef CONFIG_CMD_SATA
> +#define CONFIG_DWC_AHSATA
> +#define CONFIG_SYS_SATA_MAX_DEVICE	1
> +#define CONFIG_DWC_AHSATA_PORT_ID	0
> +#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
> +#define CONFIG_LBA48
> +#define CONFIG_LIBATA
> +#endif
> +
>  #define CONFIG_CMD_PING
>  #define CONFIG_CMD_DHCP
>  #define CONFIG_CMD_MII

[U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings

[Eric Nelson]

On 05/01/2012 12:25 PM, Marek Vasut wrote:
> Dear Eric Nelson,
>
>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>> ---
>> V2 has been stripped of the board-independent changes and
>> uses clrsetbits_le32() instead of twiddling bits by hand.
>>
>> V3 returns immediately from setup_sata() if enable_sata_clock()
>> returns an error.
>>
>> V4 removes extra #include and addresses a style issue as discussed
>> on the ML.
>
> It's still there ;-)
 >>
 >> <snip>
 >>
>> +			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
>> +			|IOMUXC_GPR13_SATA_PHY_1_SLOW);
>> +
>
>> +	return 0 ;<---- here :-)
>

My eyes are clearly not as finely tuned as yours...

<thought to self>
What are the odd that I could tweak checkpatch.pl
without introducing another style issue?
</thought to self>

V5 forthcoming...

[U-Boot] [PATCH V5] i.MX6: mx6q_sabrelite: add SATA bindings

[Eric Nelson]

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
---
V2 has been stripped of the board-independent changes and
uses clrsetbits_le32() instead of twiddling bits by hand.

V3 returns immediately from setup_sata() if enable_sata_clock()
returns an error.

V4 removes extra #include and addresses a style issue as discussed
on the ML.

V5 addresses another (hopefully last) style issue.

 board/freescale/mx6qsabrelite/mx6qsabrelite.c |   31 +++++++++++++++++++++++++
 include/configs/mx6qsabrelite.h               |   13 ++++++++++
 2 files changed, 44 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 1d09a72..cdd2f15 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -25,6 +25,7 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx6x_pins.h>
 #include <asm/arch/iomux-v3.h>
+#include <asm/arch/clock.h>
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <mmc.h>
@@ -267,6 +268,32 @@ int board_eth_init(bd_t *bis)
 	return 0;
 }
 
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+	struct iomuxc_base_regs *const iomuxc_regs
+		= (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
+	int ret = enable_sata_clock();
+	if (ret)
+		return ret;
+
+	clrsetbits_le32(&iomuxc_regs->gpr[13],
+			IOMUXC_GPR13_SATA_MASK,
+			IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+			|IOMUXC_GPR13_SATA_PHY_7_SATA2M
+			|IOMUXC_GPR13_SATA_SPEED_3G
+			|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+			|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+			|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+			|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+			|IOMUXC_GPR13_SATA_PHY_1_SLOW);
+
+	return 0;
+}
+#endif
+
 int board_early_init_f(void)
 {
        setup_iomux_uart();
@@ -283,6 +310,10 @@ int board_init(void)
 	setup_spi();
 #endif
 
+#ifdef CONFIG_CMD_SATA
+	setup_sata();
+#endif
+
        return 0;
 }
 
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index f52c3c7..1d92dd0 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -71,6 +71,19 @@
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 
+#define CONFIG_CMD_SATA
+/*
+ * SATA Configs
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE	1
+#define CONFIG_DWC_AHSATA_PORT_ID	0
+#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII
-- 
1.7.9

[U-Boot] [PATCH V5] i.MX6: mx6q_sabrelite: add SATA bindings

[Marek Vasut]

Dear Eric Nelson,

> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
> ---
> V2 has been stripped of the board-independent changes and
> uses clrsetbits_le32() instead of twiddling bits by hand.
> 
> V3 returns immediately from setup_sata() if enable_sata_clock()
> returns an error.
> 
> V4 removes extra #include and addresses a style issue as discussed
> on the ML.
> 
> V5 addresses another (hopefully last) style issue.

Sorry for torturing you so much :-)

Acked-by: Marek Vasut <marex@denx.de>

> 
>  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   31
> +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h               | 
>  13 ++++++++++
>  2 files changed, 44 insertions(+), 0 deletions(-)
> 
> diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 1d09a72..cdd2f15
> 100644
> --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> @@ -25,6 +25,7 @@
>  #include <asm/arch/imx-regs.h>
>  #include <asm/arch/mx6x_pins.h>
>  #include <asm/arch/iomux-v3.h>
> +#include <asm/arch/clock.h>
>  #include <asm/errno.h>
>  #include <asm/gpio.h>
>  #include <mmc.h>
> @@ -267,6 +268,32 @@ int board_eth_init(bd_t *bis)
>  	return 0;
>  }
> 
> +#ifdef CONFIG_CMD_SATA
> +
> +int setup_sata(void)
> +{
> +	struct iomuxc_base_regs *const iomuxc_regs
> +		= (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
> +	int ret = enable_sata_clock();
> +	if (ret)
> +		return ret;
> +
> +	clrsetbits_le32(&iomuxc_regs->gpr[13],
> +			IOMUXC_GPR13_SATA_MASK,
> +			IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
> +			|IOMUXC_GPR13_SATA_PHY_7_SATA2M
> +			|IOMUXC_GPR13_SATA_SPEED_3G
> +			|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
> +			|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
> +			|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
> +			|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
> +			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
> +			|IOMUXC_GPR13_SATA_PHY_1_SLOW);
> +
> +	return 0;
> +}
> +#endif
> +
>  int board_early_init_f(void)
>  {
>         setup_iomux_uart();
> @@ -283,6 +310,10 @@ int board_init(void)
>  	setup_spi();
>  #endif
> 
> +#ifdef CONFIG_CMD_SATA
> +	setup_sata();
> +#endif
> +
>         return 0;
>  }
> 
> diff --git a/include/configs/mx6qsabrelite.h
> b/include/configs/mx6qsabrelite.h index f52c3c7..1d92dd0 100644
> --- a/include/configs/mx6qsabrelite.h
> +++ b/include/configs/mx6qsabrelite.h
> @@ -71,6 +71,19 @@
>  #define CONFIG_CMD_FAT
>  #define CONFIG_DOS_PARTITION
> 
> +#define CONFIG_CMD_SATA
> +/*
> + * SATA Configs
> + */
> +#ifdef CONFIG_CMD_SATA
> +#define CONFIG_DWC_AHSATA
> +#define CONFIG_SYS_SATA_MAX_DEVICE	1
> +#define CONFIG_DWC_AHSATA_PORT_ID	0
> +#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
> +#define CONFIG_LBA48
> +#define CONFIG_LIBATA
> +#endif
> +
>  #define CONFIG_CMD_PING
>  #define CONFIG_CMD_DHCP
>  #define CONFIG_CMD_MII

[U-Boot] [PATCH V5] i.MX6: mx6q_sabrelite: add SATA bindings

[Eric Nelson]

On 05/01/2012 01:09 PM, Marek Vasut wrote:
> Dear Eric Nelson,
>
>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>> ---
>> V2 has been stripped of the board-independent changes and
>> uses clrsetbits_le32() instead of twiddling bits by hand.
>>
>> V3 returns immediately from setup_sata() if enable_sata_clock()
>> returns an error.
>>
>> V4 removes extra #include and addresses a style issue as discussed
>> on the ML.
>>
>> V5 addresses another (hopefully last) style issue.
>
> Sorry for torturing you so much :-)
>

No worries. I think I have a high threshold...

> Acked-by: Marek Vasut<marex@denx.de>
>

Thanks for the ack.

[U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings

[Marek Vasut]

Dear Eric Nelson,

> On 05/01/2012 12:25 PM, Marek Vasut wrote:
> > Dear Eric Nelson,
> > 
> >> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
> >> ---
> >> V2 has been stripped of the board-independent changes and
> >> uses clrsetbits_le32() instead of twiddling bits by hand.
> >> 
> >> V3 returns immediately from setup_sata() if enable_sata_clock()
> >> returns an error.
> >> 
> >> V4 removes extra #include and addresses a style issue as discussed
> >> on the ML.
> > 
> > It's still there ;-)
> > 
>  >> <snip>
> >> 
> >> +			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
> >> +			|IOMUXC_GPR13_SATA_PHY_1_SLOW);
> >> +
> >> 
> >> +	return 0 ;<---- here :-)
> 
> My eyes are clearly not as finely tuned as yours...

1 dioptry on left eye, lazy-eye blindness on the right one ;-)

> <thought to self>
> What are the odd that I could tweak checkpatch.pl
> without introducing another style issue?
> </thought to self>

That'd be awesome.

> V5 forthcoming...

Thanks :)

Best regards,
Marek Vasut

[U-Boot] [PATCH V4] i.MX6: mx6q_sabrelite: add SATA bindings

[Eric Nelson]

On 05/01/2012 02:11 PM, Marek Vasut wrote:
> Dear Eric Nelson,
>
>> On 05/01/2012 12:25 PM, Marek Vasut wrote:
>>> Dear Eric Nelson,
>>>
>>>> Signed-off-by: Eric Nelson<eric.nelson@boundarydevices.com>
>>>> ---
>>>> V2 has been stripped of the board-independent changes and
>>>> uses clrsetbits_le32() instead of twiddling bits by hand.
>>>>
>>>> V3 returns immediately from setup_sata() if enable_sata_clock()
>>>> returns an error.
>>>>
>>>> V4 removes extra #include and addresses a style issue as discussed
>>>> on the ML.
>>>
>>> It's still there ;-)
>>>
>>   >>  <snip>
>>>>
>>>> +			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
>>>> +			|IOMUXC_GPR13_SATA_PHY_1_SLOW);
>>>> +
>>>>
>>>> +	return 0 ;<---- here :-)
>>
>> My eyes are clearly not as finely tuned as yours...
>
> 1 dioptry on left eye, lazy-eye blindness on the right one ;-)
>

For all that, you seem to see quite well!

>> <thought to self>
>> What are the odd that I could tweak checkpatch.pl
>> without introducing another style issue?
>> </thought to self>
>
> That'd be awesome.
>

Forthcoming...

[U-Boot] [PATCH V5] i.MX6: mx6q_sabrelite: add SATA bindings

[Stefano Babic]

On 01/05/2012 21:55, Eric Nelson wrote:
> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
> ---
> V2 has been stripped of the board-independent changes and
> uses clrsetbits_le32() instead of twiddling bits by hand.
> 
> V3 returns immediately from setup_sata() if enable_sata_clock()
> returns an error.
> 
> V4 removes extra #include and addresses a style issue as discussed
> on the ML.
> 
> V5 addresses another (hopefully last) style issue.
> 
>  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   31 +++++++++++++++++++++++++
>  include/configs/mx6qsabrelite.h               |   13 ++++++++++
>  2 files changed, 44 insertions(+), 0 deletions(-)
> 
> diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> index 1d09a72..cdd2f15 100644
> --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> @@ -25,6 +25,7 @@
>  #include <asm/arch/imx-regs.h>
>  #include <asm/arch/mx6x_pins.h>
>  #include <asm/arch/iomux-v3.h>
> +#include <asm/arch/clock.h>
>  #include <asm/errno.h>
>  #include <asm/gpio.h>
>  #include <mmc.h>
> @@ -267,6 +268,32 @@ int board_eth_init(bd_t *bis)
>  	return 0;
>  }
>  
> +#ifdef CONFIG_CMD_SATA
> +
> +int setup_sata(void)
> +{
> +	struct iomuxc_base_regs *const iomuxc_regs
> +		= (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
> +	int ret = enable_sata_clock();
> +	if (ret)
> +		return ret;
> +
> +	clrsetbits_le32(&iomuxc_regs->gpr[13],
> +			IOMUXC_GPR13_SATA_MASK,
> +			IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
> +			|IOMUXC_GPR13_SATA_PHY_7_SATA2M
> +			|IOMUXC_GPR13_SATA_SPEED_3G
> +			|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
> +			|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
> +			|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
> +			|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
> +			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
> +			|IOMUXC_GPR13_SATA_PHY_1_SLOW);
> +
> +	return 0;
> +}
> +#endif
> +
>  int board_early_init_f(void)
>  {
>         setup_iomux_uart();
> @@ -283,6 +310,10 @@ int board_init(void)
>  	setup_spi();
>  #endif
>  
> +#ifdef CONFIG_CMD_SATA
> +	setup_sata();
> +#endif
> +
>         return 0;
>  }
>  
> diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
> index f52c3c7..1d92dd0 100644
> --- a/include/configs/mx6qsabrelite.h
> +++ b/include/configs/mx6qsabrelite.h
> @@ -71,6 +71,19 @@
>  #define CONFIG_CMD_FAT
>  #define CONFIG_DOS_PARTITION
>  
> +#define CONFIG_CMD_SATA
> +/*
> + * SATA Configs
> + */
> +#ifdef CONFIG_CMD_SATA
> +#define CONFIG_DWC_AHSATA
> +#define CONFIG_SYS_SATA_MAX_DEVICE	1
> +#define CONFIG_DWC_AHSATA_PORT_ID	0
> +#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
> +#define CONFIG_LBA48
> +#define CONFIG_LIBATA
> +#endif
> +
>  #define CONFIG_CMD_PING
>  #define CONFIG_CMD_DHCP
>  #define CONFIG_CMD_MII

Acked-by: stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

-- 
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DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
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[U-Boot] [PATCH V5] i.MX6: mx6q_sabrelite: add SATA bindings

[Stefano Babic]

On 01/05/2012 21:55, Eric Nelson wrote:
> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
> ---
> V2 has been stripped of the board-independent changes and
> uses clrsetbits_le32() instead of twiddling bits by hand.
> 
> V3 returns immediately from setup_sata() if enable_sata_clock()
> returns an error.
> 
> V4 removes extra #include and addresses a style issue as discussed
> on the ML.
> 
> V5 addresses another (hopefully last) style issue.
> 

Hi Eric,

applied after rebasing on current u-boot-imx.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================