* [U-Boot] [PATCH 2/2] tegra: Whistler board support
2012-05-14 23:13 [U-Boot] [PATCH 1/2] tegra: add alternate UART1 funcmux entry Stephen Warren
@ 2012-05-14 23:13 ` Stephen Warren
2012-05-15 15:07 ` [U-Boot] [PATCH 1/2] tegra: add alternate UART1 funcmux entry Lucas Stach
2012-05-22 0:47 ` Simon Glass
2 siblings, 0 replies; 6+ messages in thread
From: Stephen Warren @ 2012-05-14 23:13 UTC (permalink / raw)
To: u-boot
From: Stephen Warren <swarren@nvidia.com>
Whistler is a highly configurable Tegra evaluation and development board.
This change adds support for the following specific configuration:
E1120 motherboard
E1108 CPU board
E1116 PMU board
The motherboard configuration switches are set as follows:
SW1=0 SW2=0 SW3=5
S1/S2/S3/S4 all on, except S3 7/8 are off.
Other combinations of daugher boards may work to varying degrees, but will
likely require some SW adjustment.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
MAINTAINERS | 1 +
board/nvidia/dts/tegra2-whistler.dts | 67 ++++++++++++++++++++
board/nvidia/whistler/Makefile | 48 ++++++++++++++
board/nvidia/whistler/whistler.c | 115 ++++++++++++++++++++++++++++++++++
boards.cfg | 1 +
include/configs/whistler.h | 90 ++++++++++++++++++++++++++
6 files changed, 322 insertions(+), 0 deletions(-)
create mode 100644 board/nvidia/dts/tegra2-whistler.dts
create mode 100644 board/nvidia/whistler/Makefile
create mode 100644 board/nvidia/whistler/whistler.c
create mode 100644 include/configs/whistler.h
diff --git a/MAINTAINERS b/MAINTAINERS
index a16ead0..563b4ec 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -912,6 +912,7 @@ Stephen Warren <swarren@nvidia.com>
ventana Tegra2 (ARM7 & A9 Dual Core)
paz00 Tegra2 (ARM7 & A9 Dual Core)
+ whistler Tegra2 (ARM7 & A9 Dual Core)
Thomas Weber <weber@corscience.de>
diff --git a/board/nvidia/dts/tegra2-whistler.dts b/board/nvidia/dts/tegra2-whistler.dts
new file mode 100644
index 0000000..b22d407
--- /dev/null
+++ b/board/nvidia/dts/tegra2-whistler.dts
@@ -0,0 +1,67 @@
+/dts-v1/;
+
+/include/ ARCH_CPU_DTS
+
+/ {
+ model = "NVIDIA Tegra2 Whistler evaluation board";
+ compatible = "nvidia,whistler", "nvidia,tegra20";
+
+ aliases {
+ i2c0 = "/i2c at 7000d000";
+ usb0 = "/usb at c5008000";
+ usb1 = "/usb at c5000000";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = < 0x00000000 0x20000000 >;
+ };
+
+ clocks {
+ osc {
+ clock-frequency = <12000000>;
+ };
+ };
+
+ clock at 60006000 {
+ clocks = <&clk_32k &osc>;
+ };
+
+ serial at 70006000 {
+ clock-frequency = < 216000000 >;
+ };
+
+ i2c at 7000c000 {
+ status = "disabled";
+ };
+
+ i2c at 7000c400 {
+ status = "disabled";
+ };
+
+ i2c at 7000c500 {
+ status = "disabled";
+ };
+
+ i2c at 7000d000 {
+ clock-frequency = <100000>;
+
+ pmic at 3c {
+ compatible = "maxim,max8907b";
+ reg = <0x3c>;
+
+ clk_32k: clock {
+ compatible = "fixed-clock";
+ /*
+ * leave out for now due to CPP:
+ * #clock-cells = <0>;
+ */
+ clock-frequency = <32768>;
+ };
+ };
+ };
+
+ usb at c5004000 {
+ status = "disabled";
+ };
+};
diff --git a/board/nvidia/whistler/Makefile b/board/nvidia/whistler/Makefile
new file mode 100644
index 0000000..a910577
--- /dev/null
+++ b/board/nvidia/whistler/Makefile
@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2010-2012
+# NVIDIA Corporation <www.nvidia.com>
+#
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../common)
+endif
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS := $(BOARD).o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c
new file mode 100644
index 0000000..c0e6127
--- /dev/null
+++ b/board/nvidia/whistler/whistler.c
@@ -0,0 +1,115 @@
+/*
+ * (C) Copyright 2010-2012
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/tegra2.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/funcmux.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/mmc.h>
+#include <asm/gpio.h>
+#ifdef CONFIG_TEGRA2_MMC
+#include <mmc.h>
+#endif
+
+/*
+ * Routine: gpio_config_uart
+ * Description: Does nothing on Whistler - no UART-related GPIOs.
+ */
+void gpio_config_uart(void)
+{
+}
+
+/*
+ * Routine: pin_mux_mmc
+ * Description: setup the pin muxes/tristate values for the SDMMC(s)
+ */
+static void pin_mux_mmc(void)
+{
+ funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_SLXA_8BIT);
+ funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATC_ATD_8BIT);
+}
+
+/* this is a weak define that we are overriding */
+int board_mmc_init(bd_t *bd)
+{
+ uchar val;
+ int ret;
+
+ debug("board_mmc_init called\n");
+
+ /* Turn on MAX8907B LDO12 to 2.8V for J40 power */
+ ret = i2c_set_bus_num(0);
+ if (ret)
+ printf("i2c_set_bus_num failed: %d\n", ret);
+ val = 0x29;
+ ret = i2c_write(0x3c, 0x46, 1, &val, 1);
+ if (ret)
+ printf("i2c_write 0 0x3c 0x46 failed: %d\n", ret);
+ val = 0x00;
+ ret = i2c_write(0x3c, 0x45, 1, &val, 1);
+ if (ret)
+ printf("i2c_write 0 0x3c 0x45 failed: %d\n", ret);
+ val = 0x1f;
+ ret = i2c_write(0x3c, 0x44, 1, &val, 1);
+ if (ret)
+ printf("i2c_write 0 0x3c 0x44 failed: %d\n", ret);
+
+ /* Enable muxes, etc. for SDMMC controllers */
+ pin_mux_mmc();
+
+ /* init dev 0 (SDMMC4), (J29 "HSMMC") with 8-bit bus */
+ tegra2_mmc_init(0, 8, -1, -1);
+
+ /* init dev 1 (SDMMC3), (J40 "SDIO3") with 8-bit bus */
+ tegra2_mmc_init(1, 8, -1, -1);
+
+ return 0;
+}
+
+/* this is a weak define that we are overriding */
+void pin_mux_usb(void)
+{
+ uchar val;
+ int ret;
+
+ /*
+ * This is a hack. This should be represented in DT using the
+ * vbus-gpio property. However, U-Boot's DT support doesn't
+ * support any GPIO controller other than the Tegra's yet.
+ */
+
+ /* Turn on TAC6416's GPIO 0+1 for USB1/3's VBUS */
+ ret = i2c_set_bus_num(0);
+ if (ret)
+ printf("i2c_set_bus_num failed: %d\n", ret);
+ val = 0x03;
+ ret = i2c_write(0x20, 2, 1, &val, 1);
+ if (ret)
+ printf("i2c_write 0 0x20 2 failed: %d\n", ret);
+ val = 0xfc;
+ ret = i2c_write(0x20, 6, 1, &val, 1);
+ if (ret)
+ printf("i2c_write 0 0x20 6 failed: %d\n", ret);
+}
diff --git a/boards.cfg b/boards.cfg
index ce1f1d4..03982f6 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -230,6 +230,7 @@ trats arm armv7 trats samsung
harmony arm armv7 harmony nvidia tegra2
seaboard arm armv7 seaboard nvidia tegra2
ventana arm armv7 ventana nvidia tegra2
+whistler arm armv7 whistler nvidia tegra2
u8500_href arm armv7 u8500 st-ericsson u8500
actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2
actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB
diff --git a/include/configs/whistler.h b/include/configs/whistler.h
new file mode 100644
index 0000000..6b9ef98
--- /dev/null
+++ b/include/configs/whistler.h
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright 2010-2012
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/sizes.h>
+#include "tegra2-common.h"
+
+/* Enable fdt support for Whistler. Flash the image in u-boot-dtb.bin */
+#define CONFIG_DEFAULT_DEVICE_TREE tegra2-whistler
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+
+/* High-level configuration options */
+#define TEGRA2_SYSMEM "mem=512M at 0M"
+#define V_PROMPT "Tegra2 (Whistler) # "
+#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Whistler"
+
+/* Board-specific serial config */
+#define CONFIG_SERIAL_MULTI
+#define CONFIG_TEGRA2_ENABLE_UARTA
+#define CONFIG_TEGRA2_UARTA_UAA_UAB
+#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
+
+#define CONFIG_MACH_TYPE MACH_TYPE_WHISTLER
+#define CONFIG_SYS_BOARD_ODMDATA 0x2B080105 /* lp?, 512MB, UARTA */
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/* I2C */
+#define CONFIG_TEGRA_I2C
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_MAX_I2C_BUS 4
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_CMD_I2C
+
+/* SD/MMC */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_TEGRA2_MMC
+#define CONFIG_CMD_MMC
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
+/* Environment not stored */
+#define CONFIG_ENV_IS_NOWHERE
+
+/* USB Host support */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_ASIX
+
+#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
+#define CONFIG_CMD_NFS /* NFS support */
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+
+#endif /* __CONFIG_H */
--
1.7.0.4
^ permalink raw reply related [flat|nested] 6+ messages in thread* [U-Boot] [PATCH 1/2] tegra: add alternate UART1 funcmux entry
2012-05-14 23:13 [U-Boot] [PATCH 1/2] tegra: add alternate UART1 funcmux entry Stephen Warren
2012-05-14 23:13 ` [U-Boot] [PATCH 2/2] tegra: Whistler board support Stephen Warren
@ 2012-05-15 15:07 ` Lucas Stach
2012-05-22 0:47 ` Simon Glass
2 siblings, 0 replies; 6+ messages in thread
From: Lucas Stach @ 2012-05-15 15:07 UTC (permalink / raw)
To: u-boot
Hello Stephen,
this patch looks reasonable. I also need to change the pingroup config
for UARTA on the Colibri T20 board and came up with a similar approach,
but I will rebase my work on top of this.
As I'm not in the position to give anything more official, I just wanted
to give this patch a public +1 to show that I'm in favour of this
change.
-- Lucas
Am Montag, den 14.05.2012, 17:13 -0600 schrieb Stephen Warren:
> From: Stephen Warren <swarren@nvidia.com>
>
> (In at least some configurations) Whistler uses UART1 on pingroups
> UAA, UAB.
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> arch/arm/cpu/armv7/tegra2/board.c | 14 +++++++++++++-
> arch/arm/cpu/armv7/tegra2/funcmux.c | 13 ++++++++++++-
> arch/arm/include/asm/arch-tegra2/funcmux.h | 1 +
> 3 files changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c
> index a50b1b9..629ad5d 100644
> --- a/arch/arm/cpu/armv7/tegra2/board.c
> +++ b/arch/arm/cpu/armv7/tegra2/board.c
> @@ -101,6 +101,18 @@ int arch_cpu_init(void)
> }
> #endif
>
> +static int uart_configs[] = {
> +#ifdef CONFIG_TEGRA2_UARTA_UAA_UAB
> + FUNCMUX_UART1_UAA_UAB,
> +#else
> + FUNCMUX_UART1_IRRX_IRTX,
> +#endif
> + FUNCMUX_UART2_IRDA,
> + -1,
> + FUNCMUX_UART4_GMC,
> + -1,
> +};
> +
> /**
> * Set up the specified uarts
> *
> @@ -120,7 +132,7 @@ static void setup_uarts(int uart_ids)
> if (uart_ids & (1 << i)) {
> enum periph_id id = id_for_uart[i];
>
> - funcmux_select(id, FUNCMUX_DEFAULT);
> + funcmux_select(id, uart_configs[i]);
> clock_ll_start_uart(id);
> }
> }
> diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra2/funcmux.c
> index 0ef7753..e2d1273 100644
> --- a/arch/arm/cpu/armv7/tegra2/funcmux.c
> +++ b/arch/arm/cpu/armv7/tegra2/funcmux.c
> @@ -31,11 +31,22 @@ int funcmux_select(enum periph_id id, int config)
>
> switch (id) {
> case PERIPH_ID_UART1:
> - if (config == FUNCMUX_UART1_IRRX_IRTX) {
> + switch (config) {
> + case FUNCMUX_UART1_IRRX_IRTX:
> pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
> pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
> pinmux_tristate_disable(PINGRP_IRRX);
> pinmux_tristate_disable(PINGRP_IRTX);
> + break;
> + case FUNCMUX_UART1_UAA_UAB:
> + pinmux_set_func(PINGRP_UAA, PMUX_FUNC_UARTA);
> + pinmux_set_func(PINGRP_UAB, PMUX_FUNC_UARTA);
> + pinmux_tristate_disable(PINGRP_UAA);
> + pinmux_tristate_disable(PINGRP_UAB);
> + bad_config = 0;
> + break;
> + }
> + if (!bad_config) {
> /*
> * Tegra appears to boot with function UARTA pre-
> * selected on mux group SDB. If two mux groups are
> diff --git a/arch/arm/include/asm/arch-tegra2/funcmux.h b/arch/arm/include/asm/arch-tegra2/funcmux.h
> index ae73c72..b455122 100644
> --- a/arch/arm/include/asm/arch-tegra2/funcmux.h
> +++ b/arch/arm/include/asm/arch-tegra2/funcmux.h
> @@ -30,6 +30,7 @@ enum {
>
> /* UART configs */
> FUNCMUX_UART1_IRRX_IRTX = 0,
> + FUNCMUX_UART1_UAA_UAB,
> FUNCMUX_UART2_IRDA = 0,
> FUNCMUX_UART4_GMC = 0,
>
^ permalink raw reply [flat|nested] 6+ messages in thread* [U-Boot] [PATCH 1/2] tegra: add alternate UART1 funcmux entry
2012-05-14 23:13 [U-Boot] [PATCH 1/2] tegra: add alternate UART1 funcmux entry Stephen Warren
2012-05-14 23:13 ` [U-Boot] [PATCH 2/2] tegra: Whistler board support Stephen Warren
2012-05-15 15:07 ` [U-Boot] [PATCH 1/2] tegra: add alternate UART1 funcmux entry Lucas Stach
@ 2012-05-22 0:47 ` Simon Glass
2012-05-22 2:49 ` Stephen Warren
2 siblings, 1 reply; 6+ messages in thread
From: Simon Glass @ 2012-05-22 0:47 UTC (permalink / raw)
To: u-boot
Hi Stephen,
On Mon, May 14, 2012 at 4:13 PM, Stephen Warren <swarren@wwwdotorg.org>wrote:
> From: Stephen Warren <swarren@nvidia.com>
>
> (In at least some configurations) Whistler uses UART1 on pingroups
> UAA, UAB.
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> arch/arm/cpu/armv7/tegra2/board.c | 14 +++++++++++++-
> arch/arm/cpu/armv7/tegra2/funcmux.c | 13 ++++++++++++-
> arch/arm/include/asm/arch-tegra2/funcmux.h | 1 +
> 3 files changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/tegra2/board.c
> b/arch/arm/cpu/armv7/tegra2/board.c
> index a50b1b9..629ad5d 100644
> --- a/arch/arm/cpu/armv7/tegra2/board.c
> +++ b/arch/arm/cpu/armv7/tegra2/board.c
> @@ -101,6 +101,18 @@ int arch_cpu_init(void)
> }
> #endif
>
> +static int uart_configs[] = {
> +#ifdef CONFIG_TEGRA2_UARTA_UAA_UAB
> + FUNCMUX_UART1_UAA_UAB,
> +#else
> + FUNCMUX_UART1_IRRX_IRTX,
> +#endif
>
We really shouldn't be using configs to deal with this. It should be a
run-time check.
I recall you saying that we could use the ODM bits for this?
> + FUNCMUX_UART2_IRDA,
> + -1,
> + FUNCMUX_UART4_GMC,
> + -1,
> +};
> +
> /**
> * Set up the specified uarts
> *
> @@ -120,7 +132,7 @@ static void setup_uarts(int uart_ids)
> if (uart_ids & (1 << i)) {
> enum periph_id id = id_for_uart[i];
>
> - funcmux_select(id, FUNCMUX_DEFAULT);
> + funcmux_select(id, uart_configs[i]);
> clock_ll_start_uart(id);
> }
> }
> diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c
> b/arch/arm/cpu/armv7/tegra2/funcmux.c
> index 0ef7753..e2d1273 100644
> --- a/arch/arm/cpu/armv7/tegra2/funcmux.c
> +++ b/arch/arm/cpu/armv7/tegra2/funcmux.c
> @@ -31,11 +31,22 @@ int funcmux_select(enum periph_id id, int config)
>
> switch (id) {
> case PERIPH_ID_UART1:
> - if (config == FUNCMUX_UART1_IRRX_IRTX) {
> + switch (config) {
> + case FUNCMUX_UART1_IRRX_IRTX:
> pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
> pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
> pinmux_tristate_disable(PINGRP_IRRX);
> pinmux_tristate_disable(PINGRP_IRTX);
> + break;
> + case FUNCMUX_UART1_UAA_UAB:
> + pinmux_set_func(PINGRP_UAA, PMUX_FUNC_UARTA);
> + pinmux_set_func(PINGRP_UAB, PMUX_FUNC_UARTA);
> + pinmux_tristate_disable(PINGRP_UAA);
> + pinmux_tristate_disable(PINGRP_UAB);
> + bad_config = 0;
> + break;
> + }
> + if (!bad_config) {
> /*
> * Tegra appears to boot with function UARTA pre-
> * selected on mux group SDB. If two mux groups are
> diff --git a/arch/arm/include/asm/arch-tegra2/funcmux.h
> b/arch/arm/include/asm/arch-tegra2/funcmux.h
> index ae73c72..b455122 100644
> --- a/arch/arm/include/asm/arch-tegra2/funcmux.h
> +++ b/arch/arm/include/asm/arch-tegra2/funcmux.h
> @@ -30,6 +30,7 @@ enum {
>
> /* UART configs */
> FUNCMUX_UART1_IRRX_IRTX = 0,
> + FUNCMUX_UART1_UAA_UAB,
> FUNCMUX_UART2_IRDA = 0,
> FUNCMUX_UART4_GMC = 0,
>
> --
> 1.7.0.4
>
>
Regards,
Simon
^ permalink raw reply [flat|nested] 6+ messages in thread