From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Thu, 14 Jun 2012 15:13:51 -0700 Subject: [U-Boot] [PATCH 0/4] USB and cache related fixes In-Reply-To: <201206150002.35316.marek.vasut@gmail.com> References: <1339700507-26700-1-git-send-email-trini@ti.com> <201206150002.35316.marek.vasut@gmail.com> Message-ID: <4FDA621F.7000206@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 06/14/2012 03:02 PM, Marek Vasut wrote: > Dear Tom Rini, > >> Hey all, >> >> In commit b8adb12 the cache flushing behavior was changed for the EHCI >> stack. This change showed a few different problems on TI platforms (where >> our cacheline size is 64 not 32). > > Good thing, it made a bug surface ;-) > >> First, the dcache_off call that >> ehci-omap had been doing was now not happening soon enough to paper over >> the cache issues. > > Hm, is the dcache_off() call implemented properly so nothing is lost when you > shut off the cache btw? As best I can tell, yes. It will do a dcache_flush_all() and then set the correct bits. -- Tom