[U-Boot] [PATCH 1/4] video: omap3_dss: add setup for LCD

[U-Boot] [PATCH 1/4] video: omap3_dss: add setup for LCD

[Stefano Babic]

Signed-off-by: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/arch-omap3/dss.h |   23 ++++++++++++++++---
 drivers/video/omap3_dss.c             |   40 ++++++++++++++++++++++++++++++++-
 2 files changed, 59 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap3/dss.h b/arch/arm/include/asm/arch-omap3/dss.h
index 4c56e5e..911cc9a 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -60,6 +60,17 @@ struct dispc_regs {
 	u32 global_alpha;			/* 0x74 */
 	u32 size_dig;				/* 0x78 */
 	u32 size_lcd;				/* 0x7C */
+	u32 gfx_base[2];
+	u32 gfx_position;			/* 0x88 */
+	u32 gfx_size;				/* 0x8C */
+	u32 reserved_3[4];			/* 0x90 */
+	u32 gfx_attributes;			/* 0xA0 */
+	u32 gfx_fifo_threshold;			/* 0xA4 */
+	u32 gfx_fifo_size_status;		/* 0xA8 */
+	u32 gfx_row_inc;			/* 0xAC */
+	u32 gfx_pixel_inc;			/* 0xB0 */
+	u32 gfx_window_skip;			/* 0xB4 */
+	u32 gfx_table_ba;			/* 0xB8 */
 };
 
 /* VENC Registers */
@@ -120,6 +131,7 @@ struct venc_regs {
 
 /* Few Register Offsets */
 #define FRAME_MODE_SHIFT			1
+#define FUNC_GATED_SHIFT			9
 #define TFTSTN_SHIFT				3
 #define DATALINES_SHIFT				8
 
@@ -132,13 +144,16 @@ struct venc_regs {
 #define GP_OUT1					(1 << 16)
 
 #define DISPC_ENABLE				(LCD_ENABLE | \
-						 DIG_ENABLE | \
 						 GO_LCD | \
-						 GO_DIG | \
 						 GP_OUT0| \
 						 GP_OUT1)
 
-/* Configure VENC DSS Params */
+#define DISPC_PCK_FREE_ENABLE			(1 << 27)
+
+/* Register DSS_CONTROL */
+#define DISPC_CLK_SWITCH			(1 << 0)
+#define DSI_CLK_SWITCH				(1 << 1)
+#define VENC_CLOCK_MODE				(1 << 2)
 #define VENC_CLK_ENABLE				(1 << 3)
 #define DAC_DEMEN				(1 << 4)
 #define DAC_POWERDN				(1 << 5)
@@ -148,6 +163,7 @@ struct venc_regs {
 						 DAC_DEMEN | \
 						 DAC_POWERDN | \
 						 VENC_OUT_SEL)
+
 /*
  * Panel Configuration
  */
@@ -170,5 +186,6 @@ void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 			u32 height, u32 width);
 void omap3_dss_panel_config(const struct panel_config *panel_cfg);
 void omap3_dss_enable(void);
+void omap3_dss_setfb(void *addr);
 
 #endif /* DSS_H */
diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c
index b322cc3..6e5849a 100644
--- a/drivers/video/omap3_dss.c
+++ b/drivers/video/omap3_dss.c
@@ -28,6 +28,8 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/dss.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/clocks_omap3.h>
 
 /*
  * Configure VENC for a given Mode (NTSC / PAL)
@@ -105,16 +107,43 @@ void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 {
 	struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;
+	struct dss_regs *dss = (struct dss_regs *) OMAP3_DSS_BASE;
 
 	writel(panel_cfg->timing_h, &dispc->timing_h);
 	writel(panel_cfg->timing_v, &dispc->timing_v);
 	writel(panel_cfg->pol_freq, &dispc->pol_freq);
 	writel(panel_cfg->divisor, &dispc->divisor);
 	writel(panel_cfg->lcd_size, &dispc->size_lcd);
-	writel((panel_cfg->load_mode << FRAME_MODE_SHIFT), &dispc->config);
+	writel((panel_cfg->load_mode << FRAME_MODE_SHIFT) |
+		(1 << FUNC_GATED_SHIFT),
+		&dispc->config);
 	writel(((panel_cfg->panel_type << TFTSTN_SHIFT) |
 		(panel_cfg->data_lines << DATALINES_SHIFT)), &dispc->control);
 	writel(panel_cfg->panel_color, &dispc->default_color0);
+
+	writel(panel_cfg->lcd_size, &dispc->gfx_size);
+	writel(0x91, &dispc->gfx_attributes);
+	writel(0x01, &dispc->gfx_row_inc);
+	writel(0x01, &dispc->gfx_pixel_inc);
+	writel(0x00, &dispc->gfx_window_skip);
+
+	writel(VENC_CLK_ENABLE | DAC_DEMEN,
+		&dss->control);
+
+}
+
+void omap3_dss_clock_enable(int enable)
+{
+	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+
+	if (enable) {
+		setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
+		setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
+	} else {
+		clrbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
+		clrbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
+	}
+
 }
 
 /*
@@ -129,3 +158,12 @@ void omap3_dss_enable(void)
 	l |= DISPC_ENABLE;
 	writel(l, &dispc->control);
 }
+
+void omap3_dss_setfb(void *addr)
+{
+	struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;
+
+	writel((u32)addr, &dispc->gfx_base[0]);
+	writel((u32)addr, &dispc->gfx_base[1]);
+
+}
-- 
1.7.9.5

[U-Boot] [PATCH 2/4] OMAP3: added clock definitions for OMAP3 DSS driver

[Stefano Babic]

Signed-off-by: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/arch-omap3/clocks.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-omap3/clocks.h b/arch/arm/include/asm/arch-omap3/clocks.h
index bed0002..ab7b703 100644
--- a/arch/arm/include/asm/arch-omap3/clocks.h
+++ b/arch/arm/include/asm/arch-omap3/clocks.h
@@ -36,7 +36,7 @@
 #define ICK_CORE2_ON	0x0000001f
 #define FCK_WKUP_ON	0x000000e9
 #define ICK_WKUP_ON	0x0000003f
-#define FCK_DSS_ON	0x00000005
+#define FCK_DSS_ON	0x00000007
 #define ICK_DSS_ON	0x00000001
 #define FCK_CAM_ON	0x00000001
 #define ICK_CAM_ON	0x00000001
-- 
1.7.9.5

[U-Boot] [PATCH 3/4] OMAP3: twister: add video support

[Stefano Babic]

Signed-off-by: Stefano Babic <sbabic@denx.de>
---
 board/technexion/twister/twister.c |   49 ++++++++++++++++++++++++++++++++++++
 include/configs/twister.h          |   10 ++++++++
 2 files changed, 59 insertions(+)

diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c
index b927586..c1281b9 100644
--- a/board/technexion/twister/twister.c
+++ b/board/technexion/twister/twister.c
@@ -25,12 +25,15 @@
 
 #include <common.h>
 #include <netdev.h>
+#include <malloc.h>
+#include <video_fb.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/omap_gpio.h>
 #include <asm/arch/mmc_host_def.h>
+#include <asm/arch/dss.h>
 #include <i2c.h>
 #include <asm/gpio.h>
 #ifdef CONFIG_USB_EHCI
@@ -39,8 +42,23 @@
 #endif
 #include "twister.h"
 
+#define XRES	480
+#define YRES	272
+
 DECLARE_GLOBAL_DATA_PTR;
 
+static GraphicDevice panel;
+static const struct panel_config lcd_cfg = {
+	.timing_h	= 0x01101d1b, /* Horizontal timing */
+	.timing_v	= 0x01400b02, /* Vertical timing */
+	.pol_freq	= 0x00023000, /* Pol Freq */
+	.divisor	= 0x0001000d, /* 33Mhz Pixel Clock */
+	.lcd_size	= ((YRES - 1) << 16 | (XRES - 1)),
+	.panel_type	= 0x01, /* TFT */
+	.data_lines	= 0x03, /* 24 Bit RGB */
+	.load_mode	= 0x02 /* Frame Mode */
+};
+
 /* Timing definitions for Ethernet Controller */
 static const u32 gpmc_smc911[] = {
 	NET_GPMC_CONFIG1,
@@ -135,6 +153,37 @@ int board_mmc_init(bd_t *bis)
 {
 	return omap_mmc_init(0);
 }
+
+void *video_hw_init(void)
+{
+
+	void *fb;
+	u32 size;
+
+	size = XRES * YRES * lcd_cfg.data_lines;
+	fb = malloc(size);
+	if (!fb) {
+		printf("Frame buffer not allocated\n");
+		return NULL;
+	}
+
+	panel.winSizeX = XRES;
+	panel.winSizeY = YRES;
+	panel.plnSizeX = XRES;
+	panel.plnSizeY = YRES;
+
+	panel.frameAdrs = (u32)fb;
+	panel.memSize = size;
+
+	panel.gdfBytesPP = 2;
+	panel.gdfIndex = GDF_16BIT_565RGB;
+
+	omap3_dss_panel_config(&lcd_cfg);
+	omap3_dss_enable();
+	omap3_dss_setfb(fb);
+
+	return (void *)&panel;
+}
 #endif
 
 #ifdef CONFIG_SPL_OS_BOOT
diff --git a/include/configs/twister.h b/include/configs/twister.h
index a852481..fb96f30 100644
--- a/include/configs/twister.h
+++ b/include/configs/twister.h
@@ -48,6 +48,16 @@
 #define CONFIG_SMC911X_BASE		0x2C000000
 #define CONFIG_SMC911X_NO_EEPROM
 
+#define CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_CMD_BMP
+#define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
 #define	CONFIG_EXTRA_ENV_SETTINGS	CONFIG_TAM3517_SETTINGS \
 	"bootcmd=run nandboot\0"
 
-- 
1.7.9.5

[U-Boot] [PATCH 4/4] OMAP3: mt_ventoux: add video/ splashscreen support

[Stefano Babic]

Signed-off-by: Stefano Babic <sbabic@denx.de>
---
 board/teejet/mt_ventoux/mt_ventoux.c |   63 ++++++++++++++++++++++++++++++++++
 board/teejet/mt_ventoux/mt_ventoux.h |    2 +-
 include/configs/mt_ventoux.h         |   17 +++++++++
 3 files changed, 81 insertions(+), 1 deletion(-)

diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c
index c5eb42c..ecf91f7 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -21,13 +21,16 @@
 
 #include <common.h>
 #include <netdev.h>
+#include <malloc.h>
 #include <fpga.h>
+#include <video_fb.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/omap_gpio.h>
 #include <asm/arch/mmc_host_def.h>
+#include <asm/arch/dss.h>
 #include <i2c.h>
 #include <spartan3.h>
 #include <asm/gpio.h>
@@ -50,6 +53,28 @@ DECLARE_GLOBAL_DATA_PTR;
 #define FPGA_INIT	119
 #define FPGA_DONE	154
 
+#define LCD_PWR		138
+#define LCD_PON_PIN	139
+#define XRES	480
+#define YRES	272
+
+static const struct panel_config lcd_cfg = {
+
+	.timing_h       =  ((4 /* hpb */ - 1) << 20) |
+			((8 /*hfp */- 1) << 8) |
+			(41 /* hsw */ - 1), /* Horizontal timing */
+	.timing_v       = (2 /*vbp */ << 24) |
+			(4 /* vfp */ << 8) |
+			(10 - 1), /* Vertical timing */
+	.pol_freq       = 0x00000000, /* Pol Freq */
+	.divisor        = 0x0001000d, /* 33Mhz Pixel Clock */
+	.lcd_size       = ((YRES - 1) << 16 | (XRES - 1)),
+	.panel_type     = 0x01, /* TFT */
+	.data_lines     = 0x03, /* 24 Bit RGB */
+	.load_mode      = 0x02, /* Frame Mode */
+	.panel_color	= 0,
+};
+
 /* Timing definitions for FPGA */
 static const u32 gpmc_fpga[] = {
 	FPGA_GPMC_CONFIG1,
@@ -231,3 +256,41 @@ int board_mmc_init(bd_t *bis)
 	return omap_mmc_init(0);
 }
 #endif
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+static GraphicDevice panel;
+
+void *video_hw_init(void)
+{
+
+	void *fb;
+	u32 size;
+
+	panel.gdfBytesPP = 4;
+	panel.gdfIndex = GDF_32BIT_X888RGB;
+	size = XRES * YRES * panel.gdfBytesPP * 2 + 1024;
+
+	fb = (void *)0x80500000;
+
+	printf("Frame buffer address 0x%p\n", fb);
+
+	gpio_request(LCD_PWR, "LCD Power");
+	gpio_request(LCD_PON_PIN, "LCD Pon");
+	gpio_direction_output(LCD_PWR, 0);
+	gpio_direction_output(LCD_PON_PIN, 1);
+
+	panel.winSizeX = XRES;
+	panel.winSizeY = YRES;
+	panel.plnSizeX = XRES;
+	panel.plnSizeY = YRES;
+
+	panel.frameAdrs = (u32)fb;
+	panel.memSize = size;
+
+	omap3_dss_panel_config(&lcd_cfg);
+	omap3_dss_setfb(fb);
+	omap3_dss_enable();
+
+	return (void *)&panel;
+}
+#endif
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h b/board/teejet/mt_ventoux/mt_ventoux.h
index 9b2e43e..90331f4 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -221,7 +221,7 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MMC2_DAT5),		(IDIS  | PTU | EN  | M4)) \
 	MUX_VAL(CP(MMC2_DAT6),		(IDIS  | PTU | EN  | M4)) \
 			/* GPIO_138: LCD_ENVD */\
-	MUX_VAL(CP(MMC2_DAT7),		(IDIS  | PTU | EN  | M4)) \
+	MUX_VAL(CP(MMC2_DAT7),		(IDIS  | PTD | EN  | M4)) \
 			/* GPIO_139: LCD_PON */\
 	/* McBSP */\
 	MUX_VAL(CP(MCBSP_CLKS),		(IEN  | PTU | DIS | M0)) \
diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h
index 5db6d57..8ea0dc2 100644
--- a/include/configs/mt_ventoux.h
+++ b/include/configs/mt_ventoux.h
@@ -2,6 +2,9 @@
  * Copyright (C) 2011
  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
  *
+ *
+ * Configuration settings for the Teejet mt_ventoux board.
+ *
  * Copyright (C) 2009 TechNexion Ltd.
  *
  * This program is free software; you can redistribute it and/or modify
@@ -24,6 +27,10 @@
 
 #include "tam3517-common.h"
 
+#undef CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10) + \
+					6 * 1024 * 1024)
+
 #define MACH_TYPE_AM3517_MT_VENTOUX	3832
 #define CONFIG_MACH_TYPE	MACH_TYPE_AM3517_MT_VENTOUX
 
@@ -62,6 +69,16 @@
 #define CONFIG_FPGA_DELAY() udelay(1)
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 
+#define CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SPLASH_SCREEN
+/* #define CONFIG_VIDEO_LOGO */
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_CMD_BMP
+#define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
 #define	CONFIG_EXTRA_ENV_SETTINGS	CONFIG_TAM3517_SETTINGS \
 	"bootcmd=run net_nfs\0"
 
-- 
1.7.9.5

[U-Boot] [PATCH 3/4] OMAP3: twister: add video support

[Tom Rini]

On Thu, Jun 14, 2012 at 10:29:47AM +0200, Stefano Babic wrote:

> Signed-off-by: Stefano Babic <sbabic@denx.de>
[snip]
> +static GraphicDevice panel;
> +static const struct panel_config lcd_cfg = {
> +	.timing_h	= 0x01101d1b, /* Horizontal timing */
> +	.timing_v	= 0x01400b02, /* Vertical timing */
> +	.pol_freq	= 0x00023000, /* Pol Freq */
> +	.divisor	= 0x0001000d, /* 33Mhz Pixel Clock */
> +	.lcd_size	= ((YRES - 1) << 16 | (XRES - 1)),
> +	.panel_type	= 0x01, /* TFT */
> +	.data_lines	= 0x03, /* 24 Bit RGB */
> +	.load_mode	= 0x02 /* Frame Mode */
> +};

You need #if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
type testing here[1] that the mt_ventoux board patch has.  Shall I or
will you v2?  And I'll sanity test this on omap3_beagle tomorrow, but I
suspect it's fine :)

[1]: twister.c:50: warning: 'panel' defined but not used

-- 
Tom

[U-Boot] [PATCH 3/4] OMAP3: twister: add video support

[Stefano Babic]

On 21/06/2012 03:15, Tom Rini wrote:
> On Thu, Jun 14, 2012 at 10:29:47AM +0200, Stefano Babic wrote:
> 

Hi Tom,

>> Signed-off-by: Stefano Babic <sbabic@denx.de>
> [snip]
>> +static GraphicDevice panel;
>> +static const struct panel_config lcd_cfg = {
>> +	.timing_h	= 0x01101d1b, /* Horizontal timing */
>> +	.timing_v	= 0x01400b02, /* Vertical timing */
>> +	.pol_freq	= 0x00023000, /* Pol Freq */
>> +	.divisor	= 0x0001000d, /* 33Mhz Pixel Clock */
>> +	.lcd_size	= ((YRES - 1) << 16 | (XRES - 1)),
>> +	.panel_type	= 0x01, /* TFT */
>> +	.data_lines	= 0x03, /* 24 Bit RGB */
>> +	.load_mode	= 0x02 /* Frame Mode */
>> +};
> 
> You need #if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
> type testing here[1] that the mt_ventoux board patch has.  Shall I or
> will you v2?  And I'll sanity test this on omap3_beagle tomorrow, but I
> suspect it's fine :)

I discussed with Anatolji about the patches and they need to be rebased
and reworked - a v2 is necessary !

Stefano

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