[U-Boot] [PATCH] arm: bugfix: Move vector table before jumping relocated code

Stephen Warren
2012-06-26T16:24:24Z

On 06/25/2012 07:03 PM, Tetsuyuki Kobayashi wrote:
> Hello,
>
> (06/26/2012 12:10 AM), Stephen Warren wrote:
>> On 06/25/2012 06:40 AM, Tetsuyuki Kobayashi wrote:
>>> Interrupts and exceptions doesn't work in relocated code.
>>> It badly use IRQ_STACK_START_IN in rom area as interrupt stack.
>>> It is because the vecotr table is not moved to ram area.
>>> This patch moves vector table before jumping relocated code.
>>>
>>> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
>>
>> CC'ing in some Tegra people.
>>
>> Tetsuyuki, you probably want to CC some OMAP people too.
>
> Thank you.
> I don't know proper person to CC because I am very new in this ML.
> I need some help ..
>
> '#if condition' in my patch is the same as the code setting VBAR right after reset.
> (in file arch/arm/cpu/armv7/start.S)

I imagine the primary ARM custodian and the TI ARM sub-arch custodian
(both now CC'd) would be a good place to start. You'd need to CC them
anyway in order to get this patch checked in.

>>> ---
>>> arch/arm/cpu/armv7/start.S | 12 ++++++++++++
>>> 1 file changed, 12 insertions(+)
>>>
>>> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
>>> index 52f7f6e..5098f7b 100644
>>> --- a/arch/arm/cpu/armv7/start.S
>>> +++ b/arch/arm/cpu/armv7/start.S
>>> @@ -277,6 +277,18 @@ jump_2_ram:
>>> mcr p15, 0, r0, c7, c10, 4 @ DSB
>>> mcr p15, 0, r0, c7, c5, 4 @ ISB
>>> #endif
>>> +/*
>>> + * Move vector table
>>> + */
>>> +#if !defined(CONFIG_TEGRA2)
>>> +#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD))
>>> + /* Set vector address in CP15 VBAR register */
>>> + ldr r0, =_start
>>> + add r0, r0, r9
>>> + mcr p15, 0, r0, c12, c0, 0 @Set VBAR
>>> +#endif
>>> +#endif /* !Tegra2 */
>>> +
>>> ldr r0, _board_init_r_ofs
>>> adr r1, _start
>>> add lr, r0, r1
>>
>>
>
>