* [U-Boot] [PATCH] i.MX6 USDHC: Use the ESDHC clock
@ 2012-06-14 13:44 Dirk Behme
2012-06-15 14:33 ` Stefano Babic
2012-07-02 17:54 ` Stefano Babic
0 siblings, 2 replies; 3+ messages in thread
From: Dirk Behme @ 2012-06-14 13:44 UTC (permalink / raw)
To: u-boot
From: Michael Langer <michael.langer@de.bosch.com>
The commit "i.mx: fsl_esdhc: add the i.mx6q support" (4692708d) introduces
support for the i.MX6Q MMC host controller USDHC.
MXC_IPG_PERCLK sets the clock to 66MHz. This seems to be the default clock
of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC
IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times
higher clock on SD_CLK than expected (see fsl_esdh.c -> set_sysctl()).
Signed-off-by: Michael Langer <michael.langer@de.bosch.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <r64343@freescale.com>
---
arch/arm/cpu/armv7/imx-common/speed.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/imx-common/speed.c b/arch/arm/cpu/armv7/imx-common/speed.c
index 2187e8e..80989c4 100644
--- a/arch/arm/cpu/armv7/imx-common/speed.c
+++ b/arch/arm/cpu/armv7/imx-common/speed.c
@@ -35,7 +35,11 @@ DECLARE_GLOBAL_DATA_PTR;
int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
+#ifdef CONFIG_FSL_USDHC
+ gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+#else
gd->sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK);
#endif
+#endif
return 0;
}
--
1.7.0.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH] i.MX6 USDHC: Use the ESDHC clock
2012-06-14 13:44 [U-Boot] [PATCH] i.MX6 USDHC: Use the ESDHC clock Dirk Behme
@ 2012-06-15 14:33 ` Stefano Babic
2012-07-02 17:54 ` Stefano Babic
1 sibling, 0 replies; 3+ messages in thread
From: Stefano Babic @ 2012-06-15 14:33 UTC (permalink / raw)
To: u-boot
On 14/06/2012 15:44, Dirk Behme wrote:
> From: Michael Langer <michael.langer@de.bosch.com>
>
> The commit "i.mx: fsl_esdhc: add the i.mx6q support" (4692708d) introduces
> support for the i.MX6Q MMC host controller USDHC.
>
> MXC_IPG_PERCLK sets the clock to 66MHz. This seems to be the default clock
> of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC
> IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times
> higher clock on SD_CLK than expected (see fsl_esdh.c -> set_sysctl()).
>
> Signed-off-by: Michael Langer <michael.langer@de.bosch.com>
> CC: Stefano Babic <sbabic@denx.de>
> CC: Jason Liu <r64343@freescale.com>
> ---
> arch/arm/cpu/armv7/imx-common/speed.c | 4 ++++
> 1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/imx-common/speed.c b/arch/arm/cpu/armv7/imx-common/speed.c
> index 2187e8e..80989c4 100644
> --- a/arch/arm/cpu/armv7/imx-common/speed.c
> +++ b/arch/arm/cpu/armv7/imx-common/speed.c
> @@ -35,7 +35,11 @@ DECLARE_GLOBAL_DATA_PTR;
> int get_clocks(void)
> {
> #ifdef CONFIG_FSL_ESDHC
> +#ifdef CONFIG_FSL_USDHC
> + gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
> +#else
> gd->sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK);
> #endif
> +#endif
> return 0;
> }
Acked-by: Stefano Babic <sbabic@denx.de>
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH] i.MX6 USDHC: Use the ESDHC clock
2012-06-14 13:44 [U-Boot] [PATCH] i.MX6 USDHC: Use the ESDHC clock Dirk Behme
2012-06-15 14:33 ` Stefano Babic
@ 2012-07-02 17:54 ` Stefano Babic
1 sibling, 0 replies; 3+ messages in thread
From: Stefano Babic @ 2012-07-02 17:54 UTC (permalink / raw)
To: u-boot
On 14/06/2012 15:44, Dirk Behme wrote:
> From: Michael Langer <michael.langer@de.bosch.com>
>
> The commit "i.mx: fsl_esdhc: add the i.mx6q support" (4692708d) introduces
> support for the i.MX6Q MMC host controller USDHC.
>
> MXC_IPG_PERCLK sets the clock to 66MHz. This seems to be the default clock
> of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC
> IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times
> higher clock on SD_CLK than expected (see fsl_esdh.c -> set_sysctl()).
>
> Signed-off-by: Michael Langer <michael.langer@de.bosch.com>
> CC: Stefano Babic <sbabic@denx.de>
> CC: Jason Liu <r64343@freescale.com>
> ---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 3+ messages in thread
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