From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhong Hongbo Date: Fri, 06 Jul 2012 19:42:02 +0800 Subject: [U-Boot] [PATCH] armv7: Fix infinite loop for the spl boot In-Reply-To: <20120705193535.1cfe8b32@lilith> References: <1341272798-3460-1-git-send-email-bocui107@gmail.com> <4FF5804A.8040701@gmail.com> <20120705193535.1cfe8b32@lilith> Message-ID: <4FF6CF0A.7010300@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/06/2012 01:35 AM, Albert ARIBAUD (by way of Albert ARIBAUD wrote: > Hi Zhong Hongbo, > > On Thu, 05 Jul 2012 19:53:46 +0800, Zhong Hongbo > wrote: >> Hi Albert, >> >> Could you applied the patch to the arm tree? >> >> Thanks, >> hongbo >> On 07/03/2012 07:46 AM, Zhong Hongbo wrote: >>> From: Zhong Hongbo >>> >>> In the spl booting step, When __bss_start is equal to __bss_end__, >>> The loop will clear all the things in CPU space. If there are have >>> the same address for this symbol, To skip the clear bss section. >>> >>> Signed-off-by: Hongbo Zhong >>> --- >>> arch/arm/cpu/armv7/start.S | 3 +++ >>> 1 files changed, 3 insertions(+), 0 deletions(-) >>> >>> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S >>> index 76ccef1..c72f337 100644 >>> --- a/arch/arm/cpu/armv7/start.S >>> +++ b/arch/arm/cpu/armv7/start.S >>> @@ -258,6 +258,8 @@ clear_bss: >>> /* No relocation for SPL */ >>> ldr r0, =__bss_start >>> ldr r1, =__bss_end__ >>> + cmp r0, r1 >>> + beq skip_clbss >>> #else >>> ldr r0, _bss_start_ofs >>> ldr r1, _bss_end_ofs >>> @@ -271,6 +273,7 @@ clbss_l:str r2, [r0] /* >>> clear loop... */ add r0, r0, #4 >>> cmp r0, r1 >>> bne clbss_l >>> +skip_clbss: > > Clearly the loop was wrong in that it should implement a "for (r0 = > start; r0 < end; r0++)" but actually implements a "for (r0 = > start; r0 != end; r0++)". > Yes? My new patch have do this. > I'd rather the loop be fixed to match the intended implementation > rather than worked around. Please rewrite your patch to turn: > Ok, I just found the issue have found in other arm platfor 2011 yeas, the detail information as following: commit 8f1da53508c78789ebeea98a92a3f55c3f84dc5d Author: Christian Riesch Date: Wed Nov 30 22:27:37 2011 +0000 arm, arm926ejs: Fix clear bss loop for zero length bss This patch fixes the clear bss loop for bss sections that have zero length, i.e., where __bss_start == __bss_end__. Signed-off-by: Christian Riesch Cc: Albert Aribaud diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 339c5ed..bb4d00b 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -301,10 +301,12 @@ clear_bss: #endif mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: >> clbss_l:str r2, [r0] /* clear loop...*/ >> add r0, r0, #4 >> cmp r0, r1 >> bne clbss_l > > Into something like > >> clbss_l:cmp r0, r1 >> blo clbss_d >> str r2, [r0] /* clear loop...*/ >> add r0, r0, #4 >> b clbss_l >> clbss_d: > > Also, as Andreas points out, make sure the same fix is applied to all ARM start.S files which need it. Ok? Thanks, hongbo > > Thanks in advance. > > Amicalement, >