* [U-Boot] [PATCH] Removed clearing of L2-as-SRAM
@ 2011-02-14 11:59 Fabian Cenedese
2011-03-25 13:43 ` Fabian Cenedese
2011-04-10 16:24 ` Kumar Gala
0 siblings, 2 replies; 4+ messages in thread
From: Fabian Cenedese @ 2011-02-14 11:59 UTC (permalink / raw)
To: u-boot
Removed clearing of L2 cache as SRAM as it is not necessary without ECC.
This also speeds up the booting process.
Signed-off-by: Fabian Cenedese <cenedese@indel.ch>
Cc: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 7 -------
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
index 8fb27ab..1c42a0b 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
@@ -42,8 +42,6 @@ void cpu_init_f(void)
#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
- char *l2srbar;
- int i;
out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
@@ -54,10 +52,5 @@ void cpu_init_f(void)
/* set L2E=1 & L2SRAM=001 */
out_be32(&l2cache->l2ctl,
(MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE));
-
- /* Initialize L2 SRAM to zero */
- l2srbar = (char *)CONFIG_SYS_INIT_L2_ADDR;
- for (i = 0; i < CONFIG_SYS_L2_SIZE; i++)
- l2srbar[i] = 0;
#endif
}
--
1.7.3.1.msysgit.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH] Removed clearing of L2-as-SRAM
2011-02-14 11:59 [U-Boot] [PATCH] Removed clearing of L2-as-SRAM Fabian Cenedese
@ 2011-03-25 13:43 ` Fabian Cenedese
2011-03-25 15:38 ` Kumar Gala
2011-04-10 16:24 ` Kumar Gala
1 sibling, 1 reply; 4+ messages in thread
From: Fabian Cenedese @ 2011-03-25 13:43 UTC (permalink / raw)
To: u-boot
At 12:59 14.02.2011 +0100, Fabian Cenedese wrote:
>Removed clearing of L2 cache as SRAM as it is not necessary without ECC.
>This also speeds up the booting process.
>
>Signed-off-by: Fabian Cenedese <cenedese@indel.ch>
>Cc: Kumar Gala <galak@kernel.crashing.org>
>---
> arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 7 -------
> 1 files changed, 0 insertions(+), 7 deletions(-)
>
>diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
>index 8fb27ab..1c42a0b 100644
>--- a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
>+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
>@@ -42,8 +42,6 @@ void cpu_init_f(void)
>
> #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
> ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
>- char *l2srbar;
>- int i;
>
> out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
>
>@@ -54,10 +52,5 @@ void cpu_init_f(void)
> /* set L2E=1 & L2SRAM=001 */
> out_be32(&l2cache->l2ctl,
> (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE));
>-
>- /* Initialize L2 SRAM to zero */
>- l2srbar = (char *)CONFIG_SYS_INIT_L2_ADDR;
>- for (i = 0; i < CONFIG_SYS_L2_SIZE; i++)
>- l2srbar[i] = 0;
> #endif
> }
>--
>1.7.3.1.msysgit.0
There haven't been any comments about this yet. Is this ok?
bye Fabi
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH] Removed clearing of L2-as-SRAM
2011-03-25 13:43 ` Fabian Cenedese
@ 2011-03-25 15:38 ` Kumar Gala
0 siblings, 0 replies; 4+ messages in thread
From: Kumar Gala @ 2011-03-25 15:38 UTC (permalink / raw)
To: u-boot
On Mar 25, 2011, at 8:43 AM, Fabian Cenedese wrote:
> At 12:59 14.02.2011 +0100, Fabian Cenedese wrote:
>> Removed clearing of L2 cache as SRAM as it is not necessary without ECC.
>> This also speeds up the booting process.
>>
>> Signed-off-by: Fabian Cenedese <cenedese@indel.ch>
>> Cc: Kumar Gala <galak@kernel.crashing.org>
>> ---
>> arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 7 -------
>> 1 files changed, 0 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
>> index 8fb27ab..1c42a0b 100644
>> --- a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
>> +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
>> @@ -42,8 +42,6 @@ void cpu_init_f(void)
>>
>> #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
>> ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
>> - char *l2srbar;
>> - int i;
>>
>> out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
>>
>> @@ -54,10 +52,5 @@ void cpu_init_f(void)
>> /* set L2E=1 & L2SRAM=001 */
>> out_be32(&l2cache->l2ctl,
>> (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE));
>> -
>> - /* Initialize L2 SRAM to zero */
>> - l2srbar = (char *)CONFIG_SYS_INIT_L2_ADDR;
>> - for (i = 0; i < CONFIG_SYS_L2_SIZE; i++)
>> - l2srbar[i] = 0;
>> #endif
>> }
>> --
>> 1.7.3.1.msysgit.0
>
> There haven't been any comments about this yet. Is this ok?
>
> bye Fabi
will take a look, thanks for the reminder.
- k
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH] Removed clearing of L2-as-SRAM
2011-02-14 11:59 [U-Boot] [PATCH] Removed clearing of L2-as-SRAM Fabian Cenedese
2011-03-25 13:43 ` Fabian Cenedese
@ 2011-04-10 16:24 ` Kumar Gala
1 sibling, 0 replies; 4+ messages in thread
From: Kumar Gala @ 2011-04-10 16:24 UTC (permalink / raw)
To: u-boot
On Feb 14, 2011, at 5:59 AM, Fabian Cenedese wrote:
> Removed clearing of L2 cache as SRAM as it is not necessary without ECC.
> This also speeds up the booting process.
>
> Signed-off-by: Fabian Cenedese <cenedese@indel.ch>
> Cc: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 7 -------
> 1 files changed, 0 insertions(+), 7 deletions(-)
applied to 85xx
- k
^ permalink raw reply [flat|nested] 4+ messages in thread
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2011-02-14 11:59 [U-Boot] [PATCH] Removed clearing of L2-as-SRAM Fabian Cenedese
2011-03-25 13:43 ` Fabian Cenedese
2011-03-25 15:38 ` Kumar Gala
2011-04-10 16:24 ` Kumar Gala
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