[U-Boot] [PATCH u-boot-arm/next 1/2] OMAP3: igep00x0: Add config option to choose flash storage memory

[U-Boot] [PATCH u-boot-arm/next 1/2] OMAP3: igep00x0: Add config option to choose flash storage memory

[Javier Martinez Canillas]

IGEP-based boards can have two different flash memories, a OneNAND or a
NAND device. Add a configuration option for to choose which memory to use.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
---
 board/isee/igep0020/igep0020.h |    4 ++++
 board/isee/igep0030/igep0030.h |    4 ++++
 boards.cfg                     |    6 ++++--
 include/configs/igep00x0.h     |   19 +++++++++++++++++++
 4 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/board/isee/igep0020/igep0020.h b/board/isee/igep0020/igep0020.h
index 3d6e15f..3335ecc 100644
--- a/board/isee/igep0020/igep0020.h
+++ b/board/isee/igep0020/igep0020.h
@@ -26,7 +26,11 @@
 const omap3_sysinfo sysinfo = {
 	DDR_STACKED,
 	"IGEP v2 board",
+#if defined(CONFIG_ENV_IS_IN_ONENAND)
 	"ONENAND",
+#else
+	"NAND",
+#endif
 };
 
 static void setup_net_chip(void);
diff --git a/board/isee/igep0030/igep0030.h b/board/isee/igep0030/igep0030.h
index b7ce5aa..a93339d 100644
--- a/board/isee/igep0030/igep0030.h
+++ b/board/isee/igep0030/igep0030.h
@@ -26,7 +26,11 @@
 const omap3_sysinfo sysinfo = {
 	DDR_STACKED,
 	"OMAP3 IGEP module",
+#if defined(CONFIG_ENV_IS_IN_ONENAND)
 	"ONENAND",
+#else
+	"NAND",
+#endif
 };
 
 /*
diff --git a/boards.cfg b/boards.cfg
index 9efdc6d..7463896 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -224,8 +224,10 @@ cm_t35                       arm         armv7       cm_t35              -
 omap3_overo                  arm         armv7       overo               -              omap3
 omap3_pandora                arm         armv7       pandora             -              omap3
 dig297                       arm         armv7       dig297              comelit        omap3
-igep0020                     arm         armv7       igep0020            isee           omap3		igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020
-igep0030                     arm         armv7       igep0030            isee           omap3		igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030
+igep0020                     arm         armv7       igep0020            isee           omap3		igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_ONENAND
+igep0020_nand                arm         armv7       igep0020            isee           omap3		igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_NAND
+igep0030                     arm         armv7       igep0030            isee           omap3		igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_ONENAND
+igep0030_nand                arm         armv7       igep0030            isee           omap3		igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_NAND
 am3517_evm                   arm         armv7       am3517evm           logicpd        omap3
 mt_ventoux                   arm         armv7       mt_ventoux          teejet         omap3
 omap3_zoom1                  arm         armv7       zoom1               logicpd        omap3
diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h
index a0a23a7..d8e87c3 100644
--- a/include/configs/igep00x0.h
+++ b/include/configs/igep00x0.h
@@ -105,7 +105,12 @@
 #define CONFIG_CMD_FAT		/* FAT support			*/
 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
 #define CONFIG_CMD_MMC		/* MMC support			*/
+#ifdef CONFIG_BOOT_ONENAND
 #define CONFIG_CMD_ONENAND	/* ONENAND support		*/
+#endif
+#ifdef CONFIG_BOOT_NAND
+#define CONFIG_CMD_NAND
+#endif
 #define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_PING
@@ -244,6 +249,7 @@
  * FLASH and environment organization
  */
 
+#ifdef CONFIG_BOOT_ONENAND
 #define PISMO1_ONEN_SIZE		GPMC_SIZE_128M /* Configure the PISMO */
 
 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
@@ -253,6 +259,19 @@
 #define CONFIG_ENV_IS_IN_ONENAND	1
 #define CONFIG_ENV_SIZE			(512 << 10) /* Total Size Environment */
 #define CONFIG_ENV_ADDR			ONENAND_ENV_OFFSET
+#endif
+
+#ifdef CONFIG_BOOT_NAND
+#define PISMO1_NAND_SIZE		GPMC_SIZE_128M /* Configure the PISMO */
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_SYS_NAND_BASE		NAND_BASE
+#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
+#define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
+#define CONFIG_ENV_IS_IN_NAND	        1
+#define CONFIG_ENV_SIZE			(512 << 10) /* Total Size Environment */
+#define CONFIG_ENV_ADDR			NAND_ENV_OFFSET
+#define CONFIG_SYS_MAX_NAND_DEVICE      1
+#endif
 
 /*
  * Size of malloc() pool
-- 
1.7.7.6

[U-Boot] [PATCH u-boot-arm/next 2/2] OMAP3: igep00x0: add SPL support for IGEP-based boards

[Javier Martinez Canillas]

This patch adds SPL support for IGEP-based boards.

Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
---
 board/isee/igep0020/config.mk  |   33 --------------------
 board/isee/igep0020/igep0020.c |   34 ++++++++++++++++++++-
 board/isee/igep0030/config.mk  |   33 --------------------
 board/isee/igep0030/igep0030.c |   34 ++++++++++++++++++++-
 include/configs/igep00x0.h     |   65 ++++++++++++++++++++++++++++++++++++++++
 5 files changed, 131 insertions(+), 68 deletions(-)
 delete mode 100644 board/isee/igep0020/config.mk
 delete mode 100644 board/isee/igep0030/config.mk

diff --git a/board/isee/igep0020/config.mk b/board/isee/igep0020/config.mk
deleted file mode 100644
index 7964621..0000000
--- a/board/isee/igep0020/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2009
-# ISEE 2007 SL, <www.iseebcn.com>
-#
-# IGEP0020 uses OMAP3 (ARM-CortexA8) cpu
-# see http://www.ti.com/ for more information on Texas Instruments
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# Physical Address:
-# 8000'0000 (bank0)
-# A000/0000 (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-# For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/isee/igep0020/igep0020.c b/board/isee/igep0020/igep0020.c
index 971e31b..40436d6 100644
--- a/board/isee/igep0020/igep0020.c
+++ b/board/isee/igep0020/igep0020.c
@@ -58,6 +58,38 @@ int board_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_SPL_BUILD
+/*
+ * Routine: omap_rev_string
+ * Description: For SPL builds output board rev
+ */
+void omap_rev_string(void)
+{
+}
+
+/*
+ * Routine: get_board_mem_timings
+ * Description: If we use SPL then there is no x-loader nor config header
+ * so we have to setup the DDR timings ourself on both banks.
+ */
+void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
+		u32 *mr)
+{
+	*mr = MICRON_V_MR_165;
+#ifdef CONFIG_BOOT_NAND
+	*mcfg = MICRON_V_MCFG_165(512 << 20);
+	*ctrla = MICRON_V_ACTIMA_165;
+	*ctrlb = MICRON_V_ACTIMB_165;
+	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+#else
+	*mcfg = NUMONYX_V_MCFG_165(512 << 20);
+	*ctrla = NUMONYX_V_ACTIMA_165;
+	*ctrlb = NUMONYX_V_ACTIMB_165;
+	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+#endif
+}
+#endif
+
 /*
  * Routine: setup_net_chip
  * Description: Setting up the configuration GPMC registers specific to the
@@ -91,7 +123,7 @@ static void setup_net_chip(void)
 }
 #endif
 
-#ifdef CONFIG_GENERIC_MMC
+#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
 int board_mmc_init(bd_t *bis)
 {
 	omap_mmc_init(0, 0, 0);
diff --git a/board/isee/igep0030/config.mk b/board/isee/igep0030/config.mk
deleted file mode 100644
index 059a878..0000000
--- a/board/isee/igep0030/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2009
-# ISEE 2007 SL, <www.iseebcn.com>
-#
-# IGEP0030 uses OMAP3 (ARM-CortexA8) cpu
-# see http://www.ti.com/ for more information on Texas Instruments
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# Physical Address:
-# 8000'0000 (bank0)
-# A000/0000 (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-# For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/isee/igep0030/igep0030.c b/board/isee/igep0030/igep0030.c
index 653c1b5..41a7548 100644
--- a/board/isee/igep0030/igep0030.c
+++ b/board/isee/igep0030/igep0030.c
@@ -45,7 +45,39 @@ int board_init(void)
 	return 0;
 }
 
-#ifdef CONFIG_GENERIC_MMC
+#ifdef CONFIG_SPL_BUILD
+/*
+ * Routine: omap_rev_string
+ * Description: For SPL builds output board rev
+ */
+void omap_rev_string(void)
+{
+}
+
+/*
+ * Routine: get_board_mem_timings
+ * Description: If we use SPL then there is no x-loader nor config header
+ * so we have to setup the DDR timings ourself on both banks.
+ */
+void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
+			   u32 *mr)
+{
+	*mr = MICRON_V_MR_165;
+#ifdef CONFIG_BOOT_NAND
+	*mcfg = MICRON_V_MCFG_165(512 << 20);
+	*ctrla = MICRON_V_ACTIMA_165;
+	*ctrlb = MICRON_V_ACTIMB_165;
+	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+#else
+	*mcfg = NUMONYX_V_MCFG_165(512 << 20);
+	*ctrla = NUMONYX_V_ACTIMA_165;
+	*ctrlb = NUMONYX_V_ACTIMB_165;
+	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+#endif
+}
+#endif
+
+#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
 int board_mmc_init(bd_t *bis)
 {
 	omap_mmc_init(0, 0, 0);
diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h
index d8e87c3..3f48eec 100644
--- a/include/configs/igep00x0.h
+++ b/include/configs/igep00x0.h
@@ -287,6 +287,11 @@
 #define CONFIG_SMC911X_BASE	0x2C000000
 #endif /* (CONFIG_CMD_NET) */
 
+/*
+ * Leave it@0x80008000 to allow booting new u-boot.bin with X-loader
+ * and older u-boot.bin with the new U-Boot SPL.
+ */
+#define CONFIG_SYS_TEXT_BASE		0x80008000
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
@@ -294,4 +299,64 @@
 					 CONFIG_SYS_INIT_RAM_SIZE - \
 					 GENERATED_GBL_DATA_SIZE)
 
+/* SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_NAND_SIMPLE
+#define CONFIG_SPL_TEXT_BASE		0x40200800
+#define CONFIG_SPL_MAX_SIZE		(45 * 1024)
+#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+
+/* move malloc and bss high to prevent clashing with the main image */
+#define CONFIG_SYS_SPL_MALLOC_START	0x87000000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
+#define CONFIG_SPL_BSS_START_ADDR	0x87080000	/* end of minimum RAM */
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
+
+/* MMC boot config */
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#ifdef CONFIG_BOOT_ONENAND
+#define CONFIG_SPL_ONENAND_SUPPORT
+
+/* OneNAND boot config */
+#define CONFIG_SYS_ONENAND_U_BOOT_OFFS  0x80000
+#define CONFIG_SYS_ONENAND_PAGE_SIZE	2048
+#define CONFIG_SPL_ONENAND_LOAD_ADDR    0x80000
+#define CONFIG_SPL_ONENAND_LOAD_SIZE    \
+	(512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
+
+#endif
+
+#ifdef CONFIG_BOOT_NAND
+#define CONFIG_SPL_NAND_SUPPORT
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
+#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
+						10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCSIZE		512
+#define CONFIG_SYS_NAND_ECCBYTES	3
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+#endif
+
 #endif /* __IGEP00X0_H */
-- 
1.7.7.6

[U-Boot] [PATCH u-boot-arm/next 2/2] OMAP3: igep00x0: add SPL support for IGEP-based boards

[Tom Rini]

On 07/13/2012 12:41 PM, Javier Martinez Canillas wrote:

> This patch adds SPL support for IGEP-based boards.
> 
> Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.
[snip]
> +#define CONFIG_SPL_MAX_SIZE		(45 * 1024)

This should be 54 * 1024.  Thanks!

-- 
Tom

[U-Boot] [PATCH u-boot-arm/next 2/2] OMAP3: igep00x0: add SPL support for IGEP-based boards

[Javier Martinez Canillas]

On Mon, Jul 16, 2012 at 8:01 PM, Tom Rini <trini@ti.com> wrote:
> On 07/13/2012 12:41 PM, Javier Martinez Canillas wrote:
>
>> This patch adds SPL support for IGEP-based boards.
>>
>> Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.
> [snip]
>> +#define CONFIG_SPL_MAX_SIZE          (45 * 1024)
>
> This should be 54 * 1024.  Thanks!
>
> --
> Tom

Hi Tom,

Ok thanks a lot for your feedback. I'll fix it and send a v2 of the patch.

Best regards,
Javier

[U-Boot] [PATCH u-boot-arm/next 1/2] OMAP3: igep00x0: Add config option to choose flash storage memory

[Tom Rini]

On 07/16/2012 12:43 AM, Enric Balletb? i Serra wrote:

[snip]
> I would like to investigateif we can do this using runtime detection
> instead of a separate config option. Give me some days. The runtime
> detection can be done reading the sysboot configuration for example. I
> think it's possible, do you think would be possible ?

Until we have the device model and the ability to see at run-time if we
have say NAND or OneNAND (or neither!) we can't because we have to
build-time define where the environment will be found.

-- 
Tom

[U-Boot] [PATCH u-boot-arm/next 1/2] OMAP3: igep00x0: Add config option to choose flash storage memory

[Javier Martinez Canillas]

On Mon, Jul 16, 2012 at 7:58 PM, Tom Rini <trini@ti.com> wrote:
> On 07/16/2012 12:43 AM, Enric Balletb? i Serra wrote:
>
> [snip]
>> I would like to investigateif we can do this using runtime detection
>> instead of a separate config option. Give me some days. The runtime
>> detection can be done reading the sysboot configuration for example. I
>> think it's possible, do you think would be possible ?
>
> Until we have the device model and the ability to see at run-time if we
> have say NAND or OneNAND (or neither!) we can't because we have to
> build-time define where the environment will be found.
>
> --
> Tom

Hi Enric,

Runtime detection is possible reading the sysboot as you said (in fact
this is how we do it in the kernel) but as Tom said I didn't find a
common way to do this. I guess you can manually detect the NAND type
and configure the GPMC registers on the board code but I didn't see
other OMAP boards doing this. Instead I found other examples of boards
using compile options to choose between memory types.

Of course I will be more than glad if you have a better approach to
solve this :-)

Thanks a lot and best regards,
Javier

[U-Boot] [PATCH u-boot-arm/next 1/2] OMAP3: igep00x0: Add config option to choose flash storage memory

[Tom Rini]

On 07/16/2012 04:41 PM, Javier Martinez Canillas wrote:

[snip]
> Runtime detection is possible reading the sysboot as you said (in fact
> this is how we do it in the kernel) but as Tom said I didn't find a
> common way to do this. I guess you can manually detect the NAND type
> and configure the GPMC registers on the board code but I didn't see
> other OMAP boards doing this. Instead I found other examples of boards
> using compile options to choose between memory types.
> 
> Of course I will be more than glad if you have a better approach to
> solve this :-)

The biggest problem is that today we don't have a way to read/write
environment to a dynamically detected backing store.  I had an idea on
how to do this, but given the device model will also allow for this,
easier, that's the way to go.

-- 
Tom

[U-Boot] [PATCH u-boot-arm/next 1/2] OMAP3: igep00x0: Add config option to choose flash storage memory

[Enric Balletbò i Serra]

Hi,

2012/7/17 Tom Rini <trini@ti.com>:
> On 07/16/2012 04:41 PM, Javier Martinez Canillas wrote:
>
> [snip]
>> Runtime detection is possible reading the sysboot as you said (in fact
>> this is how we do it in the kernel) but as Tom said I didn't find a
>> common way to do this. I guess you can manually detect the NAND type
>> and configure the GPMC registers on the board code but I didn't see
>> other OMAP boards doing this. Instead I found other examples of boards
>> using compile options to choose between memory types.
>>
>> Of course I will be more than glad if you have a better approach to
>> solve this :-)
>
> The biggest problem is that today we don't have a way to read/write
> environment to a dynamically detected backing store.  I had an idea on
> how to do this, but given the device model will also allow for this,
> easier, that's the way to go.
>
> --
> Tom

Cool, thanks for the explanations Tom.

Javier, of course you have my :-)

Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>

Cheers,
  Enric