[U-Boot] [PATCH 2/2] ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment

Marek Vasut
2012-07-08T21:36:32Z

Dear Tom Rini,

> On Sun, Jul 8, 2012 at 11:51 AM, Marek Vasut <marex@denx.de> wrote:
> > Dear Ilya Yanok,
> >
> >> Hi Marek,
> >>
> >> On Sun, Jul 8, 2012 at 7:08 AM, Marek Vasut <marex@denx.de> wrote:
> >>
> >> [...]
> >>
> >> diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
> >>
> >> > index 04300be..5199560 100644
> >> > --- a/drivers/usb/host/ehci-hcd.c
> >> > +++ b/drivers/usb/host/ehci-hcd.c
> >> > @@ -34,7 +34,10 @@ struct ehci_hccr *hccr; /* R/O registers, not
> >> > need for volatile */
> >> >
> >> > volatile struct ehci_hcor *hcor;
> >> >
> >> > static uint16_t portreset;
> >> >
> >> > -static struct QH qh_list __attribute__((aligned(32)));
> >> > +DEFINE_CACHE_ALIGN_BUFFER(struct QH, qh_list, 1);
> >>
> >> This will align on ARCH_DMA_MINALIGN, not USB_DMA_MINALIGN. In case of
> >> ARCH_DMA_MINALIGN < 32 we will loose the 32-byte alignment required by
> >> USB spec.
> >
> > That's true -- maybe we should create ALLOC_ALIGN_BUFFER() and
> > ALLOC_CACHE_ALIGN_BUFFER() to be a special case of it ?
>
> Lets think. USB says "32byte min". Do we have other buses today that
> apply similar constraints? If so, we should probably go about
> abstracting into a __ALIGN_FOO(size, what) and do a general one and a
> USB one that does 32 or cachline. If it's just USB that might be
> overkill however...

Let's do this, we dunno what craziness can befall us in the future. And having
the macro handy won't hurt anyway.

Best regards,
Marek Vasut