[U-Boot] [PATCH] at91: Add support for taskit AT91SAM9G20 boards.

Andreas Bießmann
2012-08-06T12:18:18Z

Dear Markus Hubig,

On 03.08.2012 14:05, Markus Hubig wrote:
> On Thu, Aug 02, 2012 at 03:28:30PM +0200, Markus Hubig wrote:
>> On Wed, Aug 01, 2012 at 10:21:04PM +0200, Andreas Bie?mann wrote:
>>> On 01.08.12 21:28, Markus Hubig wrote:
>>>> On Wed, Aug 01, 2012 at 11:58:22AM +0200, Andreas Bie?mann wrote:
>>>>>> + /* Need to reset PHY -> 500ms reset */
>>>>>> + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
>>>>>> + AT91_RSTC_MR_URSTEN, &rstc->mr);
>>>>>
>>>>> Hmm ... is it OK to generate the user reset here? I know this is the
>>>>> same in at least at91sam9263ek, can you please check if we should
>>>>> instead delete that bit in MR?
>>>>
>>>> MR? Sorry I don't get this one. Please explain a bit ...
>>>
>>> I talked about URSTEN bit in RSTC_MR (Reset Controller Mode Register;
>>> p99 in at91sam9g20 datasheet). The URSTEN bit set to 1 means disable low
>>> level detection on NRST pin. Which in fact disables external reset with
>>> the reset key. One have to check if this is true or maybe I'm wrong here.
>>
>> Hmm ok I'll investigate this a bit further ...
>
> OK I looked this up in the at91sam9g20 datasheet, but as fahr as I understand
> it, setting AT91_RSTC_MR_URSTEN enables the *detection* of a low level on NRST
> to trigger USER RESET, while in order to perform the PHY Reset, NRST just hast
> to get low. To get NRST low, one has to set EXTRST in RSTC_CR.

correct.

>
> So to perform a PHY Reset, the correct code should be:
>
> | /* Reset PHY for 500ms */
> | writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13)
> | & ~AT91_RSTC_MR_URSTEN, &rstc->mr);
> | writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
>
> I tested it with my PortuxG20 and Network is still working!
>
> Unfortunatlie the Portux has no reset button, but I think for all at91sam9g20
> boards with a reset button the AT91_RSTC_MR_URSTEN has to be high by default,
> so somewhere in arch/arm/cpu/arm926ejs/at91/ there has to be some code like
> this:
>
> |#ifdef CONFIG_AT91_RESET_BUTTON
> |struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
> |writel(AT91_RSTC_KEY | AT91_RSTC_MR_URSTEN, &rstc->mr);
> |#endif

Well, I think it is up to the board maintainer to verify the reset
switch is working.

Best regards

Andreas Bie?mann