[U-Boot] [PATCH v3] MX28: use a clear name for DDR2 initialization

[Stefano Babic <sbabic@denx.de>]

On 28/07/2012 23:44, Otavio Salvador wrote:
> The mx28 prefix has been added to the initialization data and function
> so it is clear by which SoC it is used as i.MX233 will have a specific
> one. While on that, we also change it to static.
> 
> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
> ---
> Changes in v2:
> - use static for the allocation of memory initialization matrix
> 
> Changes in v3:
> - change short-description prefix
> 
>  arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |   12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
> index e17a4d7..cca1316 100644
> --- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
> +++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
> @@ -31,7 +31,7 @@
>  
>  #include "mx28_init.h"
>  
> -uint32_t dram_vals[] = {
> +static uint32_t mx28_dram_vals[] = {
>  	0x00000000, 0x00000000, 0x00000000, 0x00000000,
>  	0x00000000, 0x00000000, 0x00000000, 0x00000000,
>  	0x00000000, 0x00000000, 0x00000000, 0x00000000,
> @@ -88,14 +88,14 @@ void __mx28_adjust_memory_params(uint32_t *dram_vals)
>  void mx28_adjust_memory_params(uint32_t *dram_vals)
>  	__attribute__((weak, alias("__mx28_adjust_memory_params")));
>  
> -void init_m28_200mhz_ddr2(void)
> +void init_mx28_200mhz_ddr2(void)
>  {
>  	int i;
>  
> -	mx28_adjust_memory_params(dram_vals);
> +	mx28_adjust_memory_params(mx28_dram_vals);
>  
> -	for (i = 0; i < ARRAY_SIZE(dram_vals); i++)
> -		writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
> +	for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++)
> +		writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i));
>  }
>  
>  void mx28_mem_init_clock(void)
> @@ -230,7 +230,7 @@ void mx28_mem_init(void)
>  	/* Clear START bit from DRAM_CTL16 */
>  	clrbits_le32(MXS_DRAM_BASE + 0x40, 1);
>  
> -	init_m28_200mhz_ddr2();
> +	init_mx28_200mhz_ddr2();
>  
>  	/* Clear SREFRESH bit from DRAM_CTL17 */
>  	clrbits_le32(MXS_DRAM_BASE + 0x44, 1);
> 

Acked-by : Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

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