From mboxrd@z Thu Jan 1 00:00:00 1970 From: Troy Kisky Date: Mon, 13 Aug 2012 14:04:28 -0700 Subject: [U-Boot] [PATCH 13/13] mxc nand: Add support for i.MX5 In-Reply-To: <1297105590.2375011.1344891064392.JavaMail.root@advansee.com> References: <1297105590.2375011.1344891064392.JavaMail.root@advansee.com> Message-ID: <50296BDC.7040701@boundarydevices.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 8/13/2012 1:51 PM, Beno?t Th?baudeau wrote: > Signed-off-by: Beno?t Th?baudeau > Cc: Scott Wood > Cc: Stefano Babic > --- > .../arch/arm/include/asm/arch-mx5/imx-regs.h | 9 + > .../drivers/mtd/nand/mxc_nand.c | 217 +++++++++++++++----- > .../include/fsl_nfc.h | 149 +++++++++----- > .../nand_spl/nand_boot_fsl_nfc.c | 114 +++++++--- > 4 files changed, 363 insertions(+), 126 deletions(-) > > diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx5/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx5/imx-regs.h > index 7f66b61..55e9660 100644 > --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx5/imx-regs.h > +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx5/imx-regs.h > @@ -232,6 +232,15 @@ > #define CS0_32M_CS1_32M_CS2_32M_CS3_32M 3 > > /* > + * SRC register definitions > + */ > +#if defined(CONFIG_MX51) > +#define SRC_SBMR_NF16B (1 << 2) > +#elif defined(CONFIG_MX53) > +#define SRC_SBMR_NF16B (1 << 13) > +#endif > + > You could give an error if a multi-platform kernel has both defined, if a run-time check is too difficult.