From: Scott Wood <scottwood@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 4/6] nand_spl: update udelay for Freescale boards
Date: Mon, 13 Aug 2012 17:56:42 -0500 [thread overview]
Message-ID: <5029862A.3080800@freescale.com> (raw)
In-Reply-To: <1344881442-22671-4-git-send-email-msm@freescale.com>
On 08/13/2012 01:10 PM, Matthew McClintock wrote:
> Let's use the more appropriate udelay for the nand_spl. While we
> can't make use of u-boot's full udelay we can atl east use a for
> loop that won't get optimized away .Since we have the bus clock
> we can use the timebase to calculate wall time.
>
> Looked at reusing the u-boot udelay functions but it pulls in a lot
> of code as well as depends on the gd struct and would require a lot
> of rework
What's wrong with depending on the gd struct?
> +extern u32 bus_clk;
Change to gd->bus_clk as mentioned in patch 5/6.
> +void udelay(unsigned long usec) {
> + u32 ticks_per_usec = bus_clk / (8 * 1000000);
> + u32 ticks = ticks_per_usec * usec;
> + u32 s = mfspr(SPRN_TBRL);
> +
> + while ((mfspr(SPRN_TBRL)-s) < ticks);
> +}
Opening brace goes on its own line for function definitions. Use spaces
around that '-'.
Dividing the bus clock by 8 only works for e500v1/v2, but this isn't
labelled as specific to those cores.
> diff --git a/nand_spl/board/freescale/p1010rdb/Makefile b/nand_spl/board/freescale/p1010rdb/Makefile
> index 8d240ea..cdbd492 100644
> --- a/nand_spl/board/freescale/p1010rdb/Makefile
> +++ b/nand_spl/board/freescale/p1010rdb/Makefile
> @@ -39,7 +39,8 @@ CFLAGS += -DCONFIG_NAND_SPL
>
> SOBJS = start.o resetvec.o ticks.o
> COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
> - nand_boot.o nand_boot_fsl_ifc.o ns16550.o tlb.o tlb_table.o
> + nand_boot.o nand_boot_fsl_ifc.o ns16550.o tlb.o tlb_table.o \
> + ../common.o
>
> SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
> OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
> @@ -123,6 +124,9 @@ ifneq ($(OBJTREE), $(SRCTREE))
> $(obj)nand_boot.c:
> @rm -f $(obj)nand_boot.c
> ln -s $(SRCTREE)/nand_spl/board/$(BOARDDIR)/nand_boot.c $(obj)nand_boot.c
> +$(obj)../common.c:
> + @rm -f $(obj)../common.c
> + ln -s $(SRCTREE)/nand_spl/board/freescale/common.c $(obj)../common.c
> endif
Why are you creating a link in the parent directory?
-Scott
next prev parent reply other threads:[~2012-08-13 22:56 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-13 18:10 [U-Boot] [PATCH 1/6] p1014rdb: set ddr bus width properly depending on SVR Matthew McClintock
2012-08-13 18:10 ` [U-Boot] [PATCH 2/6] p1010rdb: fix ddr values for p1014rdb (setting bus width to 16bit) Matthew McClintock
2012-08-13 18:10 ` [U-Boot] [PATCH 3/6] powerpc/p1010rdb: nandboot: compare SVR properly Matthew McClintock
2012-08-13 18:10 ` [U-Boot] [PATCH 4/6] nand_spl: update udelay for Freescale boards Matthew McClintock
2012-08-13 22:56 ` Scott Wood [this message]
2012-08-13 23:14 ` McClintock Matthew-B29882
2012-08-13 23:22 ` Scott Wood
2012-08-13 23:28 ` McClintock Matthew-B29882
2012-08-13 23:35 ` Scott Wood
2012-08-13 18:10 ` [U-Boot] [PATCH 5/6] nand_spl: p1023rds: wait before enabling DDR controller Matthew McClintock
2012-08-13 18:18 ` Scott Wood
2012-08-13 18:50 ` McClintock Matthew-B29882
2012-08-13 18:10 ` [U-Boot] [PATCH 6/6] nand_spl: change out_be32 to raw_writel and depend on subsequent sync Matthew McClintock
2012-08-13 23:23 ` Scott Wood
2012-08-13 23:31 ` McClintock Matthew-B29882
2012-08-13 23:34 ` Scott Wood
2012-08-13 23:37 ` McClintock Matthew-B29882
2012-08-18 19:05 ` Scott Wood
2012-08-20 16:11 ` Andy Fleming
2012-08-20 16:51 ` Scott Wood
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