From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Sat, 18 Aug 2012 17:34:10 +0200 Subject: [U-Boot] [PATCH 2/4] efikamx: remove drive strength hack from early_init_f and move it to the DCD In-Reply-To: <1345227562-11502-3-git-send-email-matt@genesi-usa.com> References: <1345227562-11502-1-git-send-email-matt@genesi-usa.com> <1345227562-11502-3-git-send-email-matt@genesi-usa.com> Message-ID: <502FB5F2.5090108@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 17/08/2012 20:19, Matt Sealey wrote: > The i.MX Boot ROM lets us set up certain registers before U-Boot even gets > executed. Rather than setting up DDR, putting U-Boot in place, and getting > into pre-relocation init to set up DDR again, just do it once in the correct > place. This also solves an issue where the Smarttop DDR pad settings were > being applied on Smartbook. > > While we're at it, configure PCBID0,1,2 and the LED GPIO since we've still > got room in the DCD to do so. > > Signed-off-by: Matt Sealey > --- Hi Matt, > diff --git a/board/genesi/mx51_efikamx/imximage_mx.cfg b/board/genesi/mx51_efikamx/imximage_mx.cfg > index 6fe0ff9..ac9aa9a 100644 > --- a/board/genesi/mx51_efikamx/imximage_mx.cfg > +++ b/board/genesi/mx51_efikamx/imximage_mx.cfg > @@ -1,7 +1,7 @@ > # > +# Copyright (C) 2009 Pegatron Corporation ^--- Was this added for mistake ? I think you should add only yours. > # Copyright (C) 2010 Marek Vasut > -# > -# BASED ON: imx51evk > +# Copyright (C) 2009-2012 Genesi USA, Inc. > # > # (C) Copyright 2009 > # Stefano Babic DENX Software Engineering sbabic at denx.de. > @@ -43,48 +43,44 @@ BOOT_FROM spi > # Address absolute address of the register > # value value to be stored in the register > I agree with Marek that you break the copyright stuff. > -# Setting IOMUXC > -DATA 4 0x73fa88a0 0x000 > -DATA 4 0x73fa850c 0x20c5 > -DATA 4 0x73fa8510 0x20c5 > -DATA 4 0x73fa883c 0x5 > -DATA 4 0x73fa8848 0x5 > -DATA 4 0x73fa84b8 0xe7 > -DATA 4 0x73fa84bc 0x45 > -DATA 4 0x73fa84c0 0x45 > -DATA 4 0x73fa84c4 0x45 > -DATA 4 0x73fa84c8 0x45 > -DATA 4 0x73fa8820 0x0 > -DATA 4 0x73fa84a4 0x5 > -DATA 4 0x73fa84a8 0x5 > -DATA 4 0x73fa84ac 0xe5 > -DATA 4 0x73fa84b0 0xe5 > -DATA 4 0x73fa84b4 0xe5 > -DATA 4 0x73fa84cc 0xe5 > -DATA 4 0x73fa84d0 0xe4 > +# Essential GPIO settings to be done as early as possible > +# PCBID pad settings are all the defaults except #2 which needs HVE off > +DATA 4 0x73fa8134 0x3 # PCBID0 ALT3 GPIO 3_16 > +DATA 4 0x73fa8130 0x3 # PCBID1 ALT3 GPIO 3_17 > +DATA 4 0x73fa8128 0x3 # PCBID2 ALT3 GPIO 3_11 > +DATA 4 0x73fa8504 0xe4 # PCBID2 PAD ~HVE > +DATA 4 0x73fa8198 0x3 # LED0 ALT3 GPIO 3_13 > +DATA 4 0x73fa81c4 0x3 # LED1 ALT3 GPIO 3_14 > +DATA 4 0x73fa81c8 0x3 # LED2 ALT3 GPIO 3_15 > > -DATA 4 0x73fa882c 0x4 > -DATA 4 0x73fa88a4 0x4 > -DATA 4 0x73fa88ac 0x4 > -DATA 4 0x73fa88b8 0x4 > +# DDR bus IOMUX PAD settings > +DATA 4 0x73fa850c 0x20c5 # SDODT1 > +DATA 4 0x73fa8510 0x20c5 # SDODT0 > +DATA 4 0x73fa84ac 0xc5 # SDWE > +DATA 4 0x73fa84b0 0xc5 # SDCKE0 > +DATA 4 0x73fa84b4 0xc5 # SDCKE1 > +DATA 4 0x73fa84cc 0xc5 # DRAM_CS0 > +DATA 4 0x73fa84d0 0xc5 # DRAM_CS1 > +DATA 4 0x73fa882c 0x2 # DRAM_B4 > +DATA 4 0x73fa88a4 0x2 # DRAM_B0 > +DATA 4 0x73fa88ac 0x2 # DRAM_B1 > +DATA 4 0x73fa88b8 0x2 # DRAM_B2 > +DATA 4 0x73fa84d4 0xc5 # DRAM_DQM0 > +DATA 4 0x73fa84d8 0xc5 # DRAM_DQM1 > +DATA 4 0x73fa84dc 0xc5 # DRAM_DQM2 > +DATA 4 0x73fa84e0 0xc5 # DRAM_DQM3 > > -# Setting DDR for micron > -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model > -# CAS=3 BL=4 > -# ESDCTL_ESDCTL0 > -DATA 4 0x83fd9000 0x82a20000 > -# ESDCTL_ESDCTL1 > -DATA 4 0x83fd9008 0x82a20000 > -# ESDCTL_ESDMISC > -DATA 4 0x83fd9010 0xcaaaf6d0 > -# ESDCTL_ESDCFG0 > -DATA 4 0x83fd9004 0x3f3574aa > -# ESDCTL_ESDCFG1 > -DATA 4 0x83fd900c 0x3f3574aa > +# Setting DDR for Micron > +# 13 Rows, 10 Cols, 32 bit > +# SREF=4 Micron Model CAS=3 BL=4 > +DATA 4 0x83fd9000 0x82a20000 # ESDCTL_ESDCTL0 > +DATA 4 0x83fd9008 0x82a20000 # ESDCTL_ESDCTL1 > +DATA 4 0x83fd9010 0xcaaaf6d0 # ESDCTL_ESDMISC > +DATA 4 0x83fd9004 0x3f3574aa # ESDCTL_ESDCFG0 > +DATA 4 0x83fd900c 0x3f3574aa # ESDCTL_ESDCFG1 > > # Init DRAM on CS0 > -# ESDCTL_ESDSCR > -DATA 4 0x83fd9014 0x04008008 > +DATA 4 0x83fd9014 0x04008008 # ESDCTL_ESDSCR > DATA 4 0x83fd9014 0x0000801a > DATA 4 0x83fd9014 0x0000801b > DATA 4 0x83fd9014 0x00448019 > @@ -110,13 +106,8 @@ DATA 4 0x83fd9014 0x0632801c > DATA 4 0x83fd9014 0x0380801d > DATA 4 0x83fd9014 0x0040801d > DATA 4 0x83fd9014 0x00008004 > - > -# Write to CTL0 > -DATA 4 0x83fd9000 0xb2a20000 > -# Write to CTL1 > -DATA 4 0x83fd9008 0xb2a20000 > -# ESDMISC > -DATA 4 0x83fd9010 0x000ad6d0 > -#ESDCTL_ESDCDLYGD > -DATA 4 0x83fd9034 0x90000000 > +DATA 4 0x83fd9000 0xb2a20000 # Write to CTL0 > +DATA 4 0x83fd9008 0xb2a20000 # Write to CTL1 > +DATA 4 0x83fd9010 0x000ad6d0 # ESDMISC > +DATA 4 0x83fd9034 0x90000000 # ESDCTL_ESDCDLYGD > DATA 4 0x83fd9014 0x00000000 > I join Marek, it is quite difficult to review it and understand which was changed. It looks like a new file.. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================