From: Scott Wood <scottwood@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 05/11] powerpc/mpc85xx: use boot page translation for spin table address
Date: Fri, 24 Aug 2012 18:11:51 -0500 [thread overview]
Message-ID: <50380A37.6060802@freescale.com> (raw)
In-Reply-To: <503808E1.7040407@freescale.com>
On 08/24/2012 06:06 PM, York Sun wrote:
> On 08/24/2012 03:55 PM, Scott Wood wrote:
>> On 08/17/2012 01:27 PM, York Sun wrote:
>>> E6500 doesn't allow cache inhibit TLB alias. Use the boot page
>>> translation
>>> instead. The boot page is always cache inhibit.
>>
>> We're not supposed to create such aliases on any PPC core.
>
> We seem to have been using it for quite a while, until it is broken here.
Just because there wasn't a cop behind the billboard doesn't mean we
weren't speeding. :-)
I've gotten machine checks on p4080 from such aliases under specific
circumstances (just not in the specific case of what U-Boot does).
>> Please move to a cacheable spintable as described in ePAPR 1.1. This
>> probably means not using the boot page window to access it.
>>
> No objection here.
While we're touching the spin table stuff, we really should fix the bug
that we don't load the upper half of r3 on 64-bit so at least on
non-e5500 we won't have old U-Boots floating around that don't do it.
-Scott
next prev parent reply other threads:[~2012-08-24 23:11 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-17 18:27 [U-Boot] [PATCH 01/11] powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 York Sun
2012-08-17 18:27 ` [U-Boot] [PATCH 02/11] powerpc/mpc85xx: setup stash id for L1 and L2 cache York Sun
2012-08-17 18:27 ` [U-Boot] [PATCH 03/11] powerpc/mpc85xx: change RCW MEM_PLL_PLAT for Chassis generation 2 York Sun
2012-08-17 18:27 ` [U-Boot] [PATCH 04/11] powerpc/mpc85xx: check number of cores York Sun
2012-08-17 18:27 ` [U-Boot] [PATCH 05/11] powerpc/mpc85xx: use boot page translation for spin table address York Sun
2012-08-24 22:55 ` Scott Wood
2012-08-24 23:06 ` York Sun
2012-08-24 23:11 ` Scott Wood [this message]
2012-08-17 18:27 ` [U-Boot] [PATCH 06/11] powerpc/mpc85xx: Fix core cluster PLL calculation for Chassis generation 2 York Sun
2012-08-17 18:27 ` [U-Boot] [PATCH 07/11] powerpc/mpc85xx: expand SERDES reference clock select bit York Sun
2012-08-17 18:27 ` [U-Boot] [PATCH 08/11] powerpc/e6500: Move QCSP registers for QMan v3 York Sun
2012-08-22 16:18 ` Andy Fleming
2012-08-22 18:43 ` York Sun
2012-08-17 18:27 ` [U-Boot] [PATCH 09/11] powerpc/mpc85xx: Add RCW bits and registers for SerDes for corenet2 York Sun
2012-08-17 18:27 ` [U-Boot] [PATCH 10/11] powerpc/corenet2: Add " York Sun
2012-08-17 18:27 ` [U-Boot] [PATCH 11/11] powerpc/corenet2: fix mismatch DDR sync bit from RCW York Sun
2012-08-24 22:53 ` [U-Boot] [PATCH 01/11] powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 Scott Wood
2012-08-24 23:02 ` York Sun
2012-08-24 23:14 ` Scott Wood
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