From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Fri, 24 Aug 2012 18:11:51 -0500 Subject: [U-Boot] [PATCH 05/11] powerpc/mpc85xx: use boot page translation for spin table address In-Reply-To: <503808E1.7040407@freescale.com> References: <1345228043-30277-1-git-send-email-yorksun@freescale.com> <1345228043-30277-5-git-send-email-yorksun@freescale.com> <50380678.8040400@freescale.com> <503808E1.7040407@freescale.com> Message-ID: <50380A37.6060802@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 08/24/2012 06:06 PM, York Sun wrote: > On 08/24/2012 03:55 PM, Scott Wood wrote: >> On 08/17/2012 01:27 PM, York Sun wrote: >>> E6500 doesn't allow cache inhibit TLB alias. Use the boot page >>> translation >>> instead. The boot page is always cache inhibit. >> >> We're not supposed to create such aliases on any PPC core. > > We seem to have been using it for quite a while, until it is broken here. Just because there wasn't a cop behind the billboard doesn't mean we weren't speeding. :-) I've gotten machine checks on p4080 from such aliases under specific circumstances (just not in the specific case of what U-Boot does). >> Please move to a cacheable spintable as described in ePAPR 1.1. This >> probably means not using the boot page window to access it. >> > No objection here. While we're touching the spin table stuff, we really should fix the bug that we don't load the upper half of r3 on 64-bit so at least on non-e5500 we won't have old U-Boots floating around that don't do it. -Scott