[U-Boot] [PATCH 1/2] MX28: Add CONFIG_MX28_DEBUG

[U-Boot] [PATCH 1/2] MX28: Add CONFIG_MX28_DEBUG

[Marek Vasut]

This functionality allows configuring SCRATCH0 and SCRATCH1 registers
to special values, which make the SPL hang after the CPU was properly
initialized.

This is for bootstrap purposes only and MUST BE DISABLED for normal
operation.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
---
 arch/arm/cpu/arm926ejs/mxs/Makefile    |    3 ++
 arch/arm/cpu/arm926ejs/mxs/mxs_init.h  |    6 +++
 arch/arm/cpu/arm926ejs/mxs/spl_boot.c  |    2 +
 arch/arm/cpu/arm926ejs/mxs/spl_debug.c |   63 ++++++++++++++++++++++++++++++++
 4 files changed, 74 insertions(+)
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_debug.c

diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile b/arch/arm/cpu/arm926ejs/mxs/Makefile
index eeecf89..e75eabd 100644
--- a/arch/arm/cpu/arm926ejs/mxs/Makefile
+++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
@@ -29,6 +29,9 @@ COBJS	= clock.o mxs.o iomux.o timer.o
 
 ifdef	CONFIG_SPL_BUILD
 COBJS	+= spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
+ifdef	CONFIG_MX28_DEBUG
+COBJS	+= spl_debug.o
+endif
 endif
 
 SRCS	:= $(START:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
index 2ddc5bc..e6f837c 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
@@ -42,4 +42,10 @@ uint32_t mxs_mem_get_size(void);
 void mxs_lradc_init(void);
 void mxs_lradc_enable_batt_measurement(void);
 
+#ifdef CONFIG_MX28_DEBUG
+void mx28_common_spl_debug_halt(void);
+#else
+static inline void mx28_common_spl_debug_halt(void) {}
+#endif
+
 #endif	/* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index ad66c57..f4f0c09 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -108,6 +108,8 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
 
 	data->boot_mode_idx = bootmode;
 
+	mx28_common_spl_debug_halt();
+
 	mxs_power_wait_pswitch();
 }
 
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_debug.c b/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
new file mode 100644
index 0000000..f0aef20
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
@@ -0,0 +1,63 @@
+/*
+ * Freescale i.MX28 Boot debug helpers
+ *
+ * Copyright (C) 2012 Marek Vasut <marex@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include <asm/arch/iomux-mx28.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+
+#include "mxs_init.h"
+
+void mx28_common_spl_debug_halt(void)
+{
+	/*
+	 * Check for magic setup of DIGCTL_SCRATCH0 and DIGCTL_SCRATCH1
+	 * registers, which tells the system to halt after initializing
+	 * hardware. This is useful at bootstrap stage, otherwise shall
+	 * be disabled.
+	 */
+	struct mxs_digctl_regs *digctl_regs =
+		(struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
+
+	const uint32_t magic0 = 0xc001f00d;
+	const uint32_t magic1 = 0x1337b4b3;
+	uint32_t reg;
+
+	reg = readl(&digctl_regs->hw_digctl_scratch0);
+	if (reg != magic0)
+		return;
+
+	reg = readl(&digctl_regs->hw_digctl_scratch1);
+	if (reg != magic1)
+		return;
+
+	serial_init();
+	serial_puts("Hardware init complete, SPL halted.\n");
+
+	/* Both magic values matched, hang. */
+	asm volatile("x: b x\n");
+}
-- 
1.7.10.4

[U-Boot] [PATCH 2/2] MX28: Add LRADC dump into SPL debug

[Marek Vasut]

This is useful if the power management on the chip isn't properly
initialized. It's possible to use the internal LRADC to sample various
power rails and debug the problem.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
---
 arch/arm/cpu/arm926ejs/mxs/mxs_init.h  |    2 +
 arch/arm/cpu/arm926ejs/mxs/spl_boot.c  |    3 ++
 arch/arm/cpu/arm926ejs/mxs/spl_debug.c |   89 ++++++++++++++++++++++++++++++++
 3 files changed, 94 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
index e6f837c..acb62fa 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
@@ -44,8 +44,10 @@ void mxs_lradc_enable_batt_measurement(void);
 
 #ifdef CONFIG_MX28_DEBUG
 void mx28_common_spl_debug_halt(void);
+void mx28_read_lradc(void);
 #else
 static inline void mx28_common_spl_debug_halt(void) {}
+static inline void mx28_read_lradc(void) {}
 #endif
 
 #endif	/* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index f4f0c09..ea52a53 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -104,6 +104,9 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
 	mxs_power_init();
 
 	mxs_mem_init();
+
+	mx28_read_lradc();
+
 	data->mem_dram_size = mxs_mem_get_size();
 
 	data->boot_mode_idx = bootmode;
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_debug.c b/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
index f0aef20..51f9b79 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
@@ -61,3 +61,92 @@ void mx28_common_spl_debug_halt(void)
 	/* Both magic values matched, hang. */
 	asm volatile("x: b x\n");
 }
+
+static void my_print_int(uint32_t val)
+{
+	/* 0xffffffff = 4,294,967,295 */
+	char buf[10] = {0};
+	int i = 0;
+
+	if (!val) {
+		serial_putc('0');
+		return;
+	}
+
+	for (i = 0; i < 9; i++) {
+		buf[i] = val % 10;
+		val /= 10;
+	}
+
+	for (; i >= 0; i--)
+		if (buf[i])
+			break;
+	for (; i >= 0; i--)
+		serial_putc(buf[i] + '0');
+}
+
+static const char * const mx28_lradc_chan_names[16] = {
+	"[General Purpose 0]",
+	"[General Purpose 1]",
+	"[General Purpose 2]",
+	"[General Purpose 3]",
+	"[General Purpose 4]",
+	"[General Purpose 5]",
+	"[General Purpose 6]",
+	"[General Purpose 7 / Battery]",
+	"[Temperature sense 0]",
+	"[Temperature sense 1]",
+	"[VDDIO]",
+	"[VTH]",
+	"[VDDA]",
+	"[VDDD]",
+	"[VBG]",
+	"[5V input]",
+};
+
+static void mx28_read_lradc_chans(int offset)
+{
+	struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
+	int i;
+	uint32_t val;
+
+	mxs_reset_block(&regs->hw_lradc_ctrl0_reg);
+
+	/* Flush the block */
+	writel(0, &regs->hw_lradc_ctrl0);
+	writel(0, &regs->hw_lradc_ctrl1);
+	writel(0, &regs->hw_lradc_ctrl2);
+	writel(0, &regs->hw_lradc_ctrl3);
+
+	/* Empty the channels */
+	for (i = 0; i < 8; i++)
+		writel(0, &regs->hw_lradc_ch0_reg + i);
+
+	/* Map channels and trigger them */
+	writel(offset ? 0xfedcba98 : 0x76543210, &regs->hw_lradc_ctrl4);
+	writel(0xff, &regs->hw_lradc_ctrl0_set);
+
+	while ((readl(&regs->hw_lradc_ctrl1) & 0xff) != 0xff)
+		;
+
+	/* Read and report the channels */
+	for (i = 0; i < 8; i++) {
+		val = readl(&regs->hw_lradc_ch0_reg + i);
+		val &= LRADC_CH_VALUE_MASK;
+		serial_puts("Channel ");
+		my_print_int(i + (offset * 8));
+		serial_putc(' ');
+		serial_puts(mx28_lradc_chan_names[i + (offset * 8)]);
+		serial_puts(" = ");
+		my_print_int(val);
+		serial_putc('\n');
+	}
+}
+
+void mx28_read_lradc(void)
+{
+	serial_init();
+	serial_putc('\n');
+	mx28_read_lradc_chans(0);
+	mx28_read_lradc_chans(1);
+}
-- 
1.7.10.4

[U-Boot] [PATCH 1/2] MX28: Add CONFIG_MX28_DEBUG

[Stefano Babic]

On 29/08/2012 03:14, Marek Vasut wrote:
> This functionality allows configuring SCRATCH0 and SCRATCH1 registers
> to special values, which make the SPL hang after the CPU was properly
> initialized.
> 
> This is for bootstrap purposes only and MUST BE DISABLED for normal
> operation.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> ---

Hi Marek,

>  arch/arm/cpu/arm926ejs/mxs/Makefile    |    3 ++
>  arch/arm/cpu/arm926ejs/mxs/mxs_init.h  |    6 +++
>  arch/arm/cpu/arm926ejs/mxs/spl_boot.c  |    2 +
>  arch/arm/cpu/arm926ejs/mxs/spl_debug.c |   63 ++++++++++++++++++++++++++++++++
>  4 files changed, 74 insertions(+)
>  create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_debug.c
> 
> diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile b/arch/arm/cpu/arm926ejs/mxs/Makefile
> index eeecf89..e75eabd 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/Makefile
> +++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
> @@ -29,6 +29,9 @@ COBJS	= clock.o mxs.o iomux.o timer.o
>  
>  ifdef	CONFIG_SPL_BUILD
>  COBJS	+= spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
> +ifdef	CONFIG_MX28_DEBUG
> +COBJS	+= spl_debug.o
> +endif
>  endif
>  
>  SRCS	:= $(START:.o=.S) $(COBJS:.o=.c)
> diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
> index 2ddc5bc..e6f837c 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
> +++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
> @@ -42,4 +42,10 @@ uint32_t mxs_mem_get_size(void);
>  void mxs_lradc_init(void);
>  void mxs_lradc_enable_batt_measurement(void);
>  
> +#ifdef CONFIG_MX28_DEBUG
> +void mx28_common_spl_debug_halt(void);
> +#else
> +static inline void mx28_common_spl_debug_halt(void) {}
> +#endif
> +
>  #endif	/* __M28_INIT_H__ */
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> index ad66c57..f4f0c09 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> @@ -108,6 +108,8 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
>  
>  	data->boot_mode_idx = bootmode;
>  
> +	mx28_common_spl_debug_halt();
> +
>  	mxs_power_wait_pswitch();
>  }

I admit I use the same trick when the first initialization fails and I
want to check what happens. Make the SOC hanging helps, sure.

However, this is part of the porting / development. Why should we
introduce this code into mainline ? In the official configuration file
CONFIG_MX28_DEBUG must be off, and then all this stuff is dead code.

Regards,
Stefano


-- 
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[U-Boot] [PATCH 1/2] MX28: Add CONFIG_MX28_DEBUG

[Marek Vasut]

Dear Stefano Babic,

> On 29/08/2012 03:14, Marek Vasut wrote:
> > This functionality allows configuring SCRATCH0 and SCRATCH1 registers
> > to special values, which make the SPL hang after the CPU was properly
> > initialized.
> > 
> > This is for bootstrap purposes only and MUST BE DISABLED for normal
> > operation.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Wolfgang Denk <wd@denx.de>
> > Cc: Stefano Babic <sbabic@denx.de>
> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
> > ---
> 
> Hi Marek,
> 
> >  arch/arm/cpu/arm926ejs/mxs/Makefile    |    3 ++
> >  arch/arm/cpu/arm926ejs/mxs/mxs_init.h  |    6 +++
> >  arch/arm/cpu/arm926ejs/mxs/spl_boot.c  |    2 +
> >  arch/arm/cpu/arm926ejs/mxs/spl_debug.c |   63
> >  ++++++++++++++++++++++++++++++++ 4 files changed, 74 insertions(+)
> >  create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_debug.c
> > 
> > diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile
> > b/arch/arm/cpu/arm926ejs/mxs/Makefile index eeecf89..e75eabd 100644
> > --- a/arch/arm/cpu/arm926ejs/mxs/Makefile
> > +++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
> > @@ -29,6 +29,9 @@ COBJS	= clock.o mxs.o iomux.o timer.o
> > 
> >  ifdef	CONFIG_SPL_BUILD
> >  COBJS	+= spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
> > 
> > +ifdef	CONFIG_MX28_DEBUG
> > +COBJS	+= spl_debug.o
> > +endif
> > 
> >  endif
> >  
> >  SRCS	:= $(START:.o=.S) $(COBJS:.o=.c)
> > 
> > diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
> > b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h index 2ddc5bc..e6f837c 100644
> > --- a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
> > +++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
> > @@ -42,4 +42,10 @@ uint32_t mxs_mem_get_size(void);
> > 
> >  void mxs_lradc_init(void);
> >  void mxs_lradc_enable_batt_measurement(void);
> > 
> > +#ifdef CONFIG_MX28_DEBUG
> > +void mx28_common_spl_debug_halt(void);
> > +#else
> > +static inline void mx28_common_spl_debug_halt(void) {}
> > +#endif
> > +
> > 
> >  #endif	/* __M28_INIT_H__ */
> > 
> > diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> > b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index ad66c57..f4f0c09 100644
> > --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> > +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> > @@ -108,6 +108,8 @@ void mxs_common_spl_init(const iomux_cfg_t
> > *iomux_setup,
> > 
> >  	data->boot_mode_idx = bootmode;
> > 
> > +	mx28_common_spl_debug_halt();
> > +
> > 
> >  	mxs_power_wait_pswitch();
> >  
> >  }
> 
> I admit I use the same trick when the first initialization fails and I
> want to check what happens. Make the SOC hanging helps, sure.

Yea ... so either way if it's merged or not, I hope it might help someone :)

> However, this is part of the porting / development. Why should we
> introduce this code into mainline ? In the official configuration file
> CONFIG_MX28_DEBUG must be off, and then all this stuff is dead code.

Indeed, I'll shift this decision on you ;-)

> 
> Regards,
> Stefano

Best regards,
Marek Vasut