From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stefano Babic <sbabic@denx.de>
Date: Wed, 29 Aug 2012 09:54:47 +0200
Subject: [U-Boot] [PATCH 1/2] MX28: Add CONFIG_MX28_DEBUG
In-Reply-To: <1346202861-19140-1-git-send-email-marex@denx.de>
References: <1346202861-19140-1-git-send-email-marex@denx.de>
Message-ID: <503DCAC7.1050003@denx.de>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On 29/08/2012 03:14, Marek Vasut wrote:
> This functionality allows configuring SCRATCH0 and SCRATCH1 registers
> to special values, which make the SPL hang after the CPU was properly
> initialized.
> 
> This is for bootstrap purposes only and MUST BE DISABLED for normal
> operation.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> ---

Hi Marek,

>  arch/arm/cpu/arm926ejs/mxs/Makefile    |    3 ++
>  arch/arm/cpu/arm926ejs/mxs/mxs_init.h  |    6 +++
>  arch/arm/cpu/arm926ejs/mxs/spl_boot.c  |    2 +
>  arch/arm/cpu/arm926ejs/mxs/spl_debug.c |   63 ++++++++++++++++++++++++++++++++
>  4 files changed, 74 insertions(+)
>  create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_debug.c
> 
> diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile b/arch/arm/cpu/arm926ejs/mxs/Makefile
> index eeecf89..e75eabd 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/Makefile
> +++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
> @@ -29,6 +29,9 @@ COBJS	= clock.o mxs.o iomux.o timer.o
>  
>  ifdef	CONFIG_SPL_BUILD
>  COBJS	+= spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
> +ifdef	CONFIG_MX28_DEBUG
> +COBJS	+= spl_debug.o
> +endif
>  endif
>  
>  SRCS	:= $(START:.o=.S) $(COBJS:.o=.c)
> diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
> index 2ddc5bc..e6f837c 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
> +++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
> @@ -42,4 +42,10 @@ uint32_t mxs_mem_get_size(void);
>  void mxs_lradc_init(void);
>  void mxs_lradc_enable_batt_measurement(void);
>  
> +#ifdef CONFIG_MX28_DEBUG
> +void mx28_common_spl_debug_halt(void);
> +#else
> +static inline void mx28_common_spl_debug_halt(void) {}
> +#endif
> +
>  #endif	/* __M28_INIT_H__ */
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> index ad66c57..f4f0c09 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> @@ -108,6 +108,8 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
>  
>  	data->boot_mode_idx = bootmode;
>  
> +	mx28_common_spl_debug_halt();
> +
>  	mxs_power_wait_pswitch();
>  }

I admit I use the same trick when the first initialization fails and I
want to check what happens. Make the SOC hanging helps, sure.

However, this is part of the porting / development. Why should we
introduce this code into mainline ? In the official configuration file
CONFIG_MX28_DEBUG must be off, and then all this stuff is dead code.

Regards,
Stefano


-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================