[U-Boot] Problem booting i.MX6 from parallel NOR flash

[Dirk Behme <dirk.behme@de.bosch.com>]

On 07.09.2012 20:41, Carolyn Smith wrote:
> Hello,
> 
> I have a custom i.MX6 board that is configured to boot from 16-bit parallel
> NOR flash using non-multiplexed I/O with the data on the upper half of the
> data bus. I.e. chip select 0 of the EIM bus should be configured so that
> MUM = 0 and DSZ = 010b.
> 
> However, the board is coming out of reset (using a BDI3000) with MUM = 1
> and DSZ = 001b so multiplexed I/O with the data on the lower half of the
> data bus. According to the EIM multiplexing table, this isn't even a valid
> configuration.

Check the BOOT_MODE and BOOT_CFG of your board. A valid boot 
configuration to boot from parallel NOR on your board should look like this:

SRC_SBMR1: 0x02044000

> Further, if I change the EIM_CS0GCR1 register (using the BDI) to force MUM
> = 0 and DSZ = 010b, then read from the flash, I can see the correct data on
> the bus using a logic analyzer but the BDI always returns 0.

Check the pin multiplex and EIM configuration. An example can be found in

u-boot-2009.08/board/freescale/mx6q_sabreauto/mx6q_sabreauto.c

in Freescale's latest U-Boot ER release for i.MX6.

Best regards

Dirk