From: "Andreas Bießmann" <andreas.devel@googlemail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2] mmc: at91: add multi block read/write support.
Date: Thu, 13 Sep 2012 13:11:58 +0200 [thread overview]
Message-ID: <5051BF7E.2030508@gmail.com> (raw)
In-Reply-To: <1347014373-4598-1-git-send-email-josh.wu@atmel.com>
Dear Josh Wu,
sorry for beeing late. Bu2013.01 release.t this submission was way after
merge window close so it will anyhow end up in 2013.01 release.
On 07.09.2012 12:39, Josh Wu wrote:
> Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it.
> This patch also change delay time to max value, which can avoid the timeout error in rare case.
>
> Signed-off-by: Josh Wu <josh.wu@atmel.com>
> ---
> drivers/mmc/gen_atmel_mci.c | 16 +++++++++++++---
> include/atmel_mci.h | 5 ++++-
> 2 files changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
> index 4968c5e..ec075f7 100644
> --- a/drivers/mmc/gen_atmel_mci.c
> +++ b/drivers/mmc/gen_atmel_mci.c
> @@ -24,7 +24,6 @@
> * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> * MA 02111-1307 USA
> */
> -
please leave this line untouched.
> #include <common.h>
> #include <mmc.h>
> #include <part.h>
> @@ -87,6 +86,11 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
> | MMCI_BF(BLKLEN, blklen)
> | MMCI_BIT(RDPROOF)
> | MMCI_BIT(WRPROOF)), &mci->mr);
> + /*
> + * On some new platforms BLKLEN in mci->mr is ignored.
> + * Should use the BLKLEN in the block register.
> + */
> + writel(blklen << MMCI_BLKLEN_OFFSET, &mci->blkr);
please use the MMCI_BF macro here
> initialized = 1;
> }
>
> @@ -183,6 +187,12 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
> /* Figure out the transfer arguments */
> cmdr = mci_encode_cmd(cmd, data, &error_flags);
>
> + /* For multi blocks read/write, set the block register */
> + if ((cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK)
> + || (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK))
> + writel(data->blocks | mmc->read_bl_len << MMCI_BLKLEN_OFFSET,
> + &mci->blkr);
please use the MMCI_BF macros here.
> +
> /* Send the command */
> writel(cmd->cmdarg, &mci->argr);
> writel(cmdr, &mci->cmdr);
> @@ -310,8 +320,8 @@ static int mci_init(struct mmc *mmc)
> writel(MMCI_BIT(MCIEN), &mci->cr); /* enable mci */
> writel(MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr); /* select port */
>
> - /* Initial Time-outs */
> - writel(0x5f, &mci->dtor);
> + /* This delay can be optimized, but stick with max value */
> + writel(0x7f, &mci->dtor);
can we split this in a separate patch?
> /* Disable Interrupts */
> writel(~0UL, &mci->idr);
>
> diff --git a/include/atmel_mci.h b/include/atmel_mci.h
> index 3dd5d67..85468d4 100644
> --- a/include/atmel_mci.h
> +++ b/include/atmel_mci.h
> @@ -38,7 +38,7 @@ typedef struct atmel_mci {
> u32 sdcr; /* 0x0c */
> u32 argr; /* 0x10 */
> u32 cmdr; /* 0x14 */
> - u32 _18; /* 0x18 */
> + u32 blkr; /* 0x18 */
> u32 _1c; /* 0x1c */
> u32 rspr; /* 0x20 */
> u32 rspr1; /* 0x24 */
> @@ -118,6 +118,9 @@ typedef struct atmel_mci {
> #define MMCI_TRTYP_OFFSET 19
> #define MMCI_TRTYP_SIZE 2
>
> +/* Bitfields in BLKR */
> +#define MMCI_BLKLEN_OFFSET 16
NAK, this is defined some lines up (under MR), please add an reminder
here that it is defined under MR. I wonder if this will produce 'defined
previously' warnings.
> +
> /* Bitfields in RSPRx */
> #define MMCI_RSP_OFFSET 0
> #define MMCI_RSP_SIZE 32
>
Best regards
Andreas Bie?mann
next prev parent reply other threads:[~2012-09-13 11:11 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-07 10:39 [U-Boot] [PATCH 1/2] mmc: at91: add multi block read/write support Josh Wu
2012-09-07 10:39 ` [U-Boot] [PATCH 2/2] ARM: at91sam9x5: enable MCI0 support for 9x5ek board Josh Wu
2012-09-10 8:07 ` Bo Shen
2012-09-12 10:21 ` Josh Wu
2012-09-14 6:22 ` Josh Wu
2012-09-13 11:19 ` Andreas Bießmann
2012-09-13 11:11 ` Andreas Bießmann [this message]
2012-09-14 8:31 ` [U-Boot] [PATCH 1/2] mmc: at91: add multi block read/write support Josh Wu
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