From mboxrd@z Thu Jan  1 00:00:00 1970
From: Michal Simek <monstr@monstr.eu>
Date: Fri, 14 Sep 2012 12:42:34 +0200
Subject: [U-Boot] [PATCH 3/4 v3] arm: Support new Xilinx Zynq platform
In-Reply-To: <201209141159.19121.marex@denx.de>
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	<201209140950.13770.marex@denx.de> <5052E673.3020107@monstr.eu>
	<201209141159.19121.marex@denx.de>
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On 09/14/2012 11:59 AM, Marek Vasut wrote:
> Dear Michal Simek,
>
>> On 09/14/2012 09:50 AM, Marek Vasut wrote:
>>> Dear Michal Simek,
>>>
>>>> Add timer driver.
>>>>
>>>> Signed-off-by: Michal Simek <monstr@monstr.eu>
>>>> CC: Joe Hershberger <joe.hershberger@gmail.com>
>>>> CC: Marek Vasut <marex@denx.de>
>>>>
>>>> ---
>>>> v2: Move lowlevel_init.S from board to cpu folder
>>>>
>>>>       Remove XPSS prefix
>>>>       Rename XSCUTIMER -> SCUTIMER
>>>>
>>>> v3: Using clrsetbits_le32
>>>>
>>>>       Fix compilation warning
>>>>       Move reset_cpu from board to cpu.c
>>>>       Move lowlevel_init to cpu.c
>>>
>>> [...]
>>>
>>>> +#include <common.h>
>>>> +
>>>> +inline void lowlevel_init(void) {}
>>>> +
>>>> +void reset_cpu(ulong addr)
>>>> +{
>>>> +	while (1)
>>>> +		;
>>>> +}
>>>
>>> I wonder how useful such CPU is if simple endless loop restarts it ;-)
>>
>> Don't be scared it will be fixed when slcr is ready.
>
> Nay, I was just rambling and giving you a bit of torture :-)

:-)

>
> What's SLCR ?

System level control registers. For example for clock setup, unit reset, ddr setup
configuration pin setup, etc.

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian