From mboxrd@z Thu Jan  1 00:00:00 1970
From: Troy Kisky <troy.kisky@boundarydevices.com>
Date: Sat, 22 Sep 2012 10:34:22 -0700
Subject: [U-Boot] [PATCH V2 15/21] mx6q_4x_mt41j128.cfg: reorder for
 more efficient storage
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On 9/22/2012 10:27 AM, Fabio Estevam wrote:
> Hi Troy,
>
> On Fri, Sep 21, 2012 at 11:39 PM, Troy Kisky
> <troy.kisky@boundarydevices.com> wrote:
>> Repeating data values can be stored more efficiently.
>>
>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> I am not a ddr init expert, but my understanding is that the DDR init sequence
> is important and probably we should keep it as is.
>
> Regards,
>
> Fabio Estevam
>
The order of writes to IOMUXC registers is not important, other than to 
be finished
before accessing the DDR chips.

Troy