[U-Boot] [PATCH V2 15/21] mx6q_4x_mt41j128.cfg: reorder for more efficient storage

Troy Kisky
2012-09-22T17:34:22Z

On 9/22/2012 10:27 AM, Fabio Estevam wrote:
> Hi Troy,
>
> On Fri, Sep 21, 2012 at 11:39 PM, Troy Kisky
> <troy.kisky@boundarydevices.com> wrote:
>> Repeating data values can be stored more efficiently.
>>
>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> I am not a ddr init expert, but my understanding is that the DDR init sequence
> is important and probably we should keep it as is.
>
> Regards,
>
> Fabio Estevam
>
The order of writes to IOMUXC registers is not important, other than to
be finished
before accessing the DDR chips.

Troy